Abstract: In a solid-state imaging element equipped with per-column ADCs, noise is reduced. A test signal source generates a test signal of a predetermined level. An analog-to-digital converter increases/decreases an analog signal according to an analog gain selected from among a plurality of analog gains, and converts the increased/decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, either a test signal or a pixel signal to the analog-to-digital converter. A correction value calculation section obtains, on the basis of the test signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section corrects the digital signal according to the outputted correction value.

Abstract: A vision sensor includes a pixel array including a plurality of pixels, a voltage generator configured to generate a reset bias voltage provided to each of the plurality of pixels, a temperature comparing circuit configured to output a switching setting value according to a result of comparing temperature information with at least one reference temperature value, and a voltage level controller configured to generate a reset bias setting signal based on the switching setting value. The reset bias setting signal adjusts a voltage level of the reset bias voltage.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: An image sensor includes: a pixel outputting a pixel signal; a ramp voltage generation circuit suitable for generating a ramp voltage that changes at a first slope in a first section and generating the ramp voltage that changes at a second slope having a greater absolute value than the first slope in a second section following the first section; an operation amplifier suitable for comparing the pixel signal with the ramp voltage during the first section and the second section; and a counter circuit suitable for generating a digital code corresponding to the pixel signal in response to an output of the operation amplifier.

Abstract: An apparatus configured to acquire a plurality of spectral images of an object includes at least one processor configured to execute a plurality of tasks including a selection task configured to select a recording wavelength band according to an input by a user, and a control task configured to store in a memory information on a spectral image corresponding to the recording wavelength band. The apparatus acquires the plurality of spectral images by imaging the object through a plurality of lens units each configured to form an image of the object, and a plurality of filters each of which is disposed on a corresponding one of optical axes of the plurality of lens units.

Abstract: A pixel readout circuit includes an analog to digital converter coupled to the bitline output of the pixel circuit. A switch is coupled between the bitline output of the pixel circuit and a reference voltage. The switch is pulsed on and off a first time to settle the bitline to the reference voltage prior to an autozero operation of the analog to digital converter. The switch is pulsed on and off a second time to settle the bitline to the reference voltage after the autozero operation and prior to a first analog to digital conversion. The switch is configured to be pulsed on and off a third time to settle the bitline to the reference voltage after the first analog to digital conversion operation and prior to a second analog to digital conversion operation.

Abstract: An imaging device includes a varifocal lens and an imaging sensor which outputs a signal corresponding to light. The imaging sensor includes a photoelectric conversion unit which converts light into an electric charge, electric charge reading regions, transfer control electrodes, a gate control circuit which sequentially applies control signals to the transfer control electrodes to correspond to the position of the focal point of the varifocal lens, and a reading circuit which outputs a signal corresponding to the amount of the electric charge transferred to the electric charge reading regions. The gate control circuit repeats an operation of outputting each of the control signals when the position of the focal point is located in the focal ranges during a frame period.

Abstract: A photoelectric conversion device comprising a pixel unit in which a plurality of pixels each comprising a photoelectric conversion element are arranged in a matrix, and a plurality of delta-sigma AD converters each configured to convert a signal output from the pixel unit into a digital signal, is provided. The plurality of delta-sigma AD converters are divided into at least two groups having different timings of starting AD conversion from each other when converting, into digital signals, signals output from the pixels selected out of the plurality of pixels via a common pixel control line.

Abstract: Apparatuses, methods, and program products are disclosed for operating a camera sense mode. One apparatus includes a processor, a camera, and a memory that stores code executable by the processor. The code is executable by the processor to determine, by use of the processor, whether the camera is set to a camera sense mode. The camera sense mode is a mode of the camera configured to use the camera as a sensor. The code is executable by the processor to, in response to the camera being set to the camera sense mode: analyze images captured by the camera, using a sensing application, to determine information related to the images; and inhibit applications separate from the sensing application from accessing images captured by the camera.

Abstract: An image sensor including a pixel that includes: a first photodiode; a second photodiode having a larger light-receiving area than the first photodiode; a first floating diffusion node accumulating charges of the first photodiode; a second floating diffusion node accumulating charges of the second photodiode; a capacitor accumulating charges overflowing from the first photodiode; a first switch transistor having a first end connected to the first floating diffusion node and a second end connected to the capacitor; and a driving transistor configured to convert the accumulated charges into a pixel signal, the first switch transistor is turned on in a low conversion gain (LCG) mode of a readout section of the first photodiode, and is turned off in a high conversion gain (HCG) mode of the readout section of the first photodiode, and the readout circuit generates image data based on pixel signals from the first and second sections.

Abstract: A differential subrange analog-to-digital converter (ADC) converts differential analog image signals received from sample and hold circuits to a digital signal through an ADC comparator. The comparator of the differential subrange ADC is shared by a successive approximation register (SAR) ADC coupled to provide both M upper output bits (UOB) and a ramp ADC coupled to provide N lower output bits (LOB). Digital-to-analog converters (DACs) of the differential subrange SAR ADC comprises 2M buffered bit capacitor fingers connected to the comparator. Each buffered bit capacitor finger comprises a bit capacitor, a bit buffer, and a bit switch controlled by the UOB. Both DACs are initialized to preset values and finalized based on the values of the least significant bit of the UOB. The subsequent ramp ADC operation will be ensured to have its first ramp signal ramps in a monotonic direction and its second ramp signal ramp in an opposite direction.

Abstract: A sensor system includes a sensor array and a gradation determination section. The sensor array includes a first sensor and a second sensor. The first sensor is configured to detect, with a first sensitivity, a variation in a quantity of light at a first pixel address. The second sensor is configured to detect, with a second sensitivity that is lower than the first sensitivity, a variation in a quantity of light at a second pixel address that is adjacent to or coincides with the first pixel address. The gradation determination section is configured to determine, when the first sensor generates a first event signal in response to a luminance variation event, a gradation of an object having caused the luminance variation event to occur, depending on whether or not the second sensor generates a second event signal in response to the luminance variation event.

Abstract: An image sensor is disclosed. The image sensor includes a plurality of pixels arranged in a plurality of rows and a plurality of columns, each of the pixels including: a photodiode; a floating diffusion node configured to accumulate photocharges generated from the photodiode; a first capacitor configured to store charges according to a voltage of the floating diffusion node which is reset; a second capacitor configured to store charges according to a voltage of the floating diffusion node in which the photocharges are accumulated; a first sampling transistor connected to a first output node and configured to sample charges to the first capacitor; a second sampling transistor connected to the first output node and configured to sample charges to the second capacitor; and at least one precharge select transistor connected to the first output node and configured to reset the first output node.

Abstract: An imaging device is provided with an amplification transistor having a gate connected to a charge accumulator, a feedback transistor of which the source or drain is electrically connected to the charge accumulator and the other is connected to the source or drain of the amplification transistor, a current supply that supplies a current to a first node, a first select transistor of which the source or drain is connected to the other of the amplification transistor, a second select transistor of which the source or drain is connected to the source or drain of the amplification transistor, a current source/voltage source switching circuit that selectively connects a current source or a first voltage supply circuit to the other of the first select transistor, and a second voltage supply circuit connected to the other of the second select transistor.

Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that can be provided with phase difference pixels with a lower degree of difficulty in manufacturing. Provided is a solid-state imaging device including a pixel array unit in which a plurality of pixels is two-dimensionally arrayed, in which the pixel array unit has an array pattern in which a plurality of pixel groups each including neighboring pixels of an identical color is regularly arrayed, and among the plurality of pixel groups arrayed in the array pattern, pixels configuring a light-shielded pixel group are shielded in an identical direction side from light, the light-shielded pixel group being a pixel group including pixels each being shielded in a part of a light incident side from the light. The present technology can be applied to, for example, a CMOS image sensor including pixels for phase difference detection.

Abstract: An analog-to-digital conversion circuit includes a comparator circuit configured to perform processing of comparison between an analog signal and a ramp signal, and a counter configured to perform count processing in parallel with the comparison processing by the comparator circuit. The analog-to-digital conversion circuit acquires digital data, which is a count value corresponding to the comparison processing, and subjects the analog signal to analog-to-digital conversion. A period from the start to the end of the analog-to-digital conversion of the one analog signal includes a first period and a second period following the first period. The first and the second periods are switched based on an output of the counter. The count processing is performed at a high speed during the first period and performed at a low speed during the second period.

Abstract: An amplifier includes a first capacitor connected between an input node and a floating node, a second capacitor connected between the floating node and an output node, an amplifying element connected between a power supply voltage and the output node and operating in response to a voltage level of the floating node, a current bias source connected between the output node and a ground voltage, a first reset switch connected between the floating node and an intermediate node and operating in response to a reset bias, a second reset switch connected between the intermediate node and the output node and operating in response to the reset bias, and a reset bias generator circuit that outputs the reset bias in response to a reset signal. The reset bias is one of a reset voltage of the intermediate node, the power supply voltage, and the ground voltage.

Abstract: An image sensor includes a pixel array with pixels arranged in a first direction and a second direction, intersecting the first direction. Each of the pixels includes a photodiode, a pixel circuit below the photodiode, and a color filter on or above the photodiode. A logic circuit acquires a pixel signal from the pixels through a plurality of column lines extending in the second direction. The pixels include color pixels and white pixels, the number of white pixels being greater than the number of color pixels. The pixel circuit includes a floating diffusion in which charges of the photodiode are accumulated and transistors outputting a voltage corresponding to amounts of charges in the floating diffusion. Each of the color pixels shares the floating diffusion with at least one neighboring white pixel, adjacent thereto in the second direction, among the white pixels.

Abstract: A photoarray for detecting time-dependent image data, comprising an array of multiple device cells, wherein each device cell comprises a group of photosensors, each photosensor configured to generate an analog sensor signal dependent on a light intensity at said photosensor, for each photosensor a pixel encoding circuit configured to transform the analog sensor signal generated by said photosensor into a digital pixel information stemming from said photosensor, and a processing unit, which comprises a correlation logic configured to correlate said pixel information stemming from the photosensors of said group of photosensors and to produce as a result a request signal indicating that said cell contains pixel information to be read and/or a pass signal utilized in the processing unit to allow pixel information contained in said cell to be transmitted.

Abstract: Disclosed is a circuit which includes a first amplifier that generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operating period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array in a second operating period, a second amplifier that generates a second output signal based on the first output signal, and a counter. During at least one operating period of the first operating period and the second operating period, the first output signal controls a first source current of the first amplifier, or the second output signal controls at least one of the first source current of the first amplifier and a second source current of the second amplifier.