Abstract: An image sensor may include: a pixel array including a plurality of pixels; and a timing controller configured to control the pixel array according to an operation mode of the pixel array. The operation mode may be any one of a first mode in which the plurality of pixels operate according to a global shutter method and a second mode in which the plurality of pixels operate according to a dual conversion gain method.

Abstract: To control an excess bias to an appropriate value in a light detection device. A solid-state image sensor includes a photodiode, a resistor, and a control circuit. In this solid-state image sensor, the photodiode photoelectrically converts incident light and outputs a photocurrent. Furthermore, in the solid-state image sensor, the resistor is connected to a cathode of the photodiode. Furthermore, in the solid-state image sensor, the control circuit supplies a lower potential to an anode of the photodiode as a potential of the cathode of when the photocurrent flows through the resistor is higher.

Abstract: A digital pixel sensor for correcting and reducing a mismatch between a pixel and an analog digital converter provided. The digital pixel sensor includes a pixel array including a plurality of pixels; and a bank disposed on the pixel array. The bank includes: a plurality of comparators disposed on the plurality of pixels and configured to compare each of a plurality of pixel signals output from the plurality of pixels with a reference signal to output a plurality of comparison result signals; and a counter connected to the plurality of comparators, and configured to receive the plurality of comparison result signals and latch count code based on the plurality of comparison result signals.

Abstract: To shorten time required for AD conversion when a solid-state imaging element that detects presence or absence of an address event further captures image data. In a detection block, a first pixel that generates a first analog signal by photoelectric conversion and a second pixel that generates a second analog signal by photoelectric conversion are arrayed. A first analog-digital converter converts the first analog signal into a digital signal on the basis of whether or not a change amount of an incident light amount of the detection block exceeds a predetermined threshold. A second analog-digital converter converts the second analog signal into a digital signal on the basis of whether or not the change amount exceeds the threshold.

Abstract: An image sensor compensates for noise. The image sensor includes a pixel array that includes a common monitor output line, a first monitoring pixel outputting a first monitoring signal, a second monitoring pixel outputting a second monitoring signal, and an active pixel configured to output a sensing signal based on an incident light. The image circuit also includes a binning circuit that receives the first and second monitoring signals through the common monitor output line and generates an average monitoring signal by performing binning on the first and second monitoring signals, and an analog-to-digital converter that detects an alternating current (AC) component of the average monitoring signal and couples the sampled AC component of the average monitoring signal to the sensing signal, thereby compensating for noise.

Abstract: The effect of ambient light on a measurement taken by an imaging pixel may be reduced by employing two optical filters. The two filters may have narrow passbands that are close to each other but do not overlap. The first filter may allow ambient and active light to pass. The second filter may allow ambient light to pass but may block active light. The ambient and active light that passes through the first filter may cause electrical charge to be generated in a photodiode of the pixel. The ambient light that passes through the second filter and strikes another pixel element may control the amperage of an electrical current that depletes charge from the photodiode. For instance, the other element may be a photoresistor, the light-dependent resistance of which controls the amperage, or may be a second photodiode that generates charge that controls a transistor that controls the amperage.

Abstract: An image sensor is provided. The image sensor includes a pixel array in which a plurality of pixels are arranged, wherein each of the plurality of pixels includes a photodiode; a floating diffusion node configured to integrate photocharges generated in the photodiode; a first sampling transistor electrically connected to a first node; a first capacitor electrically connected to a first node and configured to store a charge corresponding to a voltage of the floating diffusion node which is reset; a second sampling transistor electrically connected to a second node; a second capacitor electrically connected to the second node and configured to store a charge corresponding to a voltage of the floating diffusion node in which the photocharges are integrated; and at least one mode transistor configured to adjust an equivalent capacitance of each of the first node and the second node according to a mode control signal.

Abstract: A photodiode assembly comprises a photoconductive substrate, including a P-doped region coupled with a controllable voltage biasing source, and an adjacent N-doped well. The photodiode assembly further comprises first and second capacitors coupled with the photoconductive substrate on first and second sides of the N-doped well. First and second control inputs are also coupled with the photoconductive substrate, wherein activation of the first control input causes electrons to flow through a first multiplication region of the N-doped well toward the first capacitor in response to photons striking the photoconductive substrate, and activation of the second control input causes electrons to flow through a second multiplication region of the N-doped well toward the second capacitor in response to photons striking the photoconductive substrate.

Abstract: An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and capacitance cancellation circuitry. The capacitance cancellation circuitry may include capacitors, a common source amplifier transistor, an autozero switch, a switch for selectively deactivating at least one of the capacitors during sample-and-hold reset and sample-and-hold signal operations.

Abstract: An analog-to-digital converter circuit includes: a first operation amplifier suitable for comparing a ramp voltage and a voltage to be converted so as to produce an amplification result and outputting the amplification result; a second operation amplifier suitable for comparing the amplification result transferred to a first input terminal with a reference voltage transferred to a second input terminal so as to produce a comparison result and outputting the comparison result; a leakage current measurer suitable for measuring a leakage current to the first input terminal; and a leakage current generator suitable for causing a current of the same amount as that of the leakage current measured by the leakage current measurer to flow to the second input terminal.

Abstract: There is provided an imaging device including a pixel array section including pixel units two-dimensionally arranged in a matrix pattern, each pixel unit including a photoelectric converter, and a plurality of column signal lines disposed according to a first column of the pixel units. The imaging device further includes an analog to digital converter that is shared by the plurality of column signal lines.

Abstract: An imaging device includes a pixel array including pixel circuits arranged into rows and columns. Each bitline of a plurality of bitlines is coupled to a respective column of pixel circuits of the pixel array. The plurality of bitlines is grouped into pairs of bitlines. A plurality of binning circuits is coupled to the plurality of bitlines. Each binning circuit is coupled to a respective pair of bitlines and is responsive to a multi-mode select signal. Each binning circuit is configured to output a binned signal responsive to the first and second bitlines of the respective bitline pair in a first mode. Each binning circuit is configured to output a first signal from a first bitline of the respective bitline pair in a second mode. Each binning circuit is configured to output a second signal from the second bitline of the respective bitline pair in a third mode.

Abstract: The present technology relates to an imaging apparatus and method, and an image processing apparatus and method that make it possible to expand a range of a subject that can be imaged. A subject is imaged by an imaging element including a plurality of pixel output units that receives incident light from the subject entering without passing through either an imaging lens or a pinhole and entering through an optical system that is not an imaging lens and has a negative power, and each outputs one detection signal indicating an output pixel value modulated by an incident angle of the incident light. The present disclosure can be applied to, for example, an imaging apparatus, an image processing apparatus, an information processing apparatus, an electronic device, a computer, a program, a storage medium, a system, and the like.

Abstract: An imaging device includes pixel circuits that include either image sensing photodiodes or phase detection autofocus (PDAF) photodiodes. The PDAF photodiodes are included in a first PDAF pixel circuit included in a first grouping of rows, and a second PDAF pixel circuit included in a second grouping of rows of a pixel array. Bitline pairs are coupled to respective columns of the pixel array. Each bitline pair includes a first bitline coupled to the first grouping of rows and a second bitline coupled to the second grouping of rows of respective columns of the pixel array. Multiplexers are configured to select one of respective first or second bitlines of each bitline pair. A PDAF multiplexer is coupled to a PDAF select signal and the second PDAF circuit through a respective bitline pair. The remaining multiplexers are coupled to a select signal and are coupled to remaining bitline pairs.

Abstract: Systems and methods are disclosed for high dynamic rate processing based on angular rate measurements. For example, methods may include receiving a short exposure image that was captured using an image sensor; receiving a long exposure image that was captured using the image sensor; receiving an angular rate measurement captured using an angular rate sensor attached to the image sensor during exposure of the long exposure image; determining, based on the angular rate measurement, whether to apply high dynamic range processing to an image portion of the short exposure image and the long exposure image; and responsive to a determination not to apply high dynamic range processing to the image portion, selecting the image portion of the short exposure image for use as the image portion of an output image and discard the image portion of the long exposure image.

Abstract: A pixel circuit includes a photodiode and a floating diffusion disposed in a semiconductor substrate. A transfer gate is disposed between the photodiode and the floating diffusion to transfer photogenerated image charge from the photodiode to the floating diffusion. A dual floating diffusion (DFD) transistor is coupled between the floating diffusion and a DFD capacitor. The DFD transistor includes a DFD gate that includes a planar gate portion disposed over a surface of the semiconductor substrate and a vertical gate portion that extends vertically from the planar gate portion into the semiconductor substrate. The vertical gate portion of the DFD gate is configured to increase a gate to substrate coupling capacitance of the DFD transistor. The gate to substrate coupling capacitance and the DFD capacitor are coupled to increase an effective capacitance associated with the floating diffusion in response to the DFD transistor being turned on.

Abstract: The present disclosure relates to an imaging apparatus, an exposure controlling method, a program, and an imaging device by which the restoration accuracy of an image can be improved.

Abstract: An imaging apparatus and electronic equipment configured for reduced power consumption are disclosed. In one example, an imaging apparatus includes a pixel array unit including a first pixel portion and a second pixel portion different from the first pixel portion. Each of the first pixel portion and the second pixel portion includes a first photoelectric conversion unit and a second photoelectric conversion unit adjacent to the first photoelectric conversion unit. The pixel array unit includes a first drive line connected to the first photoelectric conversion unit of the first pixel portion and the second pixel portion, a second drive line connected to the second photoelectric conversion unit of the first pixel portion, and a third drive line connected to the second photoelectric conversion unit of the second pixel portion. The t technology can, for example, be applied in a CMOS image sensor having pixels for phase difference detection.

Abstract: A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.

Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes a light-receiving surface and a plurality of pixels arranged to face the light-receiving surface. Each of the pixels includes a photoelectric conversion section that photoelectrically converts light incident via the light-receiving surface, a charge-holding section that holds charges transferred from the photoelectric conversion section, a first potential barrier provided between the photoelectric conversion section and the charge-holding section, and a second potential barrier provided around a region including the photoelectric conversion section, the charge-holding section, and a first impurity semiconductor region. The first potential barrier is lower than the second potential barrier.