Abstract: A display device includes a display panel having a front portion and at least one side portion that is bent from at least one side of the front portion. The front portion includes first pixels. The side portion includes second pixels and crack prevention portions that are disposed adjacent to the second pixels. A number of the first pixels per unit area disposed in the front portion is greater than a number of the second pixels per unit area disposed in the at least one side portion.
Type:
Grant
Filed:
October 24, 2023
Date of Patent:
September 30, 2025
Assignee:
SAMSUNG DISPLAY CO., LTD.
Inventors:
Jun Won Choi, Jae Won Kim, Jun Young Min
Abstract: Provided is a display device which comprises a substrate, a plurality of pixels disposed on the substrate, a first initialization voltage line disposed on the substrate along a first direction, and a second initialization voltage line disposed on a different layer from the first initialization voltage line, wherein the second initialization voltage line may include a horizontal portion disposed along the first direction and a vertical portion disposed along a second direction crossing the first direction, and the vertical portion may be disposed between a plurality of pixels adjacent to each other in the first direction.
Type:
Grant
Filed:
June 21, 2024
Date of Patent:
September 16, 2025
Assignee:
Samsung Display Co., Ltd.
Inventors:
Ji Su Na, Won Kyu Kwak, Yang Wan Kim, Young Jin Cho
Abstract: Source/drain silicide that improves performance and methods for fabricating such are disclosed herein. An exemplary device includes a first channel layer disposed over a substrate, a second channel layer disposed over the first channel layer, and a gate stack that surrounds the first channel layer and the second channel layer. A source/drain feature disposed adjacent the first channel layer, second channel layer, and gate stack. The source/drain feature is disposed over first facets of the first channel layer and second facets of the second channel layer. The first facets and the second facets have a (111) crystallographic orientation. An inner spacer disposed between the gate stack and the source/drain feature and between the first channel layer and the second channel layer. A silicide feature is disposed over the source/drain feature where the silicide feature extends into the source/drain feature towards the substrate to a depth of the first channel layer.
Abstract: The present disclosure provides a display panel, including: a base; a light-emitting structure on the base; a package layer on the light-emitting structure; a photoelectric sensing structure on the package layer; at least one of a touch functional layer or a color filter layer on the package layer, where the touch functional layer includes a first metal layer structure, a touch insulation layer and a second metal layer structure, and the color filter layer includes a black matrix; a collimation light path structure on the photoelectric sensing structure and including at least two light-blocking layers, where each light-blocking layer has light-transmitting holes and the at least two light-blocking layers include at least one first light-blocking layer, and the first light-blocking layer is disposed in the same layer as the first metal layer structure, the second metal layer structure, the touch insulation layer or the black matrix.
Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.
Abstract: A method of fabricating a semiconductor device (200) is described. According to a described embodiment, the method comprises: (i) forming a III-V semiconductor material layer (206) comprising a substrate layer (208) and a device layer (210) attached to the substrate layer (208); and (ii) forming an electrically conductive interlayer (228) to the device layer (210) prior to bonding the electrically conductive interlayer (228) to a partially processed CMOS device layer (204) having at least one transistor (205).
Type:
Grant
Filed:
September 25, 2020
Date of Patent:
August 12, 2025
Assignee:
NEW SILICON CORPORATION PTE LTD
Inventors:
Eugene A. Fitzgerald, Kenneth Eng Kian Lee, Cheng Yeow Ng, Fayyaz Moiz Singaporewala
Abstract: A novel light-emitting device that is highly convenient, useful, or reliable is provided. A novel functional panel that is highly convenient, useful, or reliable is provided. The light-emitting device includes an insulating film, a group of structure bodies, a layer containing a light-emitting material, a first electrode, and a second electrode. The group of structure bodies includes a structure body and a different structure body, a first distance is provided between the different structure body and the structure body, the insulating film includes a first surface, the structure body includes a sidewall, the sidewall forms a first angle with the first surface, and the first angle is greater than 0° and less than or equal to 90°.
Type:
Grant
Filed:
June 24, 2020
Date of Patent:
August 12, 2025
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
Abstract: A method includes forming a first, second, third, fourth, fifth, and sixth fin structure. The second fin structure is separated from each of the first and third fin structures by a first distance, the fifth fin structure is separated from each of the fourth and sixth fin structures by the first distance, and the third fin structure is separated from the fourth fin structure by a second distance greater than the first distance. The method includes forming a first dummy gate structure overlaying the first through third fin structures, and a second dummy gate structure overlaying the fourth through sixth fin structures; forming a number of source/drain structures that are coupled to the first, second, third, fourth, fifth, and sixth fin structures, respectively; and replacing the third fin structure with a first dielectric structure, and replacing the fourth fin structure with a second dielectric structure.
Abstract: A display apparatus includes a substrate including a main display area and an auxiliary display area, the auxiliary display area including a component area and a middle area, a main pixel circuit and a main display element connected to the main pixel circuit, the main pixel circuit and the main display element being arranged on the main display area, a first auxiliary display element arranged on the component area, a first auxiliary pixel circuit, a second auxiliary pixel circuit, and a second auxiliary display element connected to the second auxiliary pixel circuit, wherein the first auxiliary pixel circuit, the second auxiliary pixel circuit, and the second auxiliary display element are arranged on the middle area, and a connecting line connecting the first auxiliary display element to the first auxiliary pixel circuit.
Type:
Grant
Filed:
November 19, 2021
Date of Patent:
July 29, 2025
Assignee:
Samsung Display Co., Ltd.
Inventors:
Jiseon Lee, Sungho Kim, Seokje Seong, Jinsung An, Minwoo Woo, Seunghyun Lee, Wangwoo Lee
Abstract: A display device includes a first pixel circuit arranged in a first pixel region and including a first thin-film transistor including a first semiconductor layer; a second pixel circuit arranged in a second pixel region adjacent to the first pixel region, the second pixel circuit including a second thin-film transistor including a second semiconductor layer; a first pixel electrode electrically connected to the first pixel circuit; a second pixel electrode electrically connected to the second pixel circuit; and a shielding member extending in a row direction along a portion of edges of the first pixel electrode and the second pixel electrode.
Abstract: Provided are an array substrate and a manufacturing method of an array substrate and a display panel and device. The array substrate includes a pixel circuit. The pixel circuit includes a first transistor and a second transistor, the first transistor includes a first active layer, the second transistor includes a second active layer, and the first active layer and the second active layer both include silicon. The array substrate further includes a first-type inorganic layer and a second-type inorganic layer and a first via hole. The first via hole is located above the first active layer and at least penetrates through the second-type inorganic layer. Concentration of hydrogen ions in the first active layer is less than concentration of hydrogen ions in the second active layer.
Abstract: According to some embodiments of the present disclosure, a display device includes a substrate, a first electrode and a second electrode on the substrate, and spaced apart from each other, a light emitting element between the first electrode and the second electrode, a first bank pattern and a second bank pattern protruding in a display direction of the display device, a first contact electrode and a second contact electrode electrically connecting the light emitting element to the first electrode and the second electrode, respectively, the first contact electrode including a first contact light-transmitting layer, and a first reflective electrode including a first reflective layer, and a first light-transmitting layer including a same material as the first contact light-transmitting layer, at least a portion of the first reflective electrode being on the first bank pattern.
Type:
Grant
Filed:
March 15, 2022
Date of Patent:
July 15, 2025
Assignee:
Samsung Display Co., Ltd.
Inventors:
Sung Geun Bae, Jang Soon Park, Jeong Hyun Lee, Hyun Wook Lee, Da Sol Jeong, Won Hyeong Heo
Abstract: An electronic device includes: a display panel including a display region including a first display region and a second display region having a higher transmittance than the first display region and an electronic module below the second display region of the display panel, wherein the display panel includes: a base layer; a plurality of first pixel electrodes on the base layer and in the first display region; a plurality of second pixel electrodes on the base layer and in the second display region; a common electrode on the plurality of first pixel electrodes and the plurality of second pixel electrodes and in which a plurality of openings are defined; and a blocking pattern spaced apart from the common electrode with the plurality of second pixel electrodes interposed therebetween and having a plurality of transmission portions overlapping the plurality of openings.
Abstract: A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.
Abstract: Embodiments of the present disclosure disclose a display apparatus, a manufacturing method for a display apparatus, and an electronic device. The display apparatus includes a first display region and a second display region which adjoin each other. A light transmittance of the second display region is smaller than a light transmittance of the first display region. The second display region includes a thin film transistor. A light shielding portion is disposed between the first display region and the second display region to shield the thin film transistor in the second display region from being irradiated by a light signal from the first display region.
Type:
Grant
Filed:
December 7, 2022
Date of Patent:
June 24, 2025
Assignee:
GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
Abstract: To provide a solid-state imaging device and an electronic apparatus with further improved performance. A solid-state imaging device including: a first substrate on which a pixel unit is formed, and a first semiconductor substrate and a first multi-layered wiring layer are stacked; a second substrate on which a circuit having a predetermined function is formed, and a second semiconductor substrate and a second multi-layered wiring layer are stacked; and a third substrate on which a circuit having a predetermined function is formed, and a third semiconductor substrate and a third multi-layered wiring layer are stacked. The first substrate, the second substrate, and the third substrate are stacked in this order. The pixel unit has pixels arranged thereon. The first substrate and the second substrate are bonded together in a manner that the first multi-layered wiring layer and the second semiconductor substrate are opposed to each other.
Type:
Grant
Filed:
February 20, 2024
Date of Patent:
June 17, 2025
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.
Abstract: Discussed is a display device including a substrate, a plurality of first assembling wires on the substrate, a plurality of second assembling wires on the substrate, and separated from the plurality of first assembling wires; a first insulating layer disposed on the substrate, wherein a first hole is located on each of the plurality of second assembling wires, respectively, and wherein the first hole is not located on each of the plurality of first assembling wires; and a semiconductor light emitting device in the first hole.
Type:
Grant
Filed:
November 3, 2021
Date of Patent:
June 10, 2025
Assignees:
LG ELECTRONICS INC., LG DISPLAY CO., LTD.
Inventors:
Myoungsoo Kim, Changseo Park, Minwoo Lee, Jungsub Kim
Abstract: An OLED display substrate, a manufacturing method and a display device are provided. The OLED display substrate includes a base substrate and a plurality of pixel units arranged on the base substrate, each pixel unit includes a plurality of subpixel units, and each subpixel unit includes a switching TFT and a bottom-emission OLED, the OLED display substrate further includes a light-shielding layer arranged between the OLED and the switching TFT, and an orthogonal projection of the light-shielding layer onto the base substrate completely covers an orthogonal projection of a semiconductor region of the switching TFT onto the base substrate.
Type:
Grant
Filed:
July 18, 2023
Date of Patent:
June 10, 2025
Assignee:
BOE TECHNOLOGY GROUP CO., LTD.
Inventors:
Dongfang Wang, Tongshang Su, Ming Wang, Ce Zhao, Bin Zhou
Abstract: A display device includes: a substrate on which circuit elements constituting a pixel are arranged; a repair pattern arranged overlying the substrate; a buffer layer covering the repair pattern; an active layer arranged overlying the buffer layer; a conductive layer which is arranged overlying the active layer and on which electrodes of the circuit elements are arranged; an overcoat layer covering the conductive layer, and a light emitting element arranged overlying the overcoat layer. The repair pattern is arranged in such a manner that one region thereof overlaps the active layer.
Type:
Grant
Filed:
June 12, 2024
Date of Patent:
June 3, 2025
Assignee:
LG Display Co., Ltd.
Inventors:
Juhyuk Kim, Yongsun Jo, Deuksoo Jung, Junggil Lee