Patents Examined by Matthew E. Gordon
  • Patent number: 11825690
    Abstract: A display apparatus and a preparation method thereof, the display apparatus includes a display panel whose display area has a first hole; a polarizer disposed on one side of the display panel, wherein the polarizer has a blind hole, the blind hole penetrates through an optical characteristic layer in the polarizer, and an orthographic projection of the blind hole on the display panel at least partially overlaps with the first hole; a first optical adhesive layer disposed on a surface of the polarizer away from the display panel, wherein the first optical adhesive layer includes a planar portion and a convex portion, and the convex portion is filled in the blind hole; a cover plate disposed on one side of the first optical adhesive layer away from the display panel.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: November 21, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Kang Wang, Xiaodong Hao, Haotian Yang, Xiaoxia Liu, Renzhe Xu, Junhui Yang, Bin Zhang
  • Patent number: 11825706
    Abstract: A display apparatus includes a thin-film transistor located in a display area and including a semiconductor layer and a gate electrode; a storage capacitor located in the display area and including a first capacitor plate, a second capacitor plate, and a dummy capacitor plate overlapping each other; a light-emitting diode electrically connected to the thin-film transistor and the storage capacitor and including a pixel electrode, an interlayer, and a counter electrode; a pad located in a surrounding area adjacent to the display area; a lower electrode pattern layer disposed below the semiconductor layer, at least a portion of the lower electrode pattern layer overlapping the semiconductor layer; and a bridge electrode electrically connecting the semiconductor layer to the lower electrode pattern layer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Youngjae Jeon, Hyunseong Kang, Jongin Kim, Seokhwan Bang, Seungsok Son, Junewhan Choi
  • Patent number: 11824018
    Abstract: Embodiments disclosed herein include electronic packages and methods of fabricating electronic packages. In an embodiment, an electronic package comprises an interposer, where a cavity passes through the interposer, and a nested component in the cavity. In an embodiment, the electronic package further comprises a die coupled to the interposer by a first interconnect and coupled to the nested component by a second interconnect. In an embodiment, the first and second interconnects comprise a first bump, a bump pad over the first bump, and a second bump over the bump pad.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: November 21, 2023
    Inventors: Debendra Mallik, Ravindranath Mahajan, Robert Sankman, Shawna Liff, Srinivas Pietambaram, Bharat Penmecha
  • Patent number: 11817494
    Abstract: A semiconductor device includes an active layer having an active region, a source electrode, a drain electrode, a gate electrode, a source metal layer, a drain metal layer, and a source pad. The source metal layer and the drain metal layer are electrically connected to the source electrode and the drain electrode, respectively. An orthogonal projection of the drain metal layer on the active layer each forms a drain metal layer region. The source pad is electrically connected to the source metal layer. An orthogonal projection of the source pad on the active layer forms a source pad region overlapping the drain metal layer. An area of an overlapping region between the source pad region and the drain metal layer region is smaller than or equal to 40% of an area of the drain metal layer region.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 14, 2023
    Assignee: ANCORA SEMICONDUCTORS INC.
    Inventors: Li-Fan Lin, Chun-Chieh Yang, Ying-Chen Liu
  • Patent number: 11812630
    Abstract: A display device includes a substrate, a switching element on the substrate, a pixel electrode disposed on the switching element and connected to the switching element, a light emitting layer on the pixel electrode, a common electrode on the light emitting layer, and a sealing portion on the common electrode. The sealing portion includes an organic layer, and at least one first composite inorganic layer disposed between the organic layer and the common electrode. The at least one first composite inorganic layer includes a first inorganic layer between the common electrode and the organic layer, and a second inorganic layer between the first inorganic layer and the organic layer. A refractive index of the first inorganic layer and a refractive index of the second inorganic layer are different from each other, and the first inorganic layer and the second inorganic layer contact each other.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: November 7, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wooyong Sung, Junghan Seo, Kwanhyuck Yoon
  • Patent number: 11812631
    Abstract: The electroluminescence display device according to an embodiment of the present specification may include the substrate divided into a display area and a non-display area, the power supply line disposed in the non-display area for supplying power supplied to the display area, the first insulating film disposed on the power supply line and overlapping a part of the power supply line and having an open area where a part of the power supply line is exposed, and the conductive film covering the first insulating film and the power supply line in the open area.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: November 7, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventor: Seokho Shim
  • Patent number: 11805668
    Abstract: A display substrate is provided. The display substrate has a display region and a non-display region disposed around the display region and the display substrate includes a base substrate and a barrier structure disposed on a side of the base substrate. The barrier structure is disposed in the non-display region, and the barrier structure includes a metal structure and a protective layer which are arranged on the substrate in sequence and the protective layer covers the metal structure.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: October 31, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Haoming Lv
  • Patent number: 11791298
    Abstract: The present disclosure relates to a semiconductor package including a first semiconductor chip having a first surface on which first connection pads are disposed, and a second surface on which second connection pads are disposed, and including through-vias connected to the second connection pads; a connection structure disposed on the first surface and including a first redistribution layer; a first redistribution disposed on the second surface; and a second semiconductor chip disposed on the connection structure. The first connection pads are connected to a signal pattern of the first redistribution layer, and the second connection pads are connected to at least one of a power pattern and a ground pattern of the second redistribution layer.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: October 17, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yun Tae Lee, Jung Ho Shim, Han Kim
  • Patent number: 11791203
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection in the first IMD layer; removing part of the first IMD layer; forming a spacer adjacent to the first metal interconnection; forming a second IMD layer on the spacer and the first metal interconnection; and forming a second metal interconnection in the second IMD layer and on the spacer and the first metal interconnection.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: October 17, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Chih Chang, Yuan-Fu Ko, Chih-Sheng Chang
  • Patent number: 11791378
    Abstract: Semiconductor devices include a silicon carbide drift region having an upper portion and a lower portion. A first contact is on the upper portion of the drift region and a second contact is on the lower portion of the drift region. The drift region includes a superjunction structure that includes a p-n junction that is formed at an angle of between 10° and 30° from a plane that is normal to a top surface of the drift region. The p-n junction extends within +/?1.5° of a crystallographic axis of the silicon carbide material forming the drift region.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: October 17, 2023
    Assignee: Wolfspeed, Inc.
    Inventors: Edward Robert Van Brunt, Alexander V. Suvorov, Vipindas Pala, Daniel J. Lichtenwalner, Qingchun Zhang
  • Patent number: 11785829
    Abstract: A display apparatus is described that includes a substrate having a display area and a sensor area, wherein the sensor area includes a transmission area; a plurality of first opposite electrodes arranged to correspond to the display area; and a plurality of second opposite electrodes arranged to correspond to the sensor area and surround the transmission area, wherein a shape of each of the plurality of first opposite electrodes is different from a shape of each of the plurality of second opposite electrodes.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: October 10, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joohee Jeon, Gunhee Kim, Donghyun Kim, Sanghoon Kim, Soohyun Moon, Seungchan Lee, Sungjin Hong, Taehoon Yang
  • Patent number: 11785833
    Abstract: A display apparatus includes a substrate including a display area, a peripheral area outside the display area, and a bending area bendable along a bending axis, and an anti-crack projection disposed in the peripheral area and extending along at least a part of an edge of the substrate. A portion of the anti-crack projection in the bending area is a bending portion. A preset area including the bending portion on the substrate is a first area. A preset area of the substrate disposed outside the first area, having substantially the same area as that of the first area, and including a part of the anti-crack projection is a second area. A portion of the anti-crack projection belonging to the second area is a flat portion. The area occupied by the bending portion in the first area is greater than the area occupied by the flat portion in the second area.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: October 10, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yonghan Park, Sangmin Kim, Dongho Lee, Hyunjung Kim
  • Patent number: 11785823
    Abstract: A quantum dot display panel and a manufacturing method thereof are provided. The quantum dot display panel includes an array substrate; a luminescent layer disposed on the array substrate; an encapsulation layer disposed on the luminescent layer; and a color filter layer disposed on the encapsulation layer. The color filter layer includes a plurality of pixel areas. Each of the plurality of pixel areas includes a plurality of sub-pixel filter layers. Each of the sub-pixel filter layers is made of a quantum dot material. A color of a light excited by the quantum dot material is the same as a color of the sub-pixel filter layer. An upper surface of at least one of the sub-pixel filter layers forms a concave structure. The quantum dot display panel provided by the embodiment of the present disclosure enhances the light extraction rate and the display effect of the quantum dot display panel.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: October 10, 2023
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Dezhi Weng, Gaozhen Wang, Tao Zhang
  • Patent number: 11778875
    Abstract: A display device includes a base substrate including: a display region including a pixel, and a pad region defining an end surface of the base substrate which is furthest from the display region and exposed outside the display panel; an insulating layer in the display region and the pad region; and in the pad region: a signal pad electrically connected to the pixel and to a dummy pad; the insulating layer covering the signal pad and the dummy pad and defining an end surface of the insulating layer which is furthest from the display region and exposed outside the display panel; and a first opening in the insulating layer which exposes the signal pad outside the insulating layer and outside the display panel. In the pad region, the end surfaces of the base substrate and the insulating layer together define an inclined edge of the display panel.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: October 3, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang-Chul Jung, Youngrae Kim, Dong-Yoon So, Kyungmin Park, Samho Ihm, Yongjun Jo
  • Patent number: 11777029
    Abstract: A vertical transistor structure includes a material stack having a source material, a drain material, and a channel material therebetween. The vertical transistor structure further includes a gate electrode adjacent to a sidewall of the stack, where the sidewall includes the channel material, and at least a partial thickness of both the source material and the drain material. A gate dielectric is present between the sidewall of the stack and the gate electrode. The vertical transistor structure further includes a first metallization over a first area of the stack above the gate dielectric layer, and in contact with the gate electrode on sidewall of the stack. A second metallization is adjacent to the first metallization, where the second metallization is over a second area of the stack, and in contact with the source material or the drain material.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: October 3, 2023
    Assignee: Intel Corporation
    Inventors: Nazila Haratipour, I-Cheng Tung, Abhishek A. Sharma, Arnab Sen Gupta, Van Le, Matthew V. Metz, Jack Kavalieros, Tahir Ghani
  • Patent number: 11774401
    Abstract: In one embodiment, a device is described. The device includes a material defining a reaction region. The device also includes a plurality of chemically-sensitive field effect transistors have a common floating gate in communication with the reaction region. The device also includes a circuit to obtain respective output signals from the chemically-sensitive field effect transistors indicating an analyte within the reaction region.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: October 3, 2023
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Keith G Fife, Jordan Owens, James Bustillo
  • Patent number: 11770966
    Abstract: A method of manufacturing a display device includes: providing a first substrate, a second substrate, and a plurality of connection lines, wherein the first substrate has a base substrate, wherein the second substrate faces the first substrate, and wherein the plurality of connection lines are disposed between the base substrate and the second substrate; grinding a side surface of the base substrate, a side surface of the second substrate, and side surfaces of the plurality of connection lines; and simultaneously transferring a conductive film and laser-curing the conductive film, wherein the conductive film is transferred to the ground side surface of the base substrate, the ground side surface of the second substrate, and the ground side surfaces of the plurality of connection lines.
    Type: Grant
    Filed: September 29, 2022
    Date of Patent: September 26, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eui Jeong Kang, Si Joon Song, Byoung Yong Kim, Dae Hyuk Im
  • Patent number: 11770958
    Abstract: The present disclosure generally relates to display technologies. A display substrate includes a first base substrate including a plurality of pixel units arranged in an array, at least one of the plurality of pixel units including at least two sub-pixel units and a transparent area. The at least two sub-pixel units includes a first sub-pixel unit that is arranged between transparent areas of adjacent pixel units in a first direction. An orthographic projection of a pixel drive circuit electrically coupled to the first sub-electrode corresponding to the first sub-pixel unit on the first base substrate partially overlaps with an orthographic projection of a first sub-electrode positionally corresponding to another sub-pixel unit on the first base substrate.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: September 26, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Song, Guoying Wang
  • Patent number: 11756972
    Abstract: According to one example, a device includes a semiconductor substrate. The device further includes a plurality of color filters disposed above the semiconductor substrate. The device further includes a plurality of micro-lenses disposed above the set of color filters. The device further includes a structure that is configured to block light radiation that is traveling towards a region between adjacent micro-lenses. The structure and the color filters are level at respective top surfaces and bottom surfaces thereof.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Min Lin, Ching-Chun Wang, Dun-Nian Yaung, Chun-Ming Su, Tzu-Hsuan Hsu
  • Patent number: 11758770
    Abstract: The present disclosure provides a display panel having a first display area and a second display area, the display panel including: a substrate; a driving device layer on a side of the substrate, including transistors; a first electrode layer in the first display area and on a side of the driving device layer away from the substrate, including first electrodes; a first transparent part in the first display area and between the driving device layer and the first electrode layer, including first padding layers, which are electrically connected to the transistors; and a second transparent part in the first display area and between the first transparent part and the first electrodes, including second padding layers for connecting to the first padding layers, that the transistors transmit signals to the first electrodes through the first padding layers and the second padding layers.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: September 12, 2023
    Assignee: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Guofeng Zhang, Junqiang Wang