Abstract: A display device comprises a substrate; a driving transistor including a first active layer and a switching transistor including a second active layer, the first active layer and the second active layer being disposed on the substrate; a first gate insulating layer disposed on the first active layer of the driving transistor and the second active layer of the switching transistor; first and second gate electrodes disposed on the first gate insulating layer to overlap the first active layer of the driving transistor and the second active layer of the switching transistor, respectively; a first interlayer insulating layer disposed on the first gate electrode and the second gate electrode; and a second interlayer insulating layer disposed on the first interlayer insulating layer to overlap the first active layer without overlapping the second active layer in a plan view.

Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes a substrate, a resistance reducing trace, an inter-layer-medium layer and a signal line. The substrate is divided into a plurality of sub-pixel regions and a pixel separating region. The resistance reducing trace is provided on the pixel separating region of the substrate. The inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace. The signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.

Abstract: A manufacturing method of a display device includes providing a first organic layer in a display area and a non-display area, to cover a pixel electrode and a pad electrode, respectively, providing a first electrode of a light emitting element, in the display area, the first organic layer being between the pixel electrode and the first electrode, after forming the first electrode, removing a portion of the first organic layer which is in the non-display area, to expose the pad electrode from the first organic layer; and providing a light emitting layer of the light emitting element, corresponding to the first electrode.

Abstract: An electronic device includes a first substrate, a plurality of light emitting elements each having a horizontal length and a vertical length which are less than or equal to about 10 micrometers (?m), each of the plurality of light emitting elements being disposed on the first substrate, a quantum dot color filter layer disposed on the plurality of light emitting elements, and a first overcoat layer between a plurality of light emitting elements and the quantum dot color filter layer. The quantum dot color filter layer includes a plurality of quantum dot color filters partitioned by a plurality of first partition walls so as to be overlapped with the plurality of light emitting elements, respectively.

Abstract: A display device includes: a first active pattern on a light blocking pattern; a second active pattern at a same layer as that of the first active pattern; a first insulating pattern on the first active pattern; a second insulating pattern on the first active pattern, the second insulating pattern being spaced from the first insulating pattern, and having a first contact hole exposing the first active pattern; a first gate electrode on the first insulating pattern; a second gate electrode at a same layer as that of the first gate electrode, and overlapping with the second active pattern; a first etch stopper on the second insulating pattern, and having a second contact hole connected to the first contact hole; and a first electrode on the first etch stopper, the first electrode contacting the light blocking pattern and the first active pattern through the first and second contact holes.

Abstract: A display device includes a substrate including a display area and a test area adjacent to the display area, a lower electrode disposed in the display area on the substrate, a common layer disposed on the lower electrode, an upper electrode disposed on the common layer; and a test element group. The test element group includes a plurality of electrode patterns disposed in a same layer as the lower electrode and in the test area on the substrate, a test common layer disposed in a same layer as the common layer and on the electrode patterns, where a plurality of openings is defined through the test common layer to expose a part of each of the electrode patterns, and an electrode layer disposed in a same layer as the upper electrode, on the test common layer, and in contact with the electrode patterns through the openings.

Abstract: An apparatus includes a semiconductor-based substrate with a functional structure that is formed in or on the semiconductor-based substrate. The apparatus includes a frame structure surrounding the functional structure and includes a coating that covers the functional structure and is delimited by the frame structure.

Abstract: A method of manufacturing a display panel includes forming a circuit layer including a gate, a source, and a drain on a base substrate and forming a light emitting element layer on the circuit layer. The forming of the circuit layer includes sequentially forming a preliminary metal layer, a preliminary oxide layer comprising molybdenum and tantalum, and a preliminary capping layer which comprise a preliminary electrode layer, cleaning the preliminary electrode layer, forming a photoresist layer pattern on the preliminary electrode layer, etching the preliminary electrode layer, and removing the photoresist layer pattern. During the etching of the preliminary electrode layer, a ratio between a removal speed ER1 of the preliminary oxide layer and a removal speed ER2 of the preliminary metal layer satisfies Equation 1 to maintain a low reflection property 1?ER2/ER1?3.

Abstract: A display device, a display panel, and a manufacturing method thereof are provided. The display panel includes: a display substrate comprising a display region, wherein an opening region and an isolation region surrounding the opening region are arranged within the display region; a light-emitting layer formed on the display region; a blocking layer formed on a surface of the light-emitting layer away from the display substrate; and a first packaging layer covering the light-emitting layer and the blocking layer, wherein the first packaging layer is patterned through a photoresist layer to form a first through hole on the first packaging layer; a second through hole is respectively formed at a part of the blocking layer corresponding to the first through hole and at a part of the light-emitting layer corresponding to the first through hole.

Abstract: An imaging device includes a first structure 20, and a second structure 40, in which the first structure 20 includes a first substrate 21, a temperature detection element which is formed on the first substrate 21 and detects a temperature on the basis of an infrared ray, a signal line 71, and a drive line 72, the second structure 40 includes a second substrate 41, and a drive circuit provided on the second substrate 41 and covered with a covering layer 43, the first substrate 21 and a second electrode 41 are stacked, the signal line 71 is electrically connected with the drive circuit via a signal line connection portion 100, the drive line is electrically connected with the drive circuit via a drive line connection portion, and the signal line connection portion 100 includes a first signal line connection portion 102 formed in the first structure 20 and a second signal line connection portion 106 formed in the second structure 40.

Abstract: A display device includes a first display substrate including a light emitting element which emits light of a first color or light of a second color different from the first color, a second display substrate including in order toward the first display substrate, a layer including both a bank layer defining an opening and a wavelength control pattern in the opening, a capping layer covering the wavelength control pattern and the bank layer, and a color absorbing layer which corresponds to the bank layer and blocks the light of the first color and the light of the second color. The capping layer includes a first area corresponding to the color absorbing layer, the bank layer includes a second area corresponding to the color absorbing layer, and the first area of the capping layer is between the color absorbing layer and the second area of the bank layer.

Abstract: A method for manufacturing a display apparatus can include providing a first gate electrode on a substrate; providing a first active layer which overlaps with a portion of the first gate electrode; providing a second active layer on the substrate spaced apart from the first active layer; providing a first source electrode and a first drain electrode connected with the first active layer; providing a second gate electrode which overlaps with at least a portion of the second active layer; providing a second source electrode and a second drain electrode connected with the second active layer. Also, the method includes selectively providing conductivity to the second active layer, in which the first source electrode, the first drain electrode, the second gate electrode, the second source electrode, and the second drain electrode are manufactured at a same time.

Abstract: The present disclosure provides a display panel including: a first substrate, a light-emitting element array and a color-conversion layer array, the light-emitting element array includes a plurality of light-emitting elements, the color-conversion layer array includes a plurality of color-conversion layers, the light-emitting elements are used for generating and emitting first color light, the color-conversion layers are used for generating other color light under excitation of the first color light, and the display panel further includes a first band-pass filtering layer between the light-emitting element array and the color-conversion layer array and/or a second band-pass filtering layer positioned on one side, away from the light-emitting element array, of the color-conversion layer array.

Abstract: A process for manufacturing MEMS devices, includes forming a first assembly, which comprises: a dielectric region; a redistribution region; and a plurality of unit portions. Each unit portion of the first assembly includes: a die arranged in the dielectric region; and a plurality of first and second connection elements, which extend to opposite faces of the redistribution region and are connected together by paths that extend in the redistribution region, the first connection elements being coupled to the die. The process further includes: forming a second assembly which comprises a plurality of respective unit portions, each of which includes a semiconductor portion and third connection elements; mechanically coupling the first and second assemblies so as to connect the third connection elements to corresponding second connection elements; and then removing at least part of the semiconductor portion of each unit portion of the second assembly, thus forming corresponding membranes.

Abstract: In some example embodiments, a back side illumination (BSI) image sensor may include a pixel configured to generate electrical signals in response to light incident on a back side of a substrate. In some example embodiments, the pixel includes, a photodiode, a device isolation film adjacent to the photodiode, a dark current suppression layer above the photodiode, a light shield grid above the photodiode and including an opening area of 1 to 15% of an area of the pixel, a light shielding filter layer above the light shield grid, a planarization layer above the light shielding filter layer, a lens above the planarization layer, and/or an anti-reflective film between the photodiode and the lens.

Abstract: A semiconductor device includes a MOSFET including a PN junction diode. A unipolar device is connected in parallel to the MOSFET and has two terminals. A first wire connects the PN junction diode to one of the two terminals of the unipolar device. A second wire connects the one of the two terminals of the unipolar device to an output line, so that the output line is connected to the MOSFET and the unipolar device via the first wire and the second wire. In one embodiment the connection of the first wire to the diode is with its anode, and in another the connection is with the cathode.

Abstract: A display device may include a display panel having a first region and a second region having a transmittance lower than a transmittance of the first region, the display panel including a substrate and a pixel layer disposed on the substrate, and an anti-reflection layer disposed on one side of the substrate in an area corresponding to the first region. The anti-reflection layer may include a first anti-reflection pattern including first metal and a second anti-reflection pattern disposed on the first anti-reflection pattern and including molybdenum oxide (MoOx) and oxide of second metal other than molybdenum.

Abstract: Methods and apparatus relating to FET arrays for monitoring chemical and/or biological reactions such as nucleic acid sequencing-by-synthesis reactions. Some methods provided herein relate to improving signal (and also signal to noise ratio) from released hydrogen ions during nucleic acid sequencing reactions.

Abstract: A method is provided, including the following operations: arranging a first gate structure extending continuously above a first active region and a second active region of a substrate; arranging a first separation spacer disposed on the first gate structure to isolate an electronic signal transmitted through a first gate via and a second gate via that are disposed on the first gate structure, wherein the first gate via and the second gate via are arranged above the first active region and the second active region respectively; and arranging a first local interconnect between the first active region and the second active region, wherein the first local interconnect is electrically coupled to a first contact disposed on the first active region and a second contact disposed on the second active region.

Abstract: There is a problem that an area of a principal current cell is reduced by an area of a bonding pad wiring layer for a sub-cell. A source electrode 9b of a current detection cell 22 is electrically connected to a bonding pad wiring layer 12 formed on an interlayer insulating film 10 via a wiring layer contact 11. The bonding pad wiring layer 12 is formed with respect to a source electrode 9a of a principal current cell 21 so as to cover a part of the source electrode 9a via the interlayer insulating film 10. As a result, the source electrode 9b is miniaturized, and a size of the source electrode 9b is made substantially equal to a size of the current detection cell 22. Therefore, the current detection cell 22 and the principal current cell 21 are disposed close to each other.