Abstract: Disclosed are display panels and methods of manufacturing substrates. The display panel comprises a lower display substrate that includes a plurality of light emitting elements, and an upper display substrate that includes a color control layer and is on the lower display substrate. The color control layer includes a plurality of walls each of which includes a wall base including an organic material and a reflective layer including a metallic material, and the color control layer also includes a plurality of color control parts which are disposed between the plurality of walls and at least one of which includes a quantum dot. The reflective layer surrounds at least a portion of a sidewall of the wall base, which results in an increase in luminous efficiency and an improvement in brightness.

Abstract: A display device includes a substrate where a pixel is placed, and including an emission area and a wire area adjacent to the emission area; at least one wire formed on the substrate in the wire area; multiple insulation layers formed on the at least one wire; an anode electrode formed on the multiple insulation layers in the emission area; an emission layer formed on the anode electrode, and covering the anode electrode; and a cathode electrode formed on the emission layer, wherein the at least one wire formed on the substrate applies a signal to the pixel, the multiple insulation layers cover the at least one wire, and at least one of the multiple insulation layers is formed in a region of the substrate except at least one region or all regions of the emission area.

Abstract: A display device includes a first substrate and a second substrate, and the first substrate includes a plurality of connection lines disposed to extend to an end of the first substrate and a plurality of pads disposed on a side surface of the first substrate and electrically connected to the plurality of connection lines, respectively. Each of the plurality of connection lines includes a first area and a second area extending from the first area, the first area has a width greater than a width of the second area, and the width of the second area is substantially the same as a width of each of the plurality of pads.

Abstract: An OLED display substrate, a manufacturing method and a display device are provided. The OLED display substrate includes a base substrate and a plurality of pixel units arranged on the base substrate, each pixel unit includes a plurality of subpixel units, and each subpixel unit includes a switching TFT and a bottom-emission OLED, the OLED display substrate further includes a light-shielding layer arranged between the OLED and the switching TFT, and an orthogonal projection of the light-shielding layer onto the base substrate completely covers an orthogonal projection of a semiconductor region of the switching TFT onto the base substrate.

Abstract: The present disclosure describes heat dissipating structures that can be formed either in functional or non-functional areas of three-dimensional system on integrated chip structures. In some embodiments, the heat dissipating structures maintain an average operating temperature of memory dies or chips below about 90° C. For example, a structure includes a stack with chip layers, where each chip layer includes one or more chips and an edge portion. The structure further includes a thermal interface material disposed on the edge portion of each chip layer, a thermal interface material layer disposed over a top chip layer of the stack, and a heat sink over the thermal interface material layer.

Abstract: A display device includes: a substrate; a first semiconductor layer disposed on the substrate, where the first semiconductor layer includes a channel region and a doped region; a first gate electrode disposed to overlap the channel region of the first semiconductor layer; an intermediate film disposed on the first semiconductor layer and the first gate electrode; and a first electrode disposed on the intermediate film, where an opening is defined through the intermediate film to overlap the doped region of the first semiconductor layer, the doped region of the first semiconductor layer and the first electrode contacts each other through the opening, and an area of a cross-section of the opening parallel to the substrate is in a range of about 49 ?m2 to about 81 ?m2.

Abstract: Semiconductor devices fabrication method is provided. The method for fabricating the semiconductor device includes: providing a semiconductor substrate; forming a gate structure on a surface of the semiconductor substrate; forming protective sidewall spacers on sidewall surfaces of the gate structure and to cover sidewall surfaces of the gate dielectric layer; forming sacrificial sidewall spacers on sidewall surfaces of the protective sidewall spacers and between the protective sidewall spacers and the gate structure; forming a first dielectric layer on the surface of the semiconductor substrate around the gate structure, the protective sidewall spacers and the sacrificial sidewall spacers; forming conductive plugs in the first dielectric layer at opposite sides of the gate structure, the protective sidewall spacers and the sacrificial sidewall spacers; and removing the sacrificial sidewall spacers to form air gap spacers between the protective sidewall spacers and the conductive plugs.

Abstract: The present disclosure provides an array substrate, a method for manufacturing the array substrate and a display device, and belongs to the field of display technology. The array substrate of the present disclosure includes: a base substrate; a light-blocking layer disposed on the base substrate; a thin film transistor disposed on the light-blocking layer; an organic light-emitting diode which is disposed on the light-blocking layer and has a first electrode coupled to a drain electrode of the thin film transistor; the light-blocking layer is provided with a plurality of scattering particles, and orthographic projections of at least a portion of the scattering particles on the base substrate are overlapped with an orthographic projection of the organic light-emitting diode on the base substrate, so as to scatter light emitted from the organic light-emitting diode.

Abstract: An electronic device may include a window, a display panel disposed below the window, a supporting member disposed below the display panel, and a light-blocking layer disposed on the supporting member. The light-blocking layer may include a light-blocking material, and the light-blocking layer may be directly disposed on the supporting member or may be directly attached to the supporting member by a light-blocking adhesive layer. Thus, the electronic device has an improved impact resistance property and may prevent reflection of an external light.

Abstract: A field effect transistor has a semiconductor layer with a top surface extending in a horizontal plane, and an active area defined in which are trench gate regions, which extend in depth with respect to the top surface and have an insulating coating layer and a conductive inner layer, and source regions, adjacent to the trench gate regions so as to form a conductive channel extending vertically. The trench gate regions have a plurality of first gate regions, which extend in length in the form of stripes through the active area along a first direction of the horizontal plane, and moreover a plurality of second gate regions, which extend in length in the form of stripes through the same active area along a second direction of the horizontal plane, orthogonal to, and crossing, the first gate regions. In particular, the first gate regions and second gate regions cross in the active area, joining with a non-zero curvature radius.

Abstract: Embodiments disclosed herein include electronic packages and methods of fabricating electronic packages. In an embodiment, an electronic package comprises an interposer, where a cavity passes through the interposer, and a nested component in the cavity. In an embodiment, the electronic package further comprises a die coupled to the interposer by a first interconnect and coupled to the nested component by a second interconnect. In an embodiment, the first and second interconnects comprise a first bump, a bump pad over the first bump, and a second bump over the bump pad.

Abstract: In a transparent display panel, a GIP region acts as a transmissive region, thereby increasing or maximizing a transmissive area in the GIP region. To this end, a line for VSS voltage application is disposed in a display region. Thus, a non-transparent thick line for applying the VSS voltage is not disposed in an upper portion of a GIP circuit region. Thus, a transparent bezel in which the GIP region acts as the transmissive region is implemented. Further, a GIP input signal line region and a GIP output signal line region constitute different layers, thereby to maximize a spacing between GIP input signal lines, resulting in increasing or maximizing a transmissive area in the GIP circuit region.

Abstract: A method for forming a sensor is provided. The method includes: providing an active region comprising a channel having: a length, and a periphery consisting of one or more surfaces having said length, said periphery comprising a first part and a second part, each part having said length, the first part representing from 10 to 75% of the area of the periphery and the second part representing from 25 to 90% of the area of the periphery; providing a first dielectric structure on the entire first part, the first dielectric structure having a maximal equivalent oxide thickness; and providing a second dielectric structure on the entire second part, the second dielectric structure having a minimal equivalent oxide thickness larger than the maximal equivalent oxide thickness of the first dielectric structure.

Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment a semiconductor device comprises a first interlayer dielectric (ILD), a plurality of source/drain (S/D) contacts in the first ILD, a plurality of gate contacts in the first ILD, wherein the gate contacts and the S/D contacts are arranged in an alternating pattern, and wherein top surfaces of the gate contacts are below top surfaces of the S/D contacts so that a channel defined by sidewall surfaces of the first ILD is positioned over each of the gate contacts, mask layer partially filling a first channel over a first gate contact, and a fill metal filling a second channel over a second gate contact that is adjacent to the first gate contact.

Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device. The display substrate includes a planarization layer located on a base substrate and a first electrode layer located on the planarization layer, a side of the planarization layer away from the base substrate includes a scattering structure, the first electrode layer is located on the scattering structure, and a thickness of the first electrode layer is substantially identical.

Abstract: A display apparatus includes a first pixel, a second pixel, and a third pixel which emit light of different colors from one another, a first insulating layer on a first display element of the first pixel, and a second insulating layer on the first insulating layer. The first insulating layer defines a first opening portion corresponding to the first display element, the second insulating layer defines a first opening corresponding to the first opening portion, and the first opening portion has a first extension portion which extends in a first direction and at least partially exposes the second insulating layer.

Abstract: A display device includes a base layer including an active area and a peripheral area outside the active area, a circuit element layer including a pixel circuit in the active area and a driving voltage wiring located in the peripheral area to supply a driving voltage to the pixel circuit. A light emitting element layer including a plurality of light emitting elements on the circuit element layer, a thin film sealing layer to cover the light emitting element layer, and an input sensing layer on the thin film sealing layer and including a sensing electrode and a sensing signal wiring part connected to the sensing electrode. The circuit element layer includes a connection wiring part overlapping the driving voltage wiring in the peripheral area and contacts the sensing signal wiring part. The connection wiring part is at a different layer from the driving voltage wiring.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: Provided are a display device and a method of manufacturing the display device. The display device includes a substrate including a display area and a peripheral area outside the display area, a plurality of data lines disposed in the display area, a plurality of lines disposed in the display area, respectively connected to the plurality of data lines, and configured to respectively transmit a data signal from a driving circuit disposed in the peripheral area to the plurality of data lines, an insulating layer covering the plurality of lines; and a light-emitting element disposed on the insulating layer, wherein each of the plurality of lines comprises a plurality of branches branched in a direction crossing an extending direction of the line, and a black layer is disposed on an insulating layer at a position corresponding to an interval between a plurality of adjacent branches in a vertical direction.

Abstract: An array substrate, a manufacturing method thereof and a display panel are provided. The array substrate includes sub-pixel units, and each sub-pixel unit includes a light emitting region and a non-light emitting region; each sub-pixel unit includes a light emitting element, the light emitting element includes a light emitting layer and a first electrode, and at least a part of the first electrode is in the light emitting region. A plurality of first wires are configured to supply a power signal to the light emitting element and include a first sub-wire; the first sub-wire includes a plurality of portions, adjacent two of the plurality of portions are spaced apart from each other by an opening in the light emitting region; at least a part of an orthographic projection of the opening on the array substrate does not overlap with an orthographic projection of the first electrode on the array substrate.