Abstract: Fluorine-doped oxide is formed that is resistant to water absorption by the use of two sources of silicon, one being the fluorine precursor and the other being available to react with excess fluorine from the fluorine precursor, thereby reducing the number of fluorine radicals in the layer; the fluorine precursor containing a glass-forming element that combines with the other glass constituents to carry into the gas a diatomic radical containing one atom of fluorine and one atom of the glass-forming element.

Abstract: A plurality of wafers are placed on a boat, and the boat is inserted into a reactor. The reactor is heated by a heater, thereby heating the inserted wafers. Then, air is supplied between the reactor and the heater through the fan nozzles of a fan unit, thereby cooling the heater quickly at a rate of 17.degree. C./min. PH.sub.3 and SiH.sub.4 gases are introduced into the reactor through first and second gas nozzles, only while the average temperature of a peripheral portion of each wafer remains 30.degree. C. lower than that of a central portion of the same. Thereafter, when the temperature difference between the peripheral and central portions has become lower than 30.degree. C., the supply of PH.sub.3 and SiH.sub.4 gases is stopped. Thus, a polycrystal silicon film is formed on each wafer.

Abstract: Patterns or circuits of semiconductors or metals are produced with dimensions at least as small as 7 nm using nanocrystalline precursors. The substrate is masked with an electron beam sensitive layer and a pattern is traced using a focused electron beam. Exposure to a source of nanocrystalline material and dissolution of the mask material produces patterned features of nanocrystals. The sample may then be heated to form a bulk thin film or left unheated, preserving the electronic properties of the isolated particles. The process is repeatable with different materials to build laminar structures of metals, semiconductors and insulators.

Abstract: The present invention relates to a film forming method of forming a silicon containing insulating film by plasma CVD. Objects of the present invention are to form, using a highly safe reaction gas, an insulating film which is dense, has excellent step coverage and is low in moisture and in organic residues such as carbon. The insulating film has good affinity for the silicon oxide film formed by the thermal CVD method. The invention also enables control of the refractive index and stress etc. of the insulating film formed. The mixed gas, including the organic compound having Si-H bonds and the oxidizing gas, is converted to a plasma and the silicon containing insulating film is formed on a deposition substrate from the plasma.

Abstract: An improved process for planarization of an integrated circuit structure having raised portions is provided. A conformal insulating layer is deposited over the structure. Next, a sacrificial dielectric layer is formed over the insulating layer. A planarization layer is formed over the dielectric layer. Then, parts of the planarization layer, dielectric layer, and insulating layer are etched to planarize said integrated circuit structure using an etch chemistry which provides for an uniform etch rate through all three layers. The sacrificial dielectric layer and the etch chemistry provide uniform etching by eliminating micro loading effects.

Abstract: Deposition or etching of a layer on a substrate is monitored by impinging P-polarized light on the layer during deposition at an angle which is approximately the Brewster's angle for the substrate, and detecting radiation which is reflected from the structure during deposition. In heterodeposition, a quarter wavelength interference signal having a predetermined periodicity is monitored. Maxima and/or minima in the quarter wavelength ratio are monitored and an amplitude modulated fine signal which is superimposed on the quarter wavelength interference signal is also monitored. The deposition process is controlled based on the monitored quarter wavelength interference signal, ratio of the maxima and/or minima, fine signal, fine signal amplitude modulation and/or combinations thereof by comparing the signals to a reference derived from mathematical models or empirical data. A heterodeposition or etching can also be used to calibrate a homodeposition or etching.

Abstract: There is provided an electronic device like a TFT using a silicon nitride insulating film of a single layer structure having an excellent dielectric voltage, and a method of producing the electronic device with reliability. In the electronic device, a conductive wiring pattern is deposited on a surface of an electrically insulated substrate, and an insulating layer is formed to cover the wiring pattern and the substrate. The insulating layer is made of a silicon nitride insulating film. A contact angle .theta. between the wiring pattern and the substrate is equals 60.degree. or more, and a value Tn1/Tg of a thickness Tn1 of the silicon nitride insulating film and a thickness Tg of the wiring pattern equals 2 or more. A horizontal distance Tn2 between a rise start position, where the silicon nitride film rises because of a step of the wiring pattern and the top end of the wiring pattern, and Tn1 are in a relation where 0.6.ltoreq.Tn2/Tn1.

Abstract: A method for bonding a silicon substrate and a glass substrate through an anodic-bonding process, including steps of: forming at least two holes in the glass substrate; forming a recess on the glass substrate, the recess confronting an undesired bonding portion defined in the silicon substrate; depositing a metal layer on the glass substrate with a predetermined pattern; depositing a dielectric layer on the metal layer, the insulating layer covering substantially the entire surface of the metal layer; and bonding the glass substrate and the semiconductor material.

Abstract: A method of forming a silicate glass film including phosphorus on a titanium silicide film is provided wherein a silicate glass film including phosphorus is formed on a titanium silicide film and thereafter the silicate glass film is subjected to a heat treatment at a temperature in the range from 650.degree. C. to 950.degree. C. for a time in the range from 20 to 70 seconds to cause a fineness reaction of the silicate glass film and suppress a cohesion reaction of the titanium silicide film.

Abstract: A method of planarizing an insuating film includes the steps of preparing a semiconductor substrate; treating an uneven surface of the substrate with an organic solvent; forming an insulating film on the thus-treated surface of the substrate by a chemical vapor deposition using an organic silicon compound as a raw material or depositing SOG, forming an etching stop film having a chemical mechanical polishing etching speed slower than that of the insulating film by depositing silicon oxide or silicon oxynitride by performing a chemical vapor deposition using an inorganic silicon compound as a raw material; and etching back at least a part of the insulating film formed on the uneven surface of the substrate by a chemical mechanical polishing process using the etching stop film.

Abstract: There is disclosed a silicon field emission emitter and a method for making a silicon field emission emitter which has a good electronic characteristic and a simplified making process. The silicon field emission emitter in accordance with the embodiment of the present invention includes a silicon substrate of high density, an insulating layer on the silicon substrate of high density, a cavity formed in the insulating layer, an emitter formed with the silicon substrate of high density in a body in the cavity, and a gate electrode formed on the insulating layer. The insulating layer is made of the thermal oxide film having the thickness of 4000 angstroms and the gate electrode coats the emitter tip.

Abstract: A silicon oxide film is formed by a CVD process, with the use of a silane group gas and water as a main feed gas. Further, a film including silanol is formed by the plasma CVD process with a specific plasma energy, using the silane group gas and water as the main feed gas. The specific plasma energy is selected at 40 (W.multidot..degree.C./cm.sup.2) or below. By annealing this film including silanol, or by performing the oxygen plasma process or the ammonia plasma process, the oxide film or the nitride film is formed.

Abstract: A method is provided for forming a planarization structure of dielectrical materials upon a substrate topography. The dielectric materials are deposited as first and second insulating layers. The second, and then the first insulating layers are partially removed by chemical-mechanical polish (CMP). Prior to CMP, the second insulating layer of variable chemical and mechanical properties can be fixed at a preferred chemical or mechanical characteristic which makes it more or less susceptible to subsequent CMP. Accordingly, the present invention utilizes a second insulating layer of adjustable properties necessary to more adequately planarize during application of CMP.

Abstract: A polysilicon layer is deposited on a gate insulating film covering the surface of a semiconductor substrate, and thereafter the polysilicon layer is subjected to an impurity doping process in an oxidization atmosphere with heating, to reduce the resistance of the polysilicon layer, and to oxidize the surface of the polysilicon layer and form a silicon oxide film. The silicon oxide film is selectively etched to leave an etching mask. Thereafter, the polysilicon layer is selectively etched to leave an electrode layer or wiring layer by using etching gas not containing carbon and fluorine and using the etching mask. It is possible to obtain a high etching selection ratio with simple processes.

Abstract: A method of processing a semiconductor substrate includes the step of subjecting a semiconductor substrate to a heat treatment under a gaseous atmosphere. The method comprises the step of subjecting a semiconductor substrate to a high temperature heat treatment at temperatures not lower than 1100.degree. C. under a non-oxidizing atmosphere, wherein heat treatments before the high temperature heat treatment applied to the semiconductor substrate are applied under heat treating temperatures and heat treating time which fall within a region defined by a line connecting four points of (900.degree. C., 4 minutes), (800.degree. C., 40 minutes), (700.degree. C., 11 hours) and (600.degree. C., 320 hours) in a graph, in which the heat treating temperature is plotted on the abscissa and the heat treating time is plotted on the ordinate of the graph.

Abstract: An ellipsometric method for process control in the context of device fabrication is disclosed. An ellipsometric signal is used to provide information about the device during the fabrication process. The information is used to better control the process. An ellipsometric signal of a particular wavelength is selected. The signal is selected based on the composition and thickness of the films on the substrate through which the ellipsometric signal will pass before it is reflected from the substrate. Once the appropriate wavelength is determined, the ellipsometric signal is used to monitor the thickness of the films on the substrate over time, to assist in controlling the deposition and removal of films on the substrate, and to perform other process control functions in the context of device fabrication. The ellipsometric method is used to control the deposition and removal of films that underlie patterned masks with aspect ratios of 0.

Abstract: Tungsten plugs are formed in a manner which avoids the formation of unwanted tungsten volcanoes by depositing at least three and preferably five to seven layers of tungsten within a contact hole to form a layered plug. In particularly useful embodiments, the layers are deposited at alternating fast and slow rates of deposition.

Abstract: A method for making a field emission cathode in layers by first forming a conical-section shaped layer, a truncated buffer layer, and on top of it forming a cathode conical-tip-shaped layer so that the cathode yields a uniform emission brightness and is capable of emitting electrons for a long time, and so that the cathode is not prone to tip breakage when current is excessively applied only to a portion of the cathode.

Abstract: Processes (30, 40) have been developed for forming nitride films (35, 45, 37, 47) at low temperatures and at near atmospheric pressure on sample materials 12, including metals, for example, Co, Cr, Fe, Mo, Si, Ta, Ti, V, and W, and including group IV and group III-V semiconductors, for example, Si and GaAs, respectively. The processes (30, 40) are performed using a reaction system (10) which comprises a reactor (11) enclosed within a dry box (13), a hydrazine bubbler (18), gas sources (14a-14e), and an optional gas disposal system (22) for disposing of exhaust from the reactor (11). The surface of the sample material (12) is initially cleaned to remove any oxides and carbon compounds. The surface is then maintained at a temperature between 0.degree. and 400.degree. C. and at a pressure between 0.001 and 10,000 Torr. The surface is treated with hydrazine by introducing the hydrazine in a gaseous phase over the surface.

Abstract: A technique is described for the preparation of a thin film of a silicon nitride diffusion barrier to gallium on a silicon integrated circuit chip. The technique involves reacting nitrogen and silane in a ratio of 53:1 to 300:1 in a plasma enhanced chemical vapor deposition apparatus. The described technique is of interest for use in the monolithic integration of interconnected GaAs/AlGaAs double heterostructures, modulators and silicon MOSFET structures.