Patents Examined by Mehdi Namazi
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Patent number: 11150807Abstract: Embodiments herein provide for dynamic storage system configuration. In one embodiment, a storage controller is operable to configure a storage volume from a plurality of storage devices. The storage controller includes an interface operable to receive a first write I/O request from a host system, and to extract a storage configuration attribute from the first write I/O request. The storage controller also includes a processor communicatively coupled to the interface and operable to identify a storage configuration required by the first write I/O request based on the storage configuration attribute, to determine whether the storage volume comprises the required storage configuration of the first write I/O request, and to configure a portion of the storage volume according to the storage configuration required by the first write I/O request in response to a determination that the storage volume does not comprise the required storage configuration.Type: GrantFiled: February 23, 2015Date of Patent: October 19, 2021Assignee: Avago Technologies International Sales Pte. LimitedInventors: Naveen Krishnamurthy, Sridhar Rao Veerla, Basavaraj G. Hallyal
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Patent number: 10496304Abstract: A system for allocation of one or more data structures used in a program across a number of processing units takes into account a memory access pattern of the data structure, and the amount of total memory available for duplication across the several processing units. Using these parameters duplication factors are determined for the one or more data structures such that the cost of remote communication is minimized when the data structures are duplicated according to the respective duplication factors while allowing parallel execution of the program.Type: GrantFiled: January 4, 2016Date of Patent: December 3, 2019Assignee: Reservoir Labs, Inc.Inventors: Muthu M. Baskaran, Thomas Henretty, Ann Johnson, Athanasios Konstantinidis, M. H. Langston, Janice O. McMahon, Benoit J. Meister, Paul D. Mountcastle, Aale Naqvi, Benoit Pradelle, Tahina Ramananandro, Sanket Tavarageri, Richard A. Lethin
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Patent number: 10365938Abstract: Systems and methods for managing data input/output operations are described that include virtual machines operating with a shared storage within a host. In such a system, a computer-implemented method is provided for dynamically provisioning cache storage while operating system applications continue to operate, including stalling the virtual machine's local cache storage operations, changing the provision of cache storage size; and resuming the operations of the virtual machine.Type: GrantFiled: November 5, 2015Date of Patent: July 30, 2019Assignee: SANDISK TECHNOLOGIES LLCInventors: Vikram Joshi, Yang Luan, Manish R. Apte, Hrishikesh A. Vidwans, Michael F. Brown
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Patent number: 10331378Abstract: A method of operating a memory module can include receiving, at the memory module, an active command and an associated row address that indicates that the active command is directed to a volatile memory device included in the memory module or to a non-volatile memory device included in the memory module. The volatile memory device or the non-volatile memory device can be activated based on the associated row address in response to the active command. Status information can be provided at the memory module indicating readiness of the memory module for receipt of an operation command associated with the active command and the associated row address.Type: GrantFiled: June 21, 2016Date of Patent: June 25, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Youngjin Cho, Hee Hyun Nam, Hyo-Deok Shin, Junghwan Ryu
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Patent number: 10303619Abstract: A method and an apparatus for determining a physical address are disclosed. According to the present disclosure, a page size is obtained according to the higher-order N bits of a linear address, where N is greater than 0 and less than a quantity of bits of the linear address; an index number of a translation lookaside buffer TLB is obtained according to the page size; a mask is obtained according to the page size and a supported minimum page size; a label of the TLB is obtained according to the mask; the higher-order MAC1 bits of a physical address corresponding to the linear address are obtained by searching the TLB according to the index number and the label; and the physical address is obtained according to the mask, the supported minimum page, and the higher-order MAC1 bits of the physical address.Type: GrantFiled: November 25, 2015Date of Patent: May 28, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Lixin Zhang, Ke Zhang, Yi Zhang, Lele Zhang
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Patent number: 10289334Abstract: A valid data merging method, a memory controller and a memory storage apparatus are provided. The method includes: grouping physical erasing units in a data area to at least a first group and a second group; selecting a first physical erasing unit from the second group; and copying valid data of the first physical erasing unit to a second physical erasing unit. A trim table recording special type data of the physical erasing units of the first group is not stored in a non-volatile rewriteable memory module, and a trim table recording special type data of the physical erasing units of the second group is stored in the non-volatile rewriteable memory module. The valid data does not include the special type data of the first physical erasing unit.Type: GrantFiled: January 4, 2016Date of Patent: May 14, 2019Assignee: PHISON ELECTRONICS CORP.Inventor: Horng-Sheng Yan
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Patent number: 10235093Abstract: A system and method for creating and managing snapshots. Mediums are recorded and maintained, all of which are read-only except for the most recent mediums in use by a volume. Multiple volumes may be maintained, including a first volume which points to a first medium. When a snapshot of the first volume is taken, a second medium is created that points to the first medium. The first volume is also updated to point to the second medium. The first medium becomes the underlying medium of the second medium, and lookups are performed initially on the second medium and then on the first medium if the data is not located in the second medium.Type: GrantFiled: April 11, 2017Date of Patent: March 19, 2019Assignee: Pure Storage, Inc.Inventors: John Colgrove, Ethan Miller, John Hayes, Cary Sandvig, Christopher Golden, Jianting Cao
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Patent number: 10228875Abstract: Data writing and reading methods for a flash. The data writing method comprises: when remaining spaces of a data area and of an index area of a physical page are sufficient, sequentially storing present-instance write data into the data area of the physical page, and generating an index journal and sequentially writing same into the index area of the physical page; otherwise, organizing actual data in the physical page, storing the actual data into a data area of an idle page, and generating, on the basis of the actual data, an index journal and writing same into an index area of the idle page. The data reading method comprises: acquiring the actual memory address of to-be-read data on the basis of the index journal in the index area of the physical page, and reading the data from the actual memory address.Type: GrantFiled: December 23, 2014Date of Patent: March 12, 2019Assignee: FEITIAN TECHNOLOGIES CO., LTD.Inventors: Zhou Lu, Huazhang Yu
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Patent number: 10223506Abstract: An object storage system providing a secure object destruction and deletion service is provided. The destruction and deletion of files can be handled through secure overwriting of files on a storage medium or through cryptographic scrambling of file contents followed by subsequent deletion from a file table. The triggering of secure deletion can be periodically scheduled or dependent upon some particular event, making files self-destructing. Methods and systems for periodic re-authorization of files are also provided, allowing self-destructing files to be persisted in an available state.Type: GrantFiled: April 4, 2012Date of Patent: March 5, 2019Assignee: Rackspace US, Inc.Inventor: Gregory Holt
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Patent number: 10209910Abstract: A system, method, and computer program product for managing storage volumes in a point-in-time copy cascade. A processor swaps a host portion of a source volume with a host portion of a snapshot point-in-time copy volume. Responsive to an I/O request to overwrite a first data value in a grain of the source volume with a second data value, a processor writes the second data value in a corresponding grain of the snapshot point-in-time copy volume. Responsive to a corresponding grain of a clone point-in-time copy volume not comprising the first data value, a processor copies the first data value to the corresponding grain of the clone point-in-time copy volume.Type: GrantFiled: January 29, 2018Date of Patent: February 19, 2019Assignee: International Business Machines CorporationInventors: Christopher B. E. Beeken, Joanna K. Brown, Carlos F. Fuente
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Patent number: 10162536Abstract: A storage apparatus includes a semiconductor storage device, and a storage controller coupled to the semiconductor storage device, and which stores data to a logical storage area provided by the semiconductor storage device. The semiconductor storage device includes one or more non-volatile semiconductor storage media, and a medium controller coupled to the semiconductor storage media. The medium controller compresses data stored in the logical storage area, and stores the compressed data in the semiconductor storage medium. The size of a logical address space of the logical storage area is larger than a total of the sizes of physical address spaces of the semiconductor storage media.Type: GrantFiled: June 30, 2017Date of Patent: December 25, 2018Assignee: Hitachi, Ltd.Inventor: Takaki Matsushita
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Patent number: 10162523Abstract: A storage controller coupled to a storage array comprising one or more storage devices initiates a transformation of data from a block-based storage system resident on the storage array to a file-based storage system resident on a storage array. The storage controller identifies a plurality of data blocks to be transformed from the block-based storage system and generates metadata for a file in the file-based storage system, the metadata to associate the plurality of data blocks with the file.Type: GrantFiled: October 4, 2016Date of Patent: December 25, 2018Assignee: Pure Storage, Inc.Inventors: Ethan Miller, Lydia Do, John Colgrove
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Patent number: 10140051Abstract: Performing a file backup includes receiving a file to backup from a source machine and performing a write operation to write the file to a mount point in a file system on a backup server. The backup also includes intercepting a block-level data block to be written which is generated by the write operation; and writing the block-level data block to a corresponding, respective block of a disk image file having a plurality of blocks.Type: GrantFiled: October 10, 2013Date of Patent: November 27, 2018Assignee: CA, Inc.Inventors: Chuanqi Sun, Zhiye Wang
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Patent number: 10133484Abstract: A hierarchal storage management method is provided. The method includes detecting a first portion of a first file being deleted from a hybrid storage device including a hard disk drive (HDD) memory device, a solid state drive (SSD) memory device, and an archival storage memory device. A first set of memory blocks associated with the first portion of the first file is identified. The first set of memory blocks are determined to reside on the SSD memory device. In response, the first set of memory blocks are transferred from the SSD memory device to a first portion of the hybrid storage device.Type: GrantFiled: November 3, 2017Date of Patent: November 20, 2018Assignee: International Business Machines CorporationInventors: Blaine H. Dolph, Nataraj Nagaratnam, Sandeep R. Patil, Riyazahamad M. Shiraguppi
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Patent number: 10133491Abstract: A method for updating a control device having a first processor core and having a first flash memory associated with the first processor core, in which the first processor core works with a first block of the first flash memory, in which while it is working, a second block, electronically separate from the first block, of the first flash memory is reprogrammed with a predefined memory image; and in which after reprogramming, the first processor core is switched over from the first block of the first flash memory to the second block of the first flash memory.Type: GrantFiled: October 4, 2016Date of Patent: November 20, 2018Assignee: ROBERT BOSCH GMBHInventors: Axel Aue, Hans-Walter Schmitt, Matthias Schreiber
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Patent number: 10120791Abstract: A data read apparatus includes a nonvolatile memory comprising a plurality of blocks, each of the blocks including an area storing block information, in which a position of a next block is written, or storing the block information and file management information, and an area storing actual data; a volatile memory; a power-on circuit configured to turn on supply of power to the nonvolatile memory and the volatile memory; and a processor. The processor is configured to: read out the block information stored in each of the blocks of the nonvolatile memory, or the block information and the file management information, when the supply of power was turned on by the power-on circuit, and register the read-out block information, or the block information and the file management information, in the volatile memory as file position information.Type: GrantFiled: September 16, 2015Date of Patent: November 6, 2018Assignee: CASIO COMPUTER CO., LTD.Inventor: Shunsuke Yamada
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Patent number: 10114568Abstract: A method for regulating a flow of data to backend storage devices includes generating, at a host system, writes intended for a backend storage volume. The method receives the writes into a first level cache of a storage virtualization appliance. The method further determines whether destaging the writes directly from the first level cache to the backend storage volume would cause a limit associated with the backend storage volume to be exceeded. If destaging the writes directly from the first level cache to the backend storage volume would cause the limit to be exceeded, the method destages the writes from the first level cache to a second level cache of the storage virtualization appliance. Otherwise, the method destages the writes directly from the first level cache to the backend storage volume. A corresponding system and computer program product are also disclosed.Type: GrantFiled: October 3, 2016Date of Patent: October 30, 2018Assignee: International Business Machines CorporationInventors: John P. Agombar, Ian Boden, Gordon D. Hutchison, Lee J. Sanders
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Patent number: 10108342Abstract: A SSD and a method for reducing use of DRAM in the SSD are disclosed. The method includes the steps of: A. providing a referring table in a DRAM module of a SSD; B. providing a logical-to-physical address table in the DRAM module; C. receiving a command for accessing a target data in a target logical address of the SSD; D. checking if one physical address is stored in the logical-to-physical address table; E. executing the command by using the mapping data in the subgroup or copying a corresponding subgroup including one mapping data for the target logical address from the mapping table to the DRAM module via the referring table; and; and F. adding a target physical address of the DRAM module where the mapping data for the target logical address is stored to the logical-to-physical address table so that the target logical address is able to correspond thereto.Type: GrantFiled: June 22, 2016Date of Patent: October 23, 2018Assignee: Storart Technology Co. Ltd.Inventor: Hou Yun Lee
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Patent number: 10102147Abstract: In a system in which a plurality of computing elements share a cache, each computing element owns a stripe of the cache. Each stripe contains cache objects that are accessible to all computing elements but managed only by the owning computing element. Each computing element maintains an LRU FIFO queue in local memory for the cache objects owned by that computing element. Each computing element also maintains a separate hash table in local memory for each other computing element. The hash tables indicate access to cache objects that are owned by those other computing elements. Each computing element updates its LRU FIFO queue when it accesses cache objects that it owns. The hash tables are periodically distributed by all computing elements via RDMA so that the LRU FIFO queues of all computing elements can be updated based on accesses to owned cache objects by other non-owner computing elements.Type: GrantFiled: June 21, 2016Date of Patent: October 16, 2018Assignee: EMC IP Holding Company LLCInventors: Gabriel BenHanokh, Andrew Chanler, Felix Shvaiger, Hongliang Tang, Arieh Don
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Patent number: 10101934Abstract: Described herein are embodiments of a process that can be used to balance the allocation of primary memory between different types of information. In some embodiments, the memory allocation is balanced dynamically based on observed I/O patterns. Related system embodiments are also described.Type: GrantFiled: March 24, 2016Date of Patent: October 16, 2018Assignee: EMC CorporationInventors: Tal Ben-Moshe, Eli Dorfman, Kirill Shoikhet, David Krakov, Roman Vainbrand, Noa Cohen