Patents Examined by Mehdi Namazi
  • Patent number: 10095418
    Abstract: In a hierarchical storage system, blocks of data selected for auto-tiering migration, are selected based on dynamically adjusted group sizes. Contiguous blocks are organized into default groups. I/O activity of the blocks in a group is monitored. Based on the I/O activity, the default groups may be sub-divided into smaller sub-groups or combined into larger groups, to separate as much as practical, contiguous series of cooler blocks and contiguous series of hotter blocks into respective focused (concentrated) groups or sub-groups. The concentrated group or sub-group may then be migrated according to the average I/O activity of the included blocks. Group configurations are continually and dynamically adjusted according to changing I/O conditions.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: October 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Yongjie Gong, Shuang Shuang Li, Yang Liu, Mei Mei, Xue Qiang Zhou
  • Patent number: 10061798
    Abstract: A system and method for managing tables in a storage system is described.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: August 28, 2018
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Joseph S. Hasbani, John Hayes, Ethan Miller, Cary Sandvig
  • Patent number: 10042710
    Abstract: Systems and methods of backing up data to a replication target such that the data is recoverable from the replication target when a source application and one or more other intermediary replication targets are unavailable. A first deduplicated data object associated with an application is received at a first intermediary copy data management system based on a first schedule. The first deduplicated data object is replicated to generate at least one of a second deduplicated data object at a second copy data management system according to a second schedule.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: August 7, 2018
    Assignee: Actifio, Inc.
    Inventors: Madhav Mutalik, Satya Sri Kanth Palaparthi
  • Patent number: 10013313
    Abstract: Systems and methods of performing backup of databases and associated logs with one schedule such that a backup of both a database and its associated log can be restored or recovered to a desired point in time. A backup request associated with a backup type is received and defined by a service level agreement. The service level agreement includes a combined schedule for backing up both data stored in the database and log data associated with a database.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: July 3, 2018
    Assignee: Actifio, Inc.
    Inventors: Xiangdong Zhang, Uday Tekade, Sachindra Kumar, Madhav Mutalik
  • Patent number: 10013210
    Abstract: The present invention provides a data storage device including a flash memory and a controller. The controller equally distributes the TLC-data blocks into three regions. In a first stage, the controller determines a first TLC-data block corresponding to the logic address of a prewrite data sector, defines the region that contains the first TLC-data block as a first region, and determines whether the first TLC-data block has valid data. When the first TLC-data block does not have valid data, the controller selects a second TLC-data block and a third TLC-data block from the regions other than the first region for writing the prewrite data sector, into the first TLC-data block, the second TLC-data block and the third TLC-data block by a SLC storage mode.
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: July 3, 2018
    Assignee: SILICON MOTION, INC.
    Inventors: Chien-Cheng Lin, Jie-Hao Lee
  • Patent number: 10007461
    Abstract: Accesses to a number of data blocks stored in a distributed storage are observed. Following observation of the accesses, the stored data blocks are redistributed. In one aspect, redistribution of the data blocks includes determining the access patterns for one or more of the data blocks based on the observed accesses, and determining the storage sizes for the one or more data blocks. Thereafter, based on the determined access patterns and determined storage sizes, the one or more data blocks are sorted. Subsequently, the one or more data blocks are redistributed or rebalanced across a number of storage devices of the distributed storage based on the sorting. In one aspect, the one or more data blocks are redistributed according to either a uniform distribution scheme or a proportional distribution scheme.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: June 26, 2018
    Assignee: Quantcast Corporation
    Inventors: Silvius V. Rus, Michael Ovsiannikov
  • Patent number: 10007619
    Abstract: Systems and methods relate to performing address translations in a multithreaded memory management unit (MMU). Two or more address translation requests can be received by the multithreaded MMU and processed in parallel to retrieve address translations to addresses of a system memory. If the address translations are present in a translation cache of the multithreaded MMU, the address translations can be received from the translation cache and scheduled for access of the system memory using the translated addresses. If there is a miss in the translation cache, two or more address translation requests can be scheduled in two or more translation table walks in parallel.
    Type: Grant
    Filed: September 20, 2015
    Date of Patent: June 26, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Jason Edward Podaima, Paul Christopher John Wiercienski, Carlos Javier Moreira, Alexander Miretsky, Meghal Varia, Kyle John Ernewein, Manokanthan Somasundaram, Muhammad Umar Choudry, Serag Monier Gadelrab
  • Patent number: 9996296
    Abstract: An electronic control unit includes: a nonvolatile memory capable of erasing data in units of erasure blocks and also writing data in units of write blocks smaller than the erasure blocks; and a processor. In response to a data rewrite request from outside, the processor of the electronic control unit erases data in a portion of the nonvolatile memory in units of erasure blocks and writes data into the portion of the nonvolatile memory in units of write blocks. The amount of data sent to the electronic control unit from outside is thereby decreased and the time needed to rewrite data in the nonvolatile memory is reduced.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: June 12, 2018
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Toshifumi Miyake, Yusuke Abe, Koji Yuasa, Toshihisa Arai
  • Patent number: 9977739
    Abstract: An image processing apparatus that schedules and executes a process in response to a request for job processing includes a detection unit configured to detect a process which requests backing up of management information to be managed in the job processing, a setting unit configured to set, in a case where a process requesting data backup is detected, a caching destination to which management information requested to be backed up is to be cached to a volatile memory or a non-volatile memory based on a data amount of the management information requested to be backed up, and a cache unit configured to cache the management information in the set caching destination.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: May 22, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masakazu Kitora
  • Patent number: 9971899
    Abstract: A method for securely removing data from a storage system is disclosed. In one embodiment, such a method includes receiving, by a storage system, instructions to erase logical units from the storage system. In response to receiving the instructions, the storage system maps the logical units to physical extents on the storage system. The storage system then initiates, using at least one of hardware and software embedded in the storage system, a secure data removal process that securely erases data from the physical extents by overwriting the data thereon, while leaving intact data stored on other physical extents of the storage system. The storage system is configured to process I/O to the other physical extents during execution of the secure data removal process. A corresponding system and computer program product are also disclosed.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: May 15, 2018
    Assignee: International Business Machines Corporation
    Inventors: Ralph A. Rabasco, John P. Mullin, Neil A. Trapani, Patrick J. Meaney
  • Patent number: 9971522
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller reads write data associated with a first write command from a host memory by a unit of a first size in response to the first write command from a host. The host memory is included in the host. In a case where the size of first data not yet read from the host memory out of the write data is less than a second size, in response to a second write command, the controller reads second data of the second size and writes the read second data into the nonvolatile memory. The second data includes the first data and third data included in write data associated with the second write command. After writing the second data into the nonvolatile memory, the controller transmits a notice for the first write command to the host.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 15, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yukimasa Miyamoto, Koichi Nagai
  • Patent number: 9971547
    Abstract: Methods, systems and computer-readable storage media for determining, by a storage controller, a read unit address and encoded length information of one of the plurality of read units of a non-volatile memory (NVM) based at least in part on a page address of a particular one of a plurality of pages in a storage space address. The encoded length information may be decoded. The storage controller may determine a span specifying an integer number of the read units and a length in units having a finer granularity than the read units based at least in part on the page address. The storage controller may read data associated with the particular page based at least in part on the read unit address and the span. The storage controller may update space usage information of the NVM based at least in part on the length.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: May 15, 2018
    Assignee: Seagate Technology LLC
    Inventor: Earl T. Cohen
  • Patent number: 9971686
    Abstract: A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a vector cache line write back instruction. The vector cache line write back instruction is to indicate a source packed memory indices operand that is to include a plurality of memory indices. The processor also includes a cache coherency system coupled with the packed data registers and the decode unit. The cache coherency system, in response to the vector cache line write back instruction, to cause, any dirty cache lines, in any caches in a coherency domain, which are to have stored therein data for any of a plurality of memory addresses that are to be indicated by any of the memory indices of the source packed memory indices operand, to be written back toward one or more memories. Other processors, methods, and systems are also disclosed.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: May 15, 2018
    Assignee: Intel Corporation
    Inventors: Kshitij A. Doshi, Thomas Willhalm
  • Patent number: 9959203
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for managing storage devices. In some implementations, a memory controller receives a logical write request over a logical interface that the memory controller provides for accessing a non-volatile storage device. The logical write request indicates a logical address at which to write data to the non-volatile storage device. In response to receiving the logical write request, the memory controller sends a write request event to a host system. The memory controller receives a physical write command from the host system over a physical interface that the memory controller provides for accessing the non-volatile storage device. In response to receiving the physical write command, the memory controller stores the data in the non-volatile storage device according to the physical write command.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 1, 2018
    Assignee: Google LLC
    Inventors: Christopher J. Sabol, Tomasz Jeznach
  • Patent number: 9959202
    Abstract: A computing memory includes an execution unit and an access processor coupled with a memory system, where the execution unit and the access processor are logically separated units. The execution unit is for processing operand data. The access processor is for providing operand data and configuration data to the execution unit. The access processor reads operand data from the memory system and sends the operand data to the execution unit. The execution unit executes the operand data according to the provided configuration data. The access processor includes information about execution times of operations of the execution unit for the provided configuration. The access processor reserves time-slots for writing execution unit results provided by the execution unit into selected locations in the memory system based on the information about the execution times, upon sending at least one of the operand data and the configuration data to the execution unit.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: May 1, 2018
    Assignee: International Business Machines Corporation
    Inventors: Jan Van Lunteren, Heiner Giefers
  • Patent number: 9947417
    Abstract: A memory management method, a memory storage device and a memory controlling circuit unit are provided. The method includes: programming data into a plurality of memory cells of a rewritable non-volatile memory module; determining whether a storage state of the data conforms with a first condition or a second condition based on a default bias range and a threshold voltage distribution of the memory cells storing the data; performing a first operation if the storage state of the data conforms with the first condition; and performing a second operation if the storage state of the data conforms with the second condition. Accordingly, the probability of misidentifying the valid data as the invalid data may be reduced.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: April 17, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu
  • Patent number: 9946472
    Abstract: A semiconductor storage device has a nonvolatile semiconductor memory comprised from multiple storage areas, and a controller, which is coupled to the nonvolatile semiconductor memory. The controller (A) identifies a storage area state, which is the state of a storage area, (B) decides, based on the storage area state identified in the (A), a read parameter, which is a parameter for use when reading data from a storage area with respect to a storage area of this storage area state, and (C) uses the read parameter decided in the (B) with respect to a read-target storage area and reads data from this read-target storage area.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 17, 2018
    Assignee: HITACHI, LTD.
    Inventors: Akifumi Suzuki, Takashi Tsunehiro
  • Patent number: 9940041
    Abstract: A system, method, and computer program product for managing storage volumes in a point-in-time copy cascade. A processor swaps a host portion of a source volume with a host portion of a snapshot point-in-time copy volume. Responsive to an I/O request to overwrite a first data value in a grain of the source volume with a second data value, a processor writes the second data value in a corresponding grain of the snapshot point-in-time copy volume. Responsive to a corresponding grain of a clone point-in-time copy volume not comprising the first data value, a processor copies the first data value to the corresponding grain of the clone point-in-time copy volume.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Christopher B. E. Beeken, Joanna K. Brown, Carlos F. Fuente
  • Patent number: 9934238
    Abstract: An illustrative pseudo-file-system driver uses deduplication functionality and resources in a storage management system to provide an application and/or a virtual machine with access to a locally-stored file system. From the perspective of the application/virtual machine, the file system appears to be of virtually unlimited capacity. The pseudo-file-system driver instantiates the file system in primary storage, e.g., configured on a local disk. The application/virtual machine requires no configured settings or limits for the file system's storage capacity, and may thus treat the file system as “infinite.” The pseudo-file-system driver intercepts write requests and may use the deduplication infrastructure in the storage management system to offload excess data from local primary storage to deduplicated secondary storage, based on a deduplication database.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: April 3, 2018
    Assignee: COMMVAULT SYSTEMS, INC.
    Inventors: Amit Mitkar, Paramasivam Kumarasamy, Rajiv Kottomtharayil
  • Patent number: 9891860
    Abstract: A method is used in managing copying of data in storage systems. A request is received to copy a portion of a source logical object to a target logical object. The source and target logical objects are subject to a deduplicating technique. The portion of the source logical object is copied to the target logical object by updating metadata of the target logical object. The target logical object shares the portion of the source logical object.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 13, 2018
    Assignee: EMC IP Holding Company, LLC.
    Inventors: Diane M. Delgado, Lawrence Yetto, Christopher Seibel, John F. Gillono, Philippe Armangau, Alexei Karaban