Abstract: Provided are a method, system, and article of manufacture for a replication engine communicating with a splitter to split writes between a storage controller and replication engine. Communication is initiated with the splitter implemented in a storage controller managing access to primary volumes. A command is sent to the splitter to copy writes to one primary volume to the replication engine. Write data is received from the splitter to one of the primary volumes following the splitter receiving the command to copy the writes to the replication engine. A determination is made of a copy services function to use for the received data. The determined copy services function is invoked to transfer the received data to a secondary storage volume.

Abstract: Systems and methods for memory management in a computing environment are provided. The method comprises uniquely identifying a first object associated with a first task for an application executed in a computing environment, wherein a first area of memory is allocated to the first object; determining a first execution scope for the first task according to a first execution context associated with the first task, wherein the first context defines a first life expectancy for the first task within the execution environment hierarchy; determining a change in execution scope of the first task, in response to monitoring the first execution context; and deallocating the first area of memory, in response to determining that the first task is no longer executed within the first execution scope.

Abstract: A method for archiving data from a first disk-based storage device to a second disk-based storage device includes moving an emulated tape from a first element to a second element simulatively without actually moving data associated with the emulated tape. The data associated with the emulated tape is transmitted from the first disk-based storage device to the second disk-based storage device via a communication link. The data associated with the emulated tape is removed from the first disk-based storage device.

Abstract: A system is provided that includes processing logic and a memory management module. The memory management module is configured to allocate a portion of memory space for a thread stack unit and to partition the thread stack unit to include a stack and a thread-local storage region. The stack is associated with a thread that is executable by the processing logic and the thread-local storage region is adapted to store data associated with the thread. The portion of memory space allocated for the thread stack unit is based on a size of the thread-local storage region that is determined when the thread is generated and a size of the stack.

Abstract: For a virtual memory of a virtualized computer system in which a virtual page is mapped to a guest physical page which is backed by a machine page and in which a shadow page table entry directly maps the virtual page to the machine page, reverse mappings of guest physical pages are optimized by removing the reverse mappings of certain immutable guest physical pages. An immutable guest physical memory page is identified, and existing reverse mappings corresponding to the immutable guest physical page are removed. New reverse mappings corresponding to the identified immutable guest physical page are no longer added.

Abstract: Systems and/or methods that facilitate a search of a memory component(s) to locate a desired logical block address (LBA) associated with a memory location in a memory component are presented. Searches to locate a desired LBA(s) in a memory component(s) associated with a processor component are offloaded and controlled by the memory component(s). A search component searches pages in the memory array to facilitate locating a page of data associated with an LBA stored in the memory component. The search component can retrieve a portion of a page of data in a block in the memory component to facilitate determining whether the page contains an LBA associated with a command based in part on command information. The search component can search pages in the memory component until a desired page is located or a predetermined number of searches is performed without locating the desired page.

Abstract: To provide a computer system, a management computer and a storage system, and a storage area allocation amount controlling method for improving I/O performance of the host computer. In a computer system comprising a storage system comprising one or more storage devices with storage areas, a host computer which uses a storage area of the storage device, and a management computer for dynamically allocating the storage area in response to an input/output request from the host computer; wherein the management computer monitors dynamic allocation of a real storage area to a storage area in the storage system, and calculates allocation increment amount to the allocated storage area based on the allocation frequency and the total amount of allocation.

Abstract: The present invention is directed to an integrated circuit, a method and a system for executing a sequence of instruction loaded from an external storage element and ensuring the authenticity of the sequence of instructions via RAM paging. In one embodiment, the integrated circuit includes a processor for executing a sequence of instructions loaded from an external storage element. To ensure the authenticity of the sequence of instructions from the external storage element, the processor supports Multiple Independent Levels of Security (MILS) or another partitioning scheme. A zeroizer is included to zeroize the on-die memory banks thereby ensuring that the processor is incapable of accessing residual sequences of instructions as loaded and stored from the external storage element thereby ensuring the authenticity of the sequence of instructions executed by the processor.

Abstract: A method of selecting candidates for data cluster duplication that can be used as an alternative or as an addition to existing duplication techniques. The method determines a read temperature of a data cluster. If the read temperature of the data cluster exceeds a threshold value, a write temperature of the data cluster is determined. If the write temperature of the data cluster is below a threshold value the cluster is selected for duplication.

Abstract: A system and method for handling speculative read requests for a memory controller in a computer system are provided. In one example, a method includes the steps of providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and intermixing demand reads and speculative reads in accordance with the speculative read threshold. In another example, a computer system includes a CPU, a memory controller, memory, a bus connecting the CPU, memory controller and memory, circuitry for providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and circuitry for intermixing demand reads and speculative reads in accordance with the speculative read threshold.

Abstract: An architecture, system, and method for managing a data storage system by contacting a single processor in a data storage system having more than one processor. The single processor contacts each other peer processor in the data storage system and merges selected data from the single processor with data from the peer processor to determine the state of the data storage system.

Abstract: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure generally includes a computer system that includes a CPU, a memory controller, memory, a bus connecting the CPU, memory controller and memory, circuitry for providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and circuitry for intermixing demand reads and speculative reads in accordance with the speculative read threshold.

Abstract: Solutions to a value recycling problem facilitate implementations of computer programs that may execute as multithreaded computations in multiprocessor computers, as well as implementations of related shared data structures. Some exploitations allow non-blocking, shared data structures to be implemented using standard dynamic allocation mechanisms (such as malloc and free). Some exploitations allow non-blocking, indeed even lock-free or wait-free, implementations of dynamic storage allocation for shared data structures. In some exploitations, our techniques provide a way to manage dynamically allocated memory in a non-blocking manner without depending on garbage collection. While exploitations of solutions to the value recycling problem that we propose include management of dynamic storage allocation wherein values managed and recycled tend to include values that encode pointers, they are not limited thereto.

Abstract: A method for storage allocation analysis is provided. Storage usage is measured for a file system to determine a burn rate. A date is calculated when the storage usage is projected to exceed allocated storage for the file system based on the burn rate. Whether the calculated date is less than an allocation period from the current date is determined. An amount of additional storage is requested in response to determining that the calculated date is less than the allocation period from the current date. The amount of additional storage is based on projecting the burn rate for at least one storage procurement cycle.

Abstract: A content addressable memory (CAM) device, method, and method of generating entries for range matching are disclosed. A CAM device (800) according to one embodiment can include a pre-encoder (806) that encodes range bit values W into additional bits E. Additional bits E can indicate compression of range rules according to particular bit pairs. A CAM array (802) can include entries that store compressed range code values (RANGE) with corresponding additional bit values (ENC). Alternate embodiments can include pre-encoders that encode portions of range values (K1 to Ki) in a “one-hot” fashion. Corresponding CAM entries can include encoded value having sections that each represent increasingly finer divisions of a range space.

Abstract: A method and system for allocating blocks of disk in persistent storage to requesting threads. A primary data structure is provided for organizing and categorizing blocks of disk space. In addition, a secondary data structure is provided for maintaining a list of all active file system processes and blocks of disk space used by those processes. Blocks of disk space are assigned to pages. At such time as a thread may request allocation of disk space, both data structures are reviewed to determine if the requested disk space is available and to limit access of available disk space to a single page of memory to a single thread at any one time.

Abstract: A method for executing an atomic transaction includes receiving the atomic transaction at a processor for execution, determining a transactional memory location needed in memory for the atomic transaction, reserving the transactional memory location while all computation and store operations of the atomic transaction are deferred, and performing the computation and store operations, wherein the atomic transaction cannot be aborted after the reservation, and further wherein the store operation is directly committed to the memory without being buffered.

Abstract: A database engine is provided with memory management policies to dynamically configure an area of memory called a buffer pool into which data pages are held during processing. The data pages are also buffered as an I/O (input/output) stream when read and written to a persistent storage medium, such as a hard disk, through use of a system file cache that is managed by the computer's operating system. The memory management policies implement capping the amount of memory used within the buffer pool to minimize the number of data pages that are double-buffered (i.e., held in both the buffer pool and system file cache). In addition, trimming data pages from the buffer pool, after the database engine completes all pending operations and requests, frees additional memory and further minimizes the number of processes associated with the database.

Abstract: Some embodiments of the invention use a command-based interface to control reads and writes with non-volatile memory devices. This may reduce the number of pins that are needed on each integrated circuit, and therefore reduce the cost and size of those integrated circuits. In some embodiments, an on-die cache buffer may be used to buffer data transfers between a high-speed memory bus and the slower speed non-volatile array.

Abstract: A processor includes multiple processor core units, each including a processor core and a cache memory. Victim lines evicted from a first processor core unit's cache may be stored in another processor core unit's cache, rather than written back to system memory. If the victim line is later requested by the first processor core unit, the victim line is retrieved from the other processor core unit's cache. The processor has low latency data transfers between processor core units. The processor transfers victim lines directly between processor core units' caches or utilizes a victim cache to temporarily store victim lines while searching for their destinations. The processor evaluates cache priority rules to determine whether victim lines are discarded, written back to system memory, or stored in other processor core units' caches. Cache priority rules can be based on cache coherency data, load balancing schemes, and architectural characteristics of the processor.