Patents Examined by Michael L Westbrook
  • Patent number: 11972131
    Abstract: An online takeover method for a heterogeneous storage volume, including: executing a service: a host executing upper layer service data access by means of a second volume label of a storage volume of a second storage; generating a volume label: a first storage taking over the storage volume of the second storage and generating a first volume label for the storage volume that has been taken over; flushing data: flushing host side cache data corresponding to the storage volume of the second storage to the storage volume of the second storage; changing a directory: changing directory information of an upper layer service running on the host; and storage migration: when the directory information of the upper layer service has been changed, migrating data of the storage volume to the first storage.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 30, 2024
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Xianning Sun
  • Patent number: 11966618
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The memory device is arranged into at least a first super device and a second super device, each of the super devices having a plurality of active zones. The controller is configured to determine that each of the super devices includes both cold zones and hot zones, where a cold zone is a zone that is overwritten less than a hot zone. The controller is further configured to move cold zones from one super device to another super device upon determining that the another super device is below a threshold limit, where the threshold limit is a minimum free space to be maintained in a super device. The controller is further configured to move cold zones between super devices, such that the cold zones are concentrated in at least one super device.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 23, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ravishankar Surianarayanan, Matias Bjorling
  • Patent number: 11968843
    Abstract: An embodiment of an integrated circuit chip includes a combination processing core and magnetoresistive random access memory (MRAM) circuitry integrated into the chip. The MRAM circuitry includes a plurality of MRAM cells. The MRAM cells are organized into a number of memories, including a cache memory, a main or working memory and an optional secondary storage memory. The cache memory includes multiple cache levels.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Te Lin, Yen-Chung Ho, Pin-Cheng Hsu, Han-Ting Tsai, Katherine Chiang
  • Patent number: 11966638
    Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to dynamically generate Redundant Array of Independent Nodes (RAIN) parity information for zone-based memory allocations. The RAIN parity information is generated for a given zone or set of zones on the basis of whether the given zone or set of zones satisfy a zone completeness criterion. The zone completeness criterion can represent a specified size such that when a given zone reaches the specified size, the parity information for that zone is generated.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: April 23, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Luca Bert
  • Patent number: 11960753
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The memory device includes at least a first super device and a second super device. Each of the super devices includes a plurality of active zones and a threshold value for a number of cold zones. The controller classifies zones as either a cold zone or hot zone depending the number of resets to the zone. If the number of resets to the zone is greater than a threshold reset value, then the zone is classified as a hot zone, otherwise the zone is classified as a cold zone. The controller is configured to determine that the number of cold zones is greater than the threshold value for a super device and move data from at least one cold zone from the super device to a zone of another super device.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ravishankar Surianarayanan, Matias Bjorling
  • Patent number: 11954346
    Abstract: A method is provided for use in a storage processor, the method comprising: receiving a write request, the write request including a request to store user data in an array that includes a plurality of solid-state drives (SSD); executing the write request by: identifying metadata that is associated with the write request, and writing the user data and the metadata to different data streams that are opened on the plurality of SSDs; wherein writing the user data and the metadata to different data streams causes: (i) the user data to be stored in one or more first erase units of any of the plurality of SSDs, and (ii) the metadata to be stored in one or more second erase units of any of the plurality of SSDs, such that no part of the metadata is stored on any of the one or more first erase units, and no part of the user data is stored on any of the one or more second erase units.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: April 9, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Amitai Alkalay, Lior Kamran, Steven Morley
  • Patent number: 11954353
    Abstract: In an approach to improve magnetic tape file systems through tape-to-tape copying between nodes on a Linear Tape File System using a cluster-wide named pipe. Embodiments transfer data between a first node and a second node. Additionally, both the first node and the second node implement a parallel shared-disk file system through a data path for node data reading and writing from a shared-disk and to the shared-disk. Further, to transfer data between the first node and the second node, embodiments, write, by the first node, the data for tape-to-tape copy from a first tape drive to the shared-disk, and write, by the second node, the data written from the shared-disk to a second tape drive.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 9, 2024
    Assignee: International Business Machines Corporation
    Inventors: Atsushi Abe, Tohru Hasegawa, Hiroshi Itagaki, Tsuyoshi Miyamura, Shinsuke Mitsuma, Noriko Yamamoto
  • Patent number: 11922048
    Abstract: A memory controller for controlling a memory device which stores logical-to-physical (L2P) segments includes a map data storage and a map manager. The map data storage stores a plurality of physical-to-logical (P2L) segments including mapping information between a physical address of the memory device in which write data is to be stored and a logical address received from a host, in response to a write request received from the host. The map manager updates the L2P segments stored in the memory device, based on target P2L segments corresponding to a write command provided to the memory device, which have a higher priority than the other P2L segments among the plurality of P2L segments. Each of L2P segments includes mapping information between a logical address and a physical address of data stored in the memory device.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: March 5, 2024
    Assignee: SK hynix Inc.
    Inventors: Hye Mi Kang, Eu Joon Byun
  • Patent number: 11868653
    Abstract: According to one embodiment, a memory system stores write data received from a host to a shared write buffer for write destination blocks, acquires first write data for plural pages from the shared write buffer, and writes the first write data to a first write destination block by a first-step write operation. When receiving write data from the host in a state in which an empty region does not exist in the shared write buffer, the memory system discards write data in the shared write buffer in which the first-step write operation has been finished. In a case where the first write data do not exist in the shared write buffer when a second-step write operation of the first write data is to be executed, the memory system transmits a request to acquire the first write data to the host.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: January 9, 2024
    Assignee: Kioxia Corporation
    Inventor: Shinichi Kanno
  • Patent number: 11816346
    Abstract: A data migration orchestration system includes a data migration orchestration engine, a user interface, and an orchestration configuration database. The user interface provides a menu-based system configured to guide a user through a process of implementing a data migration instance. The orchestration configuration database contains information about the types of data migration technologies available to be used to implement data migration operations between disparate storage systems.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: November 14, 2023
    Assignee: Dell Products, L.P.
    Inventors: Vijesh Shetty, Sivashankari Chandrasekaran
  • Patent number: 11789860
    Abstract: Disclosed are systems and methods for providing logical to physical (L2P) table management using low-latency NVM to reduce solid state drive (SSD) random access memory (RAM) footprint. A method includes determining a logical to physical (L2P) mapping of a logical address to a physical address in a flash storage, for an operation directed to the logical address. The method also includes adding a data entry, comprising the L2P mapping, to an open journal structure in RAM. The method also includes adding a log entry, comprising the L2P mapping, to a buffer in the RAM. The method also includes flushing the buffer to a low-latency NVM storage in response to determining that the buffer has satisfied a size threshold. Reads, snapshotting and L2P table recovery are also described.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: October 17, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Amir Hossein Gholamipour, Mark David Myran, Chandan Mishra, Namhoon Yoo, Jun Tao
  • Patent number: 11782828
    Abstract: Techniques for efficiently purging non-active blocks in an NVM region of an NVM device using virtblocks are provided. In one set of embodiments, a host system can maintain, in the NVM device, a pointer entry (i.e., virtblock entry) for each allocated data block of the NVM region, where page table entries of the NVM region that refer to the allocated data block include pointers to the pointer entry, and where the pointer entry includes a pointer to the allocated data block. The host system can further determine that a subset of the allocated data blocks of the NVM region are non-active blocks and can purge the non-active blocks from the NVM device to a mass storage device, where the purging comprises updating the pointer entry for each non-active block to point to a storage location of the non-active block on the mass storage device.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: October 10, 2023
    Assignee: VMware, Inc.
    Inventors: Xavier Deguillard, Ishan Banerjee, Julien Freche, Kiran Tati, Preeti Agarwal, Rajesh Venkatasubramanian
  • Patent number: 11775226
    Abstract: Embodiments of the present disclosure relate to methods, devices and computer program products for writing data in a disk array in a storage system. The storage system comprises a disk array. The method comprises: in response to receiving a write request to write new data to a data block in at least one disk array group in a degraded mode within a disk array, reading old data stored in the data block and old parity information stored in a parity block associated with the data block. The method further comprises: determining new parity information associated with the new data based on the old data, the old parity information and the new data. The method further comprises: writing the new data and the new parity information into at least one cache page provided by a cache component in the storage system, the at least one cache page being allocated in a persistent memory in the cache component.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: October 3, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Liam Xiongcheng Li, Xinlei Xu, Jian Gao, Lifeng Yang, Yousheng Liu
  • Patent number: 11768625
    Abstract: A storage device may include: a memory device; a cache memory device including a first cache memory which caches first data among data stored in the plurality of pages and a second cache memory which caches second data among the data stored in the plurality of pages; and a memory controller for counting a number of times that each of the plurality of pages is read and a number of times that each of the plurality of pages is written, based on a read request or a write request which are received from a host, and, moving the first data from the first cache memory to the second cache memory when the first data is stored in a first page and a number of times that the first page is read and a number of times that the first page is written satisfy a predetermined condition.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventor: Kyung Soo Lee
  • Patent number: 11755233
    Abstract: A method, computer program product, and computing system for identifying a first memory device source that includes first content; identifying a second memory device source that include second content; and initiating a first iteration of a memory device cleansing procedure wherein first content and at least a first portion of the second content are moved to a first unused memory device.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: September 12, 2023
    Assignee: EMC IP Holding Company, LLC
    Inventors: Vamsi K. Vankamamidi, Bruce E. Caram, Ajay Karri, Alexei Karaban
  • Patent number: 11748035
    Abstract: A memory device may include one or more memory banks that store data and one or more input buffers. The input buffers may receive command address signals to access the one or more memory banks. The memory device may operate in one of a first mode of operation or a second mode of operation. The one or more input buffers may operate under a first bias current when the memory device is in the first mode of operation or a second bias current when the memory device is in the second mode of operation, and the first bias current may be greater than the second bias current.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: September 5, 2023
    Inventor: Gary L. Howe
  • Patent number: 11733922
    Abstract: A method of performing a reconstruction of data in a redundant array of independent disks (RAID) system with a protection pool of storage units includes receiving a request to perform a reconstruction of a first set of physical extents stored on a first physical disk of a set of physical disks. Each physical extent of the first set of physical extents is associated with an array of a second set of physical extents. The second set of physical extents is distributed across the set of physical disks. The method further includes allocating a third set of physical extents on one or more physical disks of the set of physical disks other than the first physical disk, and distributing data from each of the first set of physical extents of the first physical disk to a corresponding physical extent of the third set of physical extents.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: August 22, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Paul Nehse, Michael B. Thiels, Devendra V. Kulkarni
  • Patent number: 11733900
    Abstract: Provided are mechanisms for promptly or gradually migrating data from a read-only disk in a storage system to a replacement disk, where, during gradual migration, data is migrated when it is requested of the read-only disk.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: August 22, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Changho Choi, Yang Seok Ki, Sungwook Ryu
  • Patent number: 11726699
    Abstract: One embodiment provides a system which facilitates data management. The system receives, by a storage device via read requests from multiple streams, a first plurality of logical block addresses (LBAs) and corresponding stream identifiers. The system assigns a respective LBA to a first queue of a plurality of queues based on the stream identifier corresponding to the LBA. Responsive to determining that a second plurality of LBAs in the first queue are of a sequentially similar pattern: the system retrieves, from a non-volatile memory of the storage device, data associated with the second plurality of LBAs; and the system stores the retrieved data and the second plurality of LBAs in a volatile memory of the storage device while bypassing data-processing operations.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: August 15, 2023
    Assignee: ALIBABA SINGAPORE HOLDING PRIVATE LIMITED
    Inventor: Shu Li
  • Patent number: 11726834
    Abstract: A performance-based workload/storage allocation system includes a workload/storage allocation device coupled via controller device(s) to storage devices that each include a respective storage device attribute structure having storage device attributes that identify performance capabilities of that storage device. The workload storage/allocation device identifies a first workload that requires storage resources, and retrieves first workload performance requirement(s) associated with the first workload. The workload storage/allocation device then retrieves the storage device attributes that identify the performance capabilities of each of the storage devices via the controller device(s) and from the respective storage device attribute structure included in each of the storage devices, and uses them to determine that at least one of the plurality of storage devices includes performance capabilities that satisfy the first workload performance requirement(s).
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: August 15, 2023
    Assignee: Dell Products L.P.
    Inventors: Yung-Chin Fang, Xiaoye Jiang, Frank Widjaja Yu, Jingjuan Gong