Abstract: Input/output IO writes sent to a volume to be protected are intercepted and aggregated. The aggregated IOs and IO metadata of each IO are transmitted to a replica site. The aggregated IOs are stored in an object of an object store at the replica site. The metadata of each IO, including an identification of the object in which the aggregated IOs are stored, are written to a database table at the replica site.

Abstract: A method of operating a virtual memory manager (VMM) in a computing system is provided. The method includes receiving a boot-up instruction, determining an amount of available configurable memory, determining a system logical memory block (LMB) size and selecting a memory stripe size for memory stripes respectively associated with LMBs provided within the available configurable memory. The selecting of the memory stripe size for the memory stripes is based in part on the determined amounts of the available configurable memory and the system LMB size.

Abstract: Described are techniques for data caching. Dirty cached data of a first logical address may be stored in a secondary cache included in multiple caching layers. The multiple caching layers may also include a primary data cache. Two copies of the dirty cached data may be stored in two different cache pages on two different physical devices of the secondary cache. The two cache pages may be marked as dirty indicating that data stored in the cache pages of the secondary cache is a more recent copy of data stored at the first logical address than other data stored on first non-volatile physical storage. Clean cached data of a second logical address may also be stored in the secondary cache where a single copy of the clean cached data is stored in physical storage of the secondary cache.

Abstract: Cohorts may be created on storage nodes in an object-redundant storage system that uses replication and/or a redundant encoding technique. In a cohort with N nodes, M data elements (replicas or shards) of an object are stored to M of the nodes that are selected from the N nodes. Metadata for locating other data elements for an object in the cohort may be stored with one or more of the data elements in the cohort. To reconcile the nodes, common object lists are generated on each node for at least one other node from the metadata, hashes of the lists may be exchanged among the nodes, and the hashes are compared. If the hashes for two nodes differ, specific differences are determined, and a reconciliation process performs reconciliation based on the determined differences.

Abstract: Provided herein are a semiconductor memory device and a method of operating the semiconductor memory device, which have an improved processing speed for a suspend operation. The semiconductor memory device includes a memory cell array, a peripheral circuit configured to perform a data operation corresponding to an externally provided command on the memory cell array and a control circuit configured to control the peripheral circuit to perform the data operation by sequentially executing instructions corresponding to a plurality of instruction lines of an operation algorithm for the data operation and, when a suspend command is provided during the data operation, to perform a preset suspend operation in any one of a checker mode and an instant mode.

Abstract: A technique for operating a memory management unit (MMU) of a processor includes the MMU detecting that one or more address translation invalidation requests are indicated for an accelerator unit (AU). In response to detecting that the invalidation requests are indicated, the MMU issues a raise barrier request for the AU. In response to detecting a raise barrier response from the AU to the raise barrier request the MMU issues the invalidation requests to the AU. In response to detecting an address translation invalidation response from the AU to each of the invalidation requests, the MMU issues a lower barrier request to the AU. In response to detecting a lower barrier response from the AU to the lower barrier request, the MMU resumes handling address translation check-in and check-out requests received from the AU.

Abstract: In various embodiments, methods and systems for implementing a distributed metadata management system in distributed storage systems are provided. A distributed storage system operates based on data storage resources (e.g., extents and streams). The distributed metadata management system is implemented for extent and stream metadata to facilitate the scalability of metadata processing. The distributed storage system implements extent managers and stream managers that independently manage extent and stream metadata, respectively. The extent managers are associated with an extent table that stores extent metadata. The stream managers are associated with streams that store associations with extents. The distributed metadata management system can also utilize a bootstrap layer that leverages components of a legacy distributed storage system to facilitate distributed management of extent and stream metadata.

Abstract: A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first physical erasing unit in a first super physical unit is the same as an address offset value corresponding to a first available physical programming unit of a second physical erasing unit in the first super physical unit.

Abstract: A cache to provide data caching in response to data access requests from at least one system device, and a method operating such a cache, are provided. Allocation control circuitry of the cache is responsive to a cache miss to allocate an entry of the multiple entries in the data caching storage circuitry in dependence on a cache allocation policy. Quality-of-service monitoring circuitry is responsive to a quality-of-service indication to modify the cache allocation policy with respect to allocation of the entry for the requested data item. The behaviour of the cache, in particular regarding allocation and eviction, can therefore be modified in order to seek to maintain a desired quality-of-service for the system in which the cache is found.

Abstract: Backing up virtual machine operating system data on sequential-access data storage systems is provided. A virtual machine boots into an operating system using operating system data that is provided to the virtual machine from a random access storage unit. The random access storage unit stores the operating system data as a first plurality of blocks. The operating system data is recorded in a sequential order as it is provided to the virtual machine. The operative system data is recorded in a record file. Sequential boot data is recorded on a sequential backup system based, at least in part, on the record file. The sequential boot data is a copy of the operating system data that represent the operating system as a second plurality of blocks based, at least in part, on the sequential order of the operating system data provided to the virtual machine.

Abstract: Techniques for allocating memory on non-volatile storage mediums, rather than on RAM storage mediums, are provided. In some embodiments, first functions in program code for allocating memory on RAM storage are replaced with corresponding second functions for allocating memory on non-volatile storage. Library files corresponding to the second functions may be stored in programming language libraries, such that the second function may be defined in order to allocate memory on non-volatile storage. In some embodiments, a library file for allocating memory on RAM storage may be modified such that it instead causes allocation of memory on non-volatile storage. Allocating memory, storing data in memory, or retrieving data in memory may, in some embodiments, include providing instructions for a processor to communicate via a bus associated with non-volatile storage rather than a bus associated with RAM storage.

Abstract: A method of operating a non-volatile memory system, the method comprising: receiving an access request from a host; generating internal requests by processing the access request by a first central processing unit (CPU) according to a first mapping unit having a first size; and accessing a memory by processing the internal requests by a second CPU according to a second mapping unit having a second size; wherein the first size is different from the second size.

Abstract: A method of programming data into a memory device including an array of memory cells is disclosed. The method comprises receiving at least one program command that addresses a number of the memory cells for a programming operation to program data in the memory cells. The at least one program command is executed by iteratively carrying out at least one program/verify cycle to incrementally program the addressed memory cells with the program data. A secondary command may be selectively received after initiating but before completing the programming operation. The programming operation may be selectively resumed by first verifying the memory cells, then carrying out at least one program/verify cycle.

Abstract: A processing system includes a cache that includes a cache lines that are partitioned into a first subset of the cache lines and a second subsets of the cache lines. The processing system also includes one or more counters that are associated with the second subsets of the cache lines. The processing system further includes a processor configured to modify the one or more counters in response to a cache hit or a cache miss associated with the second subsets. The one or more counters are modified by an amount determined by one or more characteristics of a memory access request that generated the cache hit or the cache miss.

Abstract: Embodiments of the disclosure provide a method, a computer [program product and apparatus for a soft-switch in a storage system, by setting data in a source of the soft-switch to be read-only and starting a replication process of the data to a destination of the soft-switch in response to a soft-switch request; recording at the source an update operation for the data during the replication process and synchronously recording the update operation into the destination; updating the replicated data at the destination with the synchronously recorded update operation in response to the completion of the replication process; and disabling a data access to the source and enabling a data access to the destination.

Abstract: A method according to one embodiment includes determining to temporarily extend an initial volume to be defragmented, identifying a plurality of additional volumes pooled with the initial volume within a storage group, identifying an area on each of the plurality of additional volumes pooled with the initial volume within the storage group to use for temporarily extending the initial volume, allocating the identified area on each of the plurality of additional volumes as a temporary extension of the initial volume, including, for each of the plurality of additional volumes, creating an entry in a VTOC of the additional volume that indicates that a non-VSAM data set resides at a location of the identified area on the additional volume, setting a plurality of pointers within a VTOC of the initial volume, where the plurality of pointers includes a pointer to the identified area on additional volumes, and defragmenting the initial volume.

Abstract: Generally, this disclosure provides systems, methods and computer readable media for a protected memory view in a virtual machine (VM) environment enabling nested page table access by trusted guest software outside of VMX root mode. The system may include an editor module configured to provide access to a nested page table structure, by operating system (OS) kernel components and by user space applications within a guest of the VM, wherein the nested page table structure is associated with one of the protected memory views. The system may also include a page handling processor configured to secure that access by maintaining security information in the nested page table structure.

Abstract: This disclosure provides systems, methods, and apparatus for collective memory transfers. A control unit may be configured to coordinate a transfer of data between a memory and processor cores. For a read data transfer operation, the control unit may receive a trigger packet identifying a read data transfer operation and identifying a first plurality of data lines based on data values included in the trigger packet. The control unit may read the first plurality of data lines from the memory sequentially and send a second plurality of data lines to the processor cores. For a write data transfer operation, the control unit may send a request for at least one data line to a plurality of processor cores, may receive and reorder the requested data lines, and may write the data lines to a memory. The control unit may determine a mapping between processor cores and the memory.

Abstract: According to one embodiment, a storage device includes a first nonvolatile memory, a second volatile memory, and a controller. In the second volatile memory, at least one of management information for managing user data written in the first nonvolatile memory and the user data is temporarily written as cache data. The controller is configured to execute processing for writing the cache data written in the second volatile memory to a third memory of the host device, if the storage device is changed from a regular mode to a low power consumption mode in which supplying of power to the second volatile memory is stopped, in response to a request from a host device.

Abstract: Offloading device management responsibilities from a storage device in an array of storage devices, including: retrieving, from the storage device, control information describing the state of one or more memory blocks in the storage device; and performing, in dependence upon the control information, a storage device management operation.