Patents Examined by Michael Maskulinski
  • Patent number: 10853206
    Abstract: A main data center with first and second backup data centers also has a translator for assisting a failover module of a failed server at the main data center in implementing failover of the failed server to a corresponding server at the first backup data center. The translator intercepts a command from the failover module to a store of the main data center, where the command directs the store to disable writes to particular storage space in the store associated with the failed server, but does not identify with specificity which of a store of the first data center and a store of the second data center is enabled to write to such particular storage space. Thus, the translator determines an identification of the store of the first backup data center, and modifies the command from the failover module based on the determined identification.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: December 1, 2020
    Assignee: United Services Automobile Association
    Inventor: Larry S. Roy
  • Patent number: 10846025
    Abstract: A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. A computing device receives a data access request for an encoded data slice (EDS) associated with a data object. The computing device compares a slice name of the data access request with slice names stored within RAM. When the data access request slice name compares unfavorably with those stored slice names, the computing device transmits an empty data access response that includes no EDS to the other computing device without needing to access a hard disk drive (HDD) that stores EDSs. Alternatively, the computing device transmits a data access response that includes the EDS.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: November 24, 2020
    Assignee: PURE STORAGE, INC.
    Inventors: Bruno Hennig Cabral, Joseph M. Kaczmarek, Ravi V. Khadiwala, Ilya Volvovski
  • Patent number: 10838833
    Abstract: Providing for high availability in a data analytics pipeline without replicas, including: creating a data analytics pipeline, wherein each component of the data analytics pipeline is deployed within a container; creating a failover container; detecting that a component within the data analytics pipeline has failed; and responsive to detecting that the component within the data analytics pipeline has failed, deploying the component within the data analytics pipeline that has failed in the failover container.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: November 17, 2020
    Assignee: Pure Storage, Inc.
    Inventors: Ivan Jibaja, Curtis Pullen, Prashant Jaikumar, Stefan Dorsett, Gaurav Jain, Neil Vachharajani, Srinivas Chellappa
  • Patent number: 10838832
    Abstract: During a synchronization technique, states of a primary cluster in the computer system with multiple primary controllers that provide controllers for access points and a backup cluster in the computer system with multiple backup controllers that independently provide controllers for the access points may be dynamically synchronized. In particular the primary cluster may receive configuration requests with configuration information for the access points on an input node of the primary cluster. In response, the primary cluster may store the configuration requests in a replay queue in the computer system. Then, the primary cluster may playback the configuration requests in the replay queue for the backup cluster to synchronize the states of the primary cluster and the backup cluster. For example, the configuration requests may be played back within a time interval associated with a service level agreement of a service provider of a service for the access points.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: November 17, 2020
    Assignee: ARRIS Enterprises LLC
    Inventors: Sudip Ghosal, Yi-Nan Lee
  • Patent number: 10838801
    Abstract: A computer-implemented method for ranking and presenting actions executed by prior users when an error scenario occurs in a computer system is provided. The computer-implemented method includes identifying an error with the computer system and entering an error state with respect to the error. The computer-implemented method includes recording operations within the computer system during the error state and exiting the error state based on an exit condition.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: November 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin T. Rau, Dwight E. Allen, Jr., Scott D. Malzahn, Grant S. Mericle
  • Patent number: 10831585
    Abstract: An unsupervised pattern extraction system and method for extracting user interested patterns from various kinds of data such as system-level metric values, system call traces, and semi-structured or free form text log data and performing holistic root cause analysis for distributed systems. The distributed system includes a plurality of computer machines or smart devices. The system consists of both real time data collection and analytics functions. The analytics functions automatically extract event patterns and recognize recurrent events in real time by analyzing collected data streams from different sources. A root cause analysis component analyzes the extracted events and identifies both correlation and causality relationships among different components to pinpoint root cause of a networked-system anomaly.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: November 10, 2020
    Inventor: Xiaohui Gu
  • Patent number: 10831589
    Abstract: The present approach relates to facilitating the diagnosis of one or more performance issues associated with running an application (and widgets in the application) on a client instance hosted by one or more data centers by allowing script comparison, configuration comparison, and so forth, all in one interface, without the need for a user to navigate between various windows and/or interfaces. In accordance with the present approach, one or more performance issues are determined based on a first set of data indicative of an initial version of the application and a second set of data indicative of a customized version of the application. After determining the one or more performance issues, a visualization of diagnosis data associated with one or more widgets may be generated in response to executing the customized application to categorize the one or more widgets based on a severity of the one or more performance issues.
    Type: Grant
    Filed: October 18, 2018
    Date of Patent: November 10, 2020
    Assignee: ServiceNow, Inc.
    Inventors: Padmaprabodh Ambale Srinivasamurthy, Kushal Kudavale
  • Patent number: 10824523
    Abstract: A data storage device includes a nonvolatile memory device and a controller which controls the nonvolatile memory device. When the data storage device is powered on after a sudden power off (SPO), the controller detects an erased page by scanning, without decoding, a first system data block of a nonvolatile memory device, performs simple decoding for first system data of first system pages before the erased page, and, if the simple decoding is a fail, recovers the first system data for which the simple decoding failed, by reading out second system data from corresponding second system pages of a second system data block as a duplicate block of the first system data block.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: November 3, 2020
    Assignee: SK hynix Inc.
    Inventors: Jang Hwan Jun, Yeong Dong Gim
  • Patent number: 10809926
    Abstract: A server system comprising storage devices, processing devices and a storage fabric all operating according to a storage fabric protocol. The storage fabric comprises a plurality of individual switches having a modular design from which an overall switch is built, and the individual switches have individual respective configuration settings which determine which processing devices are allocated to use which of the storage devices. The system comprises an API enabling a software control function to configure the overall switch. The API is operable to receive from the control function an overall mapping of the storage devices to the processing devices instead of requiring the individual configuration settings of each of the individual switches to be specified by the control function, the API being configured to convert the overall mapping into the individual configuration settings of the individual switches to produce the overall mapping.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: October 20, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Serguei Anatolievitch Legtchenko, Mark Shaw, Austin Donnelly, Hugh Williams, Richard Black, Antony Ian Taylor Rowstron, Aaron Ogus, Douglas Phillips
  • Patent number: 10810070
    Abstract: Simulator based detection of a violation of a coherency protocol in an incoherent shared memory system is disclosed. One example is a system including a simulator running on a first computing system, where the simulator simulates a second computing system that is a target for an application to be tested, and where the simulator includes a cache manager to monitor a state of a plurality of simulated caches in an incoherent memory system shared by a plurality of simulated processors, wherein the plurality of simulated processors simulate operations of a respective plurality of processors of the second computing system, and detect a violation of a coherency protocol in the shared memory system, and an alert generator to provide, via a computing device on the first computing system, an alert indicative of the violation.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: October 20, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Andrew C. Walton, Charles Stuart Johnson, Alexander V. Jizrawi
  • Patent number: 10795783
    Abstract: A clock monitor includes a test clock input, as a reference clock input, another clock input, a measurement circuit, and control logic. The measurement circuit generates a measurement of a frequency or a duty cycle of the test clock input using the reference clock input, which is compared to a threshold. The control logic determines whether the measurement exceeded the threshold and, based on the measurement exceeding the threshold, cause generation of another measurement of a frequency or a duty cycle using the third clock input in combination with the first clock input or the reference clock input. The control logic may determine whether the other measurement exceeded a threshold and, based on such a determination, further determine that the test clock input or the reference clock input are faulty.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: October 6, 2020
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Igor Wojewoda, Bryan Kris, Stephen Bowling, Yong Yuenyongsgool
  • Patent number: 10795785
    Abstract: A failover method, apparatus and system to implement fast failover between a primary processor and a secondary processor, where the method includes receiving, by a first device, transaction content of a transaction and transaction status data of the transaction, the transaction status data being used to resume the transaction when the transaction is interrupted by a failure of a second device, and continuing to process, by the first device, the transaction according to the transaction content and the transaction status data when detecting that the second device fails.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: October 6, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Junjie Wang, Ruiling Wang, Yan Ye
  • Patent number: 10782345
    Abstract: Devices and techniques are disclosed herein for debugging a device implemented on a die using non-test pins. An instruction to enable a debugging mode of operation is received with a memory device implemented at least in part on a die. In response to receiving the instruction, functionality of a first non-test pin of the die is modified to enable debugging data to be transmitted to a debugging component external to the die over the first non-test pin of the die. A debugging clock signal is established using a signal received at a second non-test pin of the die. Information including the debugging data is exchanged between the die and the debugging component using the first and second non-test pins of the die.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: September 22, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Nadav Grosz
  • Patent number: 10761951
    Abstract: An apparatus to implement functional safety control logic (FSCL) in an autonomous driving system comprises a field-programmable gate array (FPGA) comprising logic elements to be partitioned into a first section to implement one or more safety cores and a second section to implement one or more non-safety cores, a memory to couple to the safety core or to the non-safety core, and a trusted execution environment (TEE) to couple to a remote administrator via a network and to apply a configuration received from the remote administrator to the FPGA. The safety core is to function as an active agent for FSCL during operation, and the non-safety core is to function as a failover agent during operation, and wherein the non-safety core is to perform a liveliness check on the safety core to monitor for a failover and to take over as the active agent in the event of a failover.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: September 1, 2020
    Assignee: Intel Corporation
    Inventors: Rajesh Poornachandran, Nagasubramanian Gurumoorthy, Vincent Zimmer
  • Patent number: 10761929
    Abstract: A system and method improve the performance of non-volatile memory storage by rebuilding, on the fly, “lost data” in response to a read request, which identifies data to be read or recovered, by identifying a parity data storage device in a set of data storage devices that contains parity corresponding to the identified data; sending a reconstruction request to a respective data storage device, which may be the parity data storage device or other data storage device in the system, to reconstruct the identified data, and receiving the identified data from the respective data storage device. The reconstruction request commands the respective data storage device to retrieve, via peer-to-peer read requests, from other data storage devices, data from one or more data blocks, and to reconstruct the identified data based on the retrieved data and parity data locally stored at the parity data storage device.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: September 1, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Vladislav Bolkhovitin, Brian W. O'Krafka, Sanjay Subbarao
  • Patent number: 10754723
    Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: August 25, 2020
    Assignees: STMICROELECTRONICS APPLICATION GMBH, STMICROELECTRONICS S.R.L.
    Inventors: Roberto Colombo, Nicolas Bernard Grossier, Roberta Vittimani
  • Patent number: 10747656
    Abstract: A computerized method of testing a mobile application stored on a mobile test device includes executing, by a computing device, a test script stored in memory of the computing device; running, by the computing device, according to the test script, a human behavior simulation module; retrieving, by the computing device, an event list stored in a server, the event list including one or more electronic human behavior simulations; receiving, by the computing device an electronic human behavior simulation from the event list; providing, by the computing device, selected data of the electronic human behavior simulation to memory of the server for recordation; executing, by the computing device, the electronic human behavior simulation on a mobile test device in electronic communication with the computing device; and executing, by the computing device, according to the test script, a test case stored in memory of the computing device on the mobile test device.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 18, 2020
    Assignee: FMR LLC
    Inventors: Ke Yang, Hongbing Gu, Yanyu Xu, Pengrui Sun
  • Patent number: 10733076
    Abstract: Examples described herein generally relate to reporting faults in a graphics processing unit (GPU). A list of rendering instructions for causing the GPU to render graphics can be captured, and occurrence of a fault in executing the list of rendering instructions can be detected. A portion of the list of rendering instructions can be executed, in isolation from a second portion of the list of rendering instructions, based on detecting occurrence of the fault to identify the fault in the portion of the list of rendering instructions or the second portion of the list of rendering instructions. The portion of the list of rendering instructions or the second portion of the list of rendering instructions can be indicated as causing the fault.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: August 4, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Adrian Tsai, Shawn Lee Hargreaves
  • Patent number: 10725879
    Abstract: A storage apparatus includes a plurality of resources including a plurality of types of surplus resources, determines a surplus resource introduction plan used for coping with abnormalities, and controls allocation of the surplus resources according to the determined introduction plan. The storage apparatus includes a processor. The processor detects an abnormality associated with the resource of the storage apparatus, calculates one or more surplus resource introduction plans capable of coping with the abnormality on the basis of management information of the resource of the storage apparatus when the abnormality is detected, and determines, when there are a plurality of introduction plans, an introduction plan used for coping with the abnormality on the basis of a state in which other abnormalities that are likely to occur concurrently with the abnormality can be coped with, by surplus resources remaining when the introduction plans are executed.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 28, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Yuta Nishihara, Takashi Watanabe, Shiori Inoue
  • Patent number: 10719382
    Abstract: A data storage device includes a nonvolatile memory device; and a controller configured to include a plurality of cores, wherein, when an error occurs in at least one core among the cores, a first core which is coupled with the nonvolatile memory device transmits state records of one or more core among the cores at an error occurrence time, to the nonvolatile memory device.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: July 21, 2020
    Assignee: SK hynix Inc.
    Inventor: Yeong Dong Gim