Patents Examined by Michael Maskulinski
  • Patent number: 10719379
    Abstract: Examples include fault isolation in transaction logs. Some examples involve generation of a transaction log entry associated with a fault domain. The transaction log entry may comprise a transaction signature and a fault domain identifier. Based on the transaction signature, a domain sum may be computed. A determination may be made whether each transaction log entry associated with the fault domain is valid, and a valid domain sum may be computed for the fault domain based on the transaction signature of each valid transaction log entry associated with the fault domain. Based on a determination that the domain sum equals the valid domain sum, the fault domain may be recovered.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: July 21, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Tim Silversides
  • Patent number: 10713135
    Abstract: A data disaster tolerance method, device and system is disclosed. Each node in a logic unit including a single master node and two or more slave nodes is monitored. If the master node is abnormal, the server acquires log information of the plurality of two or more slave nodes separately, the log information of the two or more slave nodes includes respective time points of data synchronization between the slave nodes and the master node A respective slave node of the two or more slave nodes having the time point of data synchronization closest to a current time is selected as a target node. A master-slave relationship in the logic unit is updated to change a role of the target node to that of the master node.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: July 14, 2020
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Wen Zhang, Yongfu Sun, Baiwan Zhu, Rui Li, Han Zheng, Zhigang Hao
  • Patent number: 10691568
    Abstract: Embodiments for managing volume replication and disaster recovery in a containerized storage environment. A mapping is established between a PersistentVolumeClaim (PVC) having a correlated Persistent Volume (PV), and a source storage World Wide Name (WWN) and a target storage WWN. The mapping is replicated as part of a replication operation between the source storage and the target storage thereby maintaining consistency of the PV associated with one or more application containers among the source storage and the target storage.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: June 23, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Amalia Avraham, Alon Marx, Isaac Beckman, Ran Harel, Samuel Krikler, Shay Berman
  • Patent number: 10684907
    Abstract: Methods, systems, and computer readable media can be operable to facilitate automated repair analysis for client devices within a subscriber premise. A diagnostics controller may detect an error condition at a network element within a subscriber premise. When an error condition is detected, the diagnostics controller may retrieve identification information, an error code, and/or query parameters associated with the network element. The diagnostics controller may generate a query for repair analysis that includes the identification information, error code, and/or query parameters, and the diagnostics controller may output the query to an upstream server. In response, the diagnostics controller may receive a repair analysis that includes information associated with remedying the error condition. The diagnostics controller may generate and output for presentation a user interface that includes the information associated with remedying the error condition.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: June 16, 2020
    Assignee: ARRIS ENTERPRISES LLC
    Inventors: Christopher S. DelSordo, Albert F. Elcock, Charles Hardt
  • Patent number: 10678625
    Abstract: Systems and methods for automatically generating failure signatures in a computer system for performing computer system fault diagnosis are provided. The method includes receiving log data, converting each log in the log data into a collection of log pattern sequences including one or more log pattern sequences corresponding to one or more respective failure categories associated with the computer system, generating a collection of seed patterns by computing a global set of patterns from the collection of log pattern sequences, and extracting the collection of seed patterns from the global set of patterns, generating a log pattern grammar representation for each of the one or more log pattern sequences, generating a failure signature for each of the one or more failure categories based on the log pattern grammar representation and the collection of seed patterns, and employing the failure signatures to perform computer system fault diagnosis on new log data.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: June 9, 2020
    Assignee: NEC Corporation
    Inventors: Pranay Anchuri, Jianwu Xu, Hui Zhang
  • Patent number: 10657010
    Abstract: An apparatus 2 comprises at least three processing circuits 4 to perform redundant processing of a common thread of program instructions. Error detection circuitry 16 is provided comprising a number of comparators 22 for detecting a mismatch between signals on corresponding signal nodes 20 in the processing circuits 4. When a comparator 22 detects a mismatch, this triggers a recovery process. The error detection circuitry 16 generates an unresolvable error signal 36 indicating that a detected area is unresolvable by the recovery process when, during the recovery process, a mismatch is detected by one of the proper subset 34 of the comparators 22. By considering fewer comparators 22 during the recovery process than during normal operation, the chances of unrecoverable errors being detected can be reduced, increasing system availability.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: May 19, 2020
    Assignee: ARM Limited
    Inventors: Xabier Iturbe, Emre Ozer, Balaji Venu
  • Patent number: 10649866
    Abstract: A method and system permit a backup entity of a redundant apparatus of a communication system that shares control of hardware resources or other network resources with an active entity to indirectly determine a status of the active entity based upon behavior and reaction to actions it takes in connection with resources it shares control of with the active entity. Such a method and system permit the backup entity to deduce the state of the active entity without having any a hardware connection or other communication connection with the active entity.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: May 12, 2020
    Assignee: Unify GmbH & Co. KG
    Inventors: Rodrigo Biermayr, Evandro Hauenstein, David Wiebe, Thomas Nagel
  • Patent number: 10649833
    Abstract: Consensus-based remediation of offerings' problems is described. A system can receive an indication of an offering's problem. The system identifies possible remediations for the offering's problem from on-line sources of remediations. The system determines an efficacy for each possible remediation. The system arranges each possible remediation in order based on its efficacy. The system outputs the possible remediations based on their order. The system can store the ordered possible remediations into a repository.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: May 12, 2020
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Michael J. Dutch, Christopher H. Claudatos
  • Patent number: 10642702
    Abstract: A network device may detect an event associated with a first control plane component included in the network device. The network device may, based on detecting the event, deactivate a first master control plane address configuration stored in a first cache on the first control plane component, and activate a second master control plane address configuration that was stored, prior to the event being detected, in a second cache on a second control plane component included in the network device. The network device may establish, using the activated second master control plane address configuration stored in the second cache on the second control plane component, a connection between the second control plane component and a data plane component included in the network device.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: May 5, 2020
    Assignee: Juniper Networks, Inc.
    Inventors: Tabrez Ahmed Khan, Manoj Nayak
  • Patent number: 10635539
    Abstract: A sensor integrated circuit includes a disturb immune memory configured to store data and a digital processor coupled to the disturb immune memory and including a main register. The digital processor is configured to perform one of a fast reset or slow reset of the main register according to a level of a supply voltage to the integrated circuit. The fast reset includes resetting the main register according to the data stored in the disturb immune memory and the slow reset includes resetting the main register according to a default state.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: April 28, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Aaron Cook, Kenneth Snowdon, John Waranowski, Virag V. Chaware
  • Patent number: 10635578
    Abstract: A system, method, and computer program product are provided for periodic memory leak detection. In operation, a system monitors one or more processes that perform dynamic memory allocations. The system receives a data type indicator indicating a type of data associated with the dynamic memory allocations to collect. The system receives a time indicator indicating a time period for monitoring and collecting data associated with the data type indicator. The system collects the data associated with the data type indicator for the one or more processes for the time period. Moreover, the system generates a report based on the collected data associated with the data type indicator for the one or more processes.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: April 28, 2020
    Assignee: AMDOCS DEVELOPMENT LIMITED
    Inventor: Ilan Inna Smoilovski
  • Patent number: 10628280
    Abstract: An application can executes a plurality of tasks and responds to interrupts. The application can include an event logger that writes data values to an event log stored in an assigned partition of memory in response to a call to the event logger, wherein the call includes an identifier of an event and parameters corresponding to the data values, and the event logger ceases further writing to the event log in response to the identifier of the event matching a predefined stop identifier.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: April 21, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventor: Robert L. Reeves
  • Patent number: 10613922
    Abstract: An approach is provided for generating diagnostic data. In response to a determination that an error condition occurs in a first node executing a first process which restarts based on the error condition occurring, a first message is received, where the first message is broadcast from the first node to a second node and other node(s). In response to the first message, in-memory collections of diagnostic data are started in the nodes. Subsequent to receiving the first message, the error condition occurs in the second node. Based on the error condition occurring in the second node, a second message is broadcast from the second node to the first node and the other node(s) which causes the first node, the second node, and the other node(s) to dump the in-memory collections of diagnostic data at a predefined location.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Amit Mane, Dinakar Guniguntala
  • Patent number: 10613968
    Abstract: There is provided a computer-implemented method of testing an application. The method obtains first temporary test scripts for testing at least one test case of a first version of the application, and the first temporary test scripts are recorded with first mark data used for testing the first version of the application. The method obtains a first correspondence between the first mark data and test data. The method substitutes the test data for the first mark data in the first temporary test scripts based on the first correspondence to obtain first test scripts for testing the at least one test case of the first version of the application.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventor: Ang Yi
  • Patent number: 10606710
    Abstract: An operating method of a controller, the operating method comprising: reading first data stored in a first read group selected among read groups of a memory device when a sudden power off (SPO) occurs and then power is on; identifying the number of error bit data in each of the first data; and performing a reclaim operation to each of the first data based on the number of error bit data in each of the first data.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: March 31, 2020
    Assignee: SK hynix Inc.
    Inventor: Se-Hyun Kim
  • Patent number: 10592390
    Abstract: Methods and systems for detecting anomalous function execution in a program, such as a video game or simulation program, are described herein. Certain methods attempt to isolate and score functions that behave in a particular manner that is deemed to be problematic within a repetitive program. Other methods can use the repetitive nature of the program to directly compare and isolate problematic functions.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: March 17, 2020
    Assignee: Nintendo Co., Ltd.
    Inventor: Steve Rabin
  • Patent number: 10592371
    Abstract: In a workload data, a pattern of usage of an aspect of a product is detected in a production system. The pattern is apportioned into a portion. When a test has a characterization that corresponds to the portion within a tolerance, the test is configured in a test bucket. The product is caused to be tested using the test bucket, the test bucket including a set of tests such that the set of tests collectively correspond to the pattern within the tolerance.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Josue Cazarez Aguilar, Micah Robison
  • Patent number: 10585743
    Abstract: A PCI host bridge (PHB) includes a warm reset mode and a full reset mode. When a fatal error occurs, the type of fatal error is determined, a reset mode corresponding to that type of fatal error is determined, and a reset corresponding to the reset mode is performed. A full reset clears the error registers, status registers and configuration registers, which then requires the configuration registers to be reconfigured before the PHB can be reinitialized. A warm reset clears the error registers and status registers, but does not clear the configuration registers. A warm reset thus does not require the time to write to the configuration registers, and the PHB can be reinitialized using the existing configuration data in the configuration registers while link training is done in parallel. When initialization of the PHB after a warm reset is not successful, a full reset is performed.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jesse P. Arroyo, Rama K. Hazari, Sakethan R. Kotta, Kumaraswamy Sripathy
  • Patent number: 10579487
    Abstract: A semiconductor device (1) includes a first processing unit (10-1), a second processing unit (10-2), a writing unit (12), a storage unit (14), and a processing control unit (20). The writing unit (12) writes first information related to processing of each of the first processing unit (10-1) and the second processing unit (10-2) into the storage unit (14). The processing control unit (20) controls the operations of the first processing unit (10-1) and the second processing unit (10-2). The processing control unit (20) performs control to stop the first processing unit (10-1) when an error occurs in the first processing unit (10-1). When it is determined that the second processing unit (10-2) where an error has not occurred is able to maintain execution of the first processing by using first information stored in the storage unit (14), the second processing unit (10-2) maintains execution of the first processing.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: March 3, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shunsuke Nakano, Yoshitaka Taki
  • Patent number: 10572353
    Abstract: A method and system for SharePoint single web application recovery. Specifically, the method and system disclosed herein overcome the existing problem of data loss that incurs when a SharePoint farm (SPF) (i.e., or more specifically, the configuration database within the SPF) is restored due to the failure of just a single web application that executes therein. The data loss transpires because restoring the SPF leads to the overwriting of data associated with all web applications, and not just the failed web application, that executes on the SPF. The method and system disclosed herein addresses this dilemma through the assembly of web application topology metadata pertinent to recovering any web application periodically prior to a web application failover event, determining that a web application has entered a failed state and, subsequently, triggering and executing the restoration of just the failed web application based on the determining.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: February 25, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Sunil Yadav, Vipin Kumar Kaushal, Gururaj Soma, Shelesh Chopra, Amarendra Behera, Yagnavalkya Chennojwala