Abstract: Post-copy is one of the two key techniques (besides pre-copy) for live migration of virtual machines in data centers. Post-copy provides deterministic total migration time and low downtime for write-intensive VMs. However, if post-copy migration fails for any reason, the migrating VM is lost because the VM's latest consistent state is split between the source and destination nodes during migration. PostCopyFT provides a new approach to recover a VM after a destination or network failure during post-copy live migration using an efficient reverse incremental checkpointing mechanism. PostCopyFT was implemented and evaluated in the KVM/QEMU platform. Experimental results show that the total migration time of post-copy remains unchanged while maintaining low failover time, downtime, and application performance overhead.

Abstract: Technologies for fast distributed storage recovery include a distributed storage system that includes multiple controller nodes and multiple target nodes. Each controller node is coupled to a corresponding target node via a storage fabric. Each target node stores replica data. The system identifies a failed node and a corresponding node that was coupled to the failed node. If the failed node is a controller node, the corresponding node is a target node. If the failed node is a target node, the corresponding node is a controller node. The system instantiates a replacement node, adds the replacement node to the system, and couples the replacement node to the corresponding node. The system may direct a backup target node to copy replica data to the replacement target node via the storage fabric. Other embodiments are described and claimed.

Abstract: Various approaches for multi-node network cluster systems and methods. In some cases systems and methods for incident detection and/or recovery in multi-node processors are discussed.

Abstract: Apparatus and method for scalable error reporting. For example, one embodiment of an apparatus comprises error detection circuitry to detect an error in a component of a first tile within a tile-based hierarchy of a processing device; error classification circuitry to classify the error and record first error data based on the classification; a first tile interface to combine the first error data with second error data received from one or more other components associated with the first tile to generate first accumulated error data; and a master tile interface to combine the first accumulated error data with second accumulated error data received from at least one other tile interface to generate second accumulated error data and to provide the second accumulated error data to a host executing an application to process the second accumulated error data.

Abstract: An anomaly detector includes a writing unit that writes anomaly detection data readable by an external diagnostic device to an external memory when an anomaly is detected in an on-board device. Further, the anomaly detector includes a determination unit that determines whether a failure is occurring in a memory, which is used when a processor is operated during the writing unit performs the writing. Also, the anomaly detector includes a resetting unit that resets the memory by activating a specified one of reset functions of the processor when the determination unit determines that a failure is occurring in the memory. When the determination unit determines that a failure is occurring in the memory, the writing unit writes the anomaly detection data after the memory is reset by the specified one of the reset functions.

Abstract: An apparatus for dynamically adjusting a journal snapshot window is disclosed. A computer-implemented method and computer program product also perform the functions of the apparatus. According to an embodiment of the present invention, a failure detection module detects a potential failure of at least a portion of a non-volatile storage device. The non-volatile storage device includes a journal for tracking metadata changes for data that is stored on the non-volatile storage device prior to committing the metadata changes to metadata for the non-volatile storage device. A notification receiving module receives an indication of the potential failure of the non-volatile storage device. A snapshot module adjusts a snapshot window for the journal in response to the indication of the potential failure. The snapshot window includes a set of metadata changes in the journal that have not been committed to the metadata of the non-volatile storage device.

Abstract: A programmable display device for a production system that includes a storage device and a plurality of the programmable display devices. The storage device includes a plurality of individual memory areas that store data from the plurality of the programmable display devices individually and are associated with any one of the plurality of the programmable display devices. There is a backup processing unit that loads some or all data that the programmable display device itself retains into an individual memory area associated with the programmable display device itself among the plurality of individual memory areas and a state management unit that updates state management information retained in the storage device when the backup processing unit has performed data update within the individual memory area associated with the programmable display device itself. The state management information indicates that data retained by the plurality of individual memory areas have been updated.

Abstract: A clustered pair of data storage nodes employs a time-to-live (TTL) mechanism by which a preferred node communicates permission for continued operation to a non-preferred node. During non-errored TTL operation, host I/O requests to a data storage object are serviced, with write-type requests being replicated to the other node. Upon a failure as indicated by errored TTL operation or failure of replication, a polarization operation selects a surviving node to transition to single-node access to the data storage object. The polarization process includes: (1) each node contacting a witness node to request survivor status, (2) the witness node granting survivor status to the first node requesting it and denying survivor status to a later-requesting node, (3) at the node granted survivor status, continuing to service the host I/O requests without replication, and (4) at the other node based on being denied survivor status, discontinuing servicing of the host I/O requests.

Abstract: In an approach to failed media channel recovery throttling, responsive to detecting a programming error on an addressable unit during programming of a block stripe, the block stripe is placed on a recovery/data migration queue. An error counter for the addressable unit on which the programming error occurred is incremented. The block stripes from the recovery/data migration queue are built excluding a specific channel containing the addressable unit on which the programming error occurred. Responsive to determining that the queue for the recovery/data migration is empty, building the block stripes resumes using the plurality of channels, where the specific channel containing the addressable unit on which the programming error occurred is included. Responsive to determining that a number of errors on a specific addressable unit exceeds a predetermined threshold based on the error counter for the specific addressable unit, the specific addressable unit is decommissioned.

Abstract: A computer-implemented method and system for inter-processor communications fault handling in high performance computing networks. The method includes detecting that an InfiniBand (IB) queue pair has transitioned into an error state based on an unsuccessful completion status that relates to unsuccessful delivery of a message from an initiator endpoint at a first server device to at least one target endpoint at a second server device. The initiator and target endpoints are associated with at least one application under execution. An embodiment includes inferring, when the unsuccessful completion status is indicated as flushed, that the message was in a send queue of the IB queue pair when the IB queue pair transitioned into the error state. An embodiment includes establishing an IB Direct Connect queue pair connection between the target and initiator endpoints. An embodiment includes re-queueing the message in the IB queue pair for dispatch to the target endpoint.

Abstract: Systems and methods of error handling in a network interface card (NIC) are provided. For a data packet destined for a local virtual machine (VM), if the NIC cannot determine a valid translation memory address for a virtual memory address in a buffer descriptor from a receive queue of the VM, the NIC can retrieve a backup buffer descriptor from a hypervisor queue, and store the packet in a host memory location indicated by an address in the backup buffer descriptor. For a transmission request from a local VM, if the NIC cannot determine a valid translated address for a virtual memory address in the packet descriptor from a transmit queue of the VM, the NIC can send a message to a hypervisor backup queue, and generate and transmit a data packet based on data in a memory page reallocated by the hypervisor.

Abstract: a data store and a proxy system. The data store may store state data relating to a cell of the application, each cell having a state. The proxy system may identify whether the cell is operating in the active state, the passive state, or the fenced state and access a database of acceptable and unacceptable commands for the cell's state. For each request directed to the cell received, the proxy system may identifies the request as an acceptable request based on identifying that one or more commands of the request are acceptable to process in the cell's state or identifies the request as an unacceptable request based on identifying that one or more commands of the request are unacceptable to process in the cell's state. The proxy system then conveys the acceptable requests and unacceptable requests appropriately.

Abstract: The disclosure generally provides methods, systems and apparatus for functional safety systems. In one implementation, a shim layer of software codes that maps into register information collects diagnostic error data. The data is then channeled through one or more virtual tunnels into a Host-based STL. The virtual tunnels are unidirectional to only provide Read access and thereby prevent unauthorized Write access. In another embodiment, the information is provided to external subscribers. The external subscribers may gain access to different levels of data according to the subscription level.

Abstract: Two or more nodes respectively provided with two or more storage control programs constituting each redundantization group maintain redundantization of metadata at the two or more nodes. When a node failure occurs, a failover from the corresponding active storage control program to a standby storage control program is performed. As regarding at least one standby storage control program, a node with the standby storage control program arranged therein compresses a target metadata portion including a metadata portion capable of being accessed after the failover, of metadata existing in the node as regarding the corresponding redundantization group, and stores the same in a memory of the node.

Abstract: While the management module of an information handling system is set as a standby module, an enclosure controller provides first requests for attribute data of the information handling system, and receives and stores first response data for attribute data associated with a first subset of the first requests in a local memory of the enclosure controller. The enclosure controller receives request failure responses associated with a second subset of the first requests directed to a subset of the attributes data for the information handling system stored in a shared memory. While the management module is set as an active module, the management module is granted access to the shared memory. The enclosure controller provides retry requests for attributes associated with the request failure responses, and receives and stores second response data associated with the retry requests in the local memory.

Abstract: Methods, systems, and devices for completing memory repair operations interrupted by power loss are described. A command to perform a memory repair of a memory device may be received. A memory repair process of the memory device may be initiated, based on the command. The memory repair process may include programming fuse elements of the memory device. Information associated with the initiated memory repair process may be stored in a non-volatile memory. The memory repair process may be interrupted by a power interruption. During powerup of the memory device, it may be determined that the memory repair process was initiated and not completed before the powerup, based on the stored information. The memory repair process of the memory device may be continued, based on the determination. Upon completion of the memory repair process, the stored information may be cleared.

Abstract: In an embodiment a method for recovering an error state of an integrated circuit card, wherein the integrated circuit card is coupled to a transmitter device via a serial communication interface including at least a serial clock signal line on which a serial clock signal is transmittable from the transmitter device to the integrated circuit card, wherein the method includes upon detecting the error state, embedding, by the transmitter device, a reset signal in the serial clock signal; sending, by the transmitter device, the serial clock signal as reference clock signal on the serial clock signal line to the integrated circuit card, the reset signal representing a variation of parameters of the serial clock signal; checking, by the integrated circuit card, a presence of the variation of parameters of the serial clock signal; and upon checking the presence of the variation of parameters, performing, by the integrated circuit card, a transition from the error state to a reset state.

Abstract: A semiconductor memory device including a memory cell array and an error relief circuit may be provided. The memory cell array includes plurality of memory cells which store data and are coupled to a plurality of word-lines and a plurality of bit-lines. The error relief circuit includes a replacement memory. The error relief circuit receives a command and an address from an external device, stores a first data associated with a first address in the replacement memory in response to detecting a sequence of the consecutively received commands with respect to the first address, and inputs/outputs the first data associated with the first address through the replacement memory.

Abstract: A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and a processing module operably coupled to the interface and memory such that the processing module, when operable within the computing device based on the operational instructions, is configured to perform various operations. A computing device receives a data access request for an encoded data slice (EDS) associated with a data object. The computing device compares a slice name of the data access request with slice names stored within RAM. When the data access request slice name compares unfavorably with those stored slice names, the computing device transmits an empty data access response that includes no EDS to the other computing device without needing to access a hard disk drive (HDD) that stores EDSs. Alternatively, the computing device transmits a data access response that includes the EDS.

Abstract: A port of a computing device includes multiple receiver-transmitter pairs, each of the receiver-transmitter pairs including a respective receiver and a respective transmitter. The device further includes state machine logic that detects a training sequence received by a particular one of the receiver-transmitter pairs on a particular lane from a tester device. The training sequence includes a value to indicate a test of the particular receiver-transmitter pair by the tester device. The particular receiver-transmitter pair enters a first link state in association with the test and one or more other receiver-transmitter pairs of the port enter a second link state different from the first link state in association with the test to cause crosstalk to be generated on the particular lane during the test.