Abstract: A thin film transistor substrate and an organic light-emitting diode display including the same are disclosed. In one aspect, the TFT substrate includes substrate and a TFT located on the substrate. The TFT includes a lower gate electrode, a first insulating layer covering the lower gate electrode, an oxide semiconductor layer located on the first insulating layer, a first electrode located on the oxide semiconductor layer and having an island shape, a second electrode located on the oxide semiconductor layer and surrounding the first electrode, a second insulating layer at least partially covering the oxide semiconductor layer; and an upper gate electrode located on the second insulating layer. The oxide semiconductor layer includes a first region, a second region surrounding the first region, and a third region interposed between the first and second regions.

Abstract: An organic luminescence display device includes a substrate, a display unit on the substrate, a thin-film encapsulation layer sealing the display unit, and a stress-reducing layer on the thin-film encapsulation layer, wherein the stress-reducing layer includes an organic molecular film.

Abstract: A method of making an interconnect structure includes forming an opening within a dielectric material layer disposed on a substrate including a conductive material, the opening extending from a first surface to a second surface of the dielectric material layer and being in contact with a portion of the substrate; performing a plasma treatment process to chemically enrich exposed surfaces of the dielectric material that line the opening to form a chemically-enriched dielectric surface layer that included an element in a higher concentration than a remaining portion of the dielectric material layer; performing a chemical treatment process to remove a metal contact product from the portion of the substrate that is in contact with the opening; and disposing a conductive material in the opening to substantially fill the opening and form the interconnect structure.

Abstract: A package includes a corner, a device die having a front side and a backside, and a molding material molding the device die therein. A plurality of redistribution lines is on the backside of the device die. The plurality of redistribution lines includes a plurality of metal pads. A polymer layer contacts the plurality of metal pads. A plurality of openings is formed in the polymer layer, with the plurality of metal pads aligned to and exposed to the plurality of openings. The plurality of openings includes a corner opening that is elongated and an additional opening farther away from the corner than the corner opening. The additional opening is non-elongated.

Abstract: Disclosed are bi-polar semiconductor composites that include at least one organic p-type semiconductor; and at least one organic n-type semiconductor, and methods of making and using them. In particular, collagen based semiconductors may be used. The composite may be used to generate electricity from heat loss via industrial processes, such as heat lost via pipes, heat sinks, and so on.

Abstract: An inertial angular sensor of MEMS type has a support of at least two masses which are mounted movably with respect to the support, at least one electrostatic actuator and at least one electrostatic detector. The masses are suspended in a frame itself connected by suspension means to the support. The actuator and the detector are designed to respectively produce and detect a vibration of the masses, and a method for balancing such a sensor provided with at least one load detector mounted between the frame and the support and with at least one electrostatic spring placed between the frame and one of the masses and slaved so as to ensure dynamic balancing of the sensor as a function of a measurement signal of the load sensor.

Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device including thin film transistors which have stable electric characteristics and are formed using an oxide semiconductor. A method for manufacturing a semiconductor device includes the steps of: forming an oxide semiconductor film over a gate electrode with a gate insulating film interposed between the oxide semiconductor film and the gate electrode, over an insulating surface; forming a first conductive film including at least one of titanium, molybdenum, and tungsten, over the oxide semiconductor film; forming a second conductive film including a metal having lower electronegativity than hydrogen, over the first conductive film; forming a source electrode and a drain electrode by etching of the first conductive film and the second conductive film; and forming an insulating film in contact with the oxide semiconductor film, over the oxide semiconductor film, the source electrode, and the drain electrode.

Abstract: A display device and manufacturing method thereof with a high level of reliability is provided without increasing the number of manufacturing processes. The display device includes a first conductor, a first insulation layer including a first contact hole exposing a part of the first conductor, a second insulation layer including a second contact hole exposing at least a part of the first contact hole and a part of a surface of the first insulation layer, a pixel electrode overlapping a part of the second contact hole and electrically connected to the first conductor, and a third insulation layer contacting the first insulation layer via the second contact hole.

Abstract: Some embodiments include a memory array which has rows of fins. Each fin has a first pedestal, a second pedestal and a trough between the first and second pedestals. A first source/drain region is within the first pedestal, a second source/drain region is within the second pedestal, and a channel region is along the trough between the first and second pedestals. Digit lines are electrically coupled with the first source/drain regions. Ferroelectric capacitors are electrically coupled with the second source/drain regions. Wordlines are along the rows of fins and overlap the channel regions. Conductive isolation lines are under the wordlines along the rows of fins.

Abstract: Various embodiments of light emitting devices, assemblies, and methods of manufacturing are described herein. In one embodiment, a method for manufacturing a lighting emitting device includes forming a light emitting structure, and depositing a barrier material, a mirror material, and a bonding material on the light emitting structure in series. The bonding material contains nickel (Ni). The method also includes placing the light emitting structure onto a silicon substrate with the bonding material in contact with the silicon substrate and annealing the light emitting structure and the silicon substrate. As a result, a nickel silicide (NiSi) material is formed at an interface between the silicon substrate and the bonding material to mechanically couple the light emitting structure to the silicon substrate.

Abstract: A method of making an interconnect structure includes forming an opening within a dielectric material layer disposed on a substrate including a conductive material, the opening extending from a first surface to a second surface of the dielectric material layer and being in contact with a portion of the substrate; performing a plasma treatment process to chemically enrich exposed surfaces of the dielectric material that line the opening to form a chemically-enriched dielectric surface layer that included an element in a higher concentration than a remaining portion of the dielectric material layer; performing a chemical treatment process to remove a metal contact product from the portion of the substrate that is in contact with the opening; and disposing a conductive material in the opening to substantially fill the opening and form the interconnect structure.

Abstract: A package includes a corner, a device die, a molding material molding the device die therein, and a plurality of bonding features. The plurality of bonding features includes a corner bonding feature at the corner, wherein the corner bonding feature is elongated. The plurality of bonding features further includes an additional bonding feature, which is non-elongated.

Abstract: A method for manufacturing a protective layer for protecting an intermediate structural layer against etching with hydrofluoric acid, the intermediate structural layer being made of a material that can be etched or damaged by hydrofluoric acid, the method comprising the steps of: forming a first layer of aluminum oxide, by atomic layer deposition, on the intermediate structural layer; performing a thermal crystallization process on the first layer of aluminum oxide to form a first intermediate protective layer; forming a second layer of aluminum oxide, by atomic layer deposition, above the first intermediate protective layer; and performing a thermal crystallization process on the second layer of aluminum oxide to form a second intermediate protective layer and thereby completing the formation of the protective layer. The method for forming the protective layer can be used, for example, during the manufacturing steps of an inertial sensor such as a gyroscope or an accelerometer.

Abstract: A fluid state detection apparatus which can detect a short failure in which a constituent Wheatstone bridge circuit is shorted to a power supply. A combustible gas detection apparatus (1) judges that a short failure has occurred in a constant temperature control circuit (231) (S240) when a top potential V21 is equal to or greater than a first judgment value Vth1 and a difference D1 (=V11?V31) is equal to or greater than a second judgment value Vth2. As a result, apparatus (1) can distinguish “a state in which a bridge circuit (210) is shorted to a DC power supply (40) (where the constant temperature control circuit 231 is in a short failure state)” from “a state in which the resistance of the heat generation resistor (15) deceases due to a combustible gas (hydrogen)” based on the top potential V21 and the difference D1.

Abstract: A III-N semiconductor channel is compositionally graded between a transition layer and a III-N polarization layer. In embodiments, a gate stack is deposited over sidewalls of a fin including the graded III-N semiconductor channel allowing for formation of a transport channel in the III-N semiconductor channel adjacent to at least both sidewall surfaces in response to a gate bias voltage. In embodiments, a gate stack is deposited completely around a nanowire including a III-N semiconductor channel compositionally graded to enable formation of a transport channel in the III-N semiconductor channel adjacent to both the polarization layer and the transition layer in response to a gate bias voltage.

Abstract: An integrated circuit includes a gate structure over a substrate. A silicon-containing material structure is in each of recesses that are adjacent to the gate structure. The silicon-containing material structure has a first region and a second region, the second region is closer to the gate structure than the first region, and the first region is thicker than the second region.

Abstract: Measures are provided for increasing the resistance to compression of a component having a micromechanical microphone pattern. In particular, the robustness of the microphone pattern to highly dynamic pressure fluctuations is to be increased, without the microphone sensitivity, i.e. the microphone performance, being impaired. The microphone pattern of such a component is implemented in a layer construction on a semiconductor substrate and includes at least one acoustically active diaphragm, which spans a sound hole on the substrate backside, and a stationary acoustically penetrable counterelement having through hole openings, which is situated above/below the diaphragm in the layer construction. At least one outflow channel is developed which makes possible a rapid pressure equalization between the two sides of the diaphragm. In addition, at least one controllable closing element is provided, with which the at least one outflow channel is optionally able to be opened or closed.

Abstract: Semiconductor structures involving multiple quantum wells provide increased efficiency of UV and visible light emitting diodes (LEDs) and other emitter devices, particularly at high driving current. LEDs made with the new designs have reduced efficiency droop under high current injection and increased overall external quantum efficiency. The active region of the devices includes separation layers configured between the well layers, the one or more separation regions being configured to have a first mode to act as one or more barrier regions separating a plurality of carriers in a quantum confined mode in each of the quantum wells being provided on each side of the one or more separation layers and a second mode to cause spreading of the plurality of carriers across each of the quantum wells to increase an overlap integral of all of the plurality of carriers. The devices and methods of the invention provide improved efficiency for solid state lighting, including high efficiency ultraviolet LEDs.

Abstract: A connection unit is provided adjacently to the cell array unit and electrically connected to a peripheral circuit unit positioned downwardly of the cell array unit. The cell array unit has a configuration in which a variable resistance layer is provided at intersections of a plurality of word lines extending in a horizontal direction and a plurality of bit lines extending in a vertical direction. The connection unit includes a lower wiring line layer in which a base portion bundling a plurality of the word lines is formed, and a middle wiring line layer and upper wiring line layer formed upwardly thereof. The lower wiring line layer includes: a first penetrating electrode connecting the plurality of word lines and the peripheral circuit unit; and a second penetrating electrode connecting at least one of the middle wiring line layer and upper wiring line layer and the peripheral circuit unit.

Abstract: A method for manufacturing a protective layer for protecting an intermediate structural layer against etching with hydrofluoric acid, the intermediate structural layer being made of a material that can be etched or damaged by hydrofluoric acid, the method comprising the steps of: forming a first layer of aluminum oxide, by atomic layer deposition, on the intermediate structural layer; performing a thermal crystallization process on the first layer of aluminum oxide, forming a first intermediate protective layer; forming a second layer of aluminum oxide, by atomic layer deposition, above the first intermediate protective layer; and performing a thermal crystallization process on the second layer of aluminum oxide, forming a second intermediate protective layer and thereby completing the formation of the protective layer. The method for forming the protective layer can be used, for example, during the manufacturing steps of an inertial sensor such as a gyroscope or an accelerometer.