Abstract: A method and apparatus is provided for use in an integrated circuit or printed circuit board for reducing or minimizing interference. An inductance is formed using two or more inductors coupled together and configured such that current flows through the inductors in different directions, thus at least partially canceling magnetic fields. When designing a circuit, the configuration of the inductors, as well as the relative positions of portions of the circuit, can be tweaked to provide optimal interference or noise control.

Abstract: An object of the invention is to provide a method for manufacturing a substrate having a film pattern such as an insulating film, a semiconductor film, or a conductive film with an easy process, and further, a semiconductor device and a television set having a high throughput or a high yield at low cost and a manufacturing method thereof. One feature of the invention is that a first film pattern is formed by a droplet discharge method, a photosensitive material is discharged or applied to the first film pattern, a mask pattern is formed by irradiating a region where the first film pattern and the photosensitive material are overlapped with a laser beam and by developing, and a second film pattern having a desired shape is formed by etching the first film pattern using the mask pattern as a mask.

Abstract: A process for making a dielectric material where a precursor polymer selected from poly(phenylene vinylene) polyacetylene, poly(p-phenylene), poly(thienylene vinylene), poly(1,4-naphthylene vinylene), and poly(p-pyridine vinylene) is energized said by exposure by radiation or increase in temperature to a level sufficient to eliminate said leaving groups contained within the precursor polymer, thereby transforming the dielectric material into a conductive polymer. The leaving group in the precursor polymer can be a chloride, a bromide, an iodide, a fluoride, an ester, an xanthate, a nitrile, an amine, a nitro group, a carbonate, a dithiocarbamate, a sulfonium group, an oxonium group, an iodonium group, a pyridinium group, an ammonium group, a borate group, a borane group, a sulphinyl group, or a sulfonyl group.

Abstract: The present invention addresses this need by providing methods for depositing low resistivity tungsten films in small features and features having high aspect ratios. The methods involve depositing very thin tungsten nucleation layers by pulsed nucleation layer (PNL) processes and then using chemical vapor deposition (CVD) to deposit a tungsten layer to fill the feature. Depositing the tungsten nucleation layer involves exposing the substrate to alternating pulses of a boron-containing reducing agent and a tungsten-containing precursor without using any hydrogen gas, e.g., as a carrier or background gas. Using this process, a conformal tungsten nucleation layer can be deposited to a thickness as small as about 10 Angstroms. The feature may then be wholly or partially filled with tungsten by a hydrogen reduction chemical vapor deposition process. Resistivities of about 14 ??-cm for a 500 Angstrom film may be obtained.

Abstract: A semiconductor device (1) and a method are disclosed for obtaining on a substrate (2) a multilayer structure (3) with a quantum well structure (4). The quantum well structure (4) comprises a semiconductor layer (5) sandwiched by insulating layers (6,6?), wherein the material of the insulating layers (6,6?) has preferably a high dielectric constant. In a FET the quantum wells (4,9) function as channels, allowing a higher drive current and a lower off current. Short channel effects are reduced. The multi-channel FET is suitable to operate even for sub-35 nm gate lengths. In the method the quantum wells are formed by epitaxial growth of the high dielectric constant material and the semiconductor material alternately on top of each other, preferably with MBE.

Abstract: A method for obtaining individual dies from a semiconductor structure is disclosed. The semiconductor structure includes a device layer, and the device layer in turn includes active regions separated by predefined spacings. Thick metal is selectively formed on backside of the device layer such that thick metal is formed on backside of active regions but not on backside of the predefined spacings. The semiconductor structure is then cut along the predefined spacings to separate the active regions with thick metal on their backside into individual dies.

Abstract: A multi-level lithography processes for the fabrication of suspended structures are presented. The process is based on the differential exposure and developing conditions of several a plurality of resist layers, without harsher processes, such as etching of sacrificial layers or the use of hardmasks. These manufacturing processes are readily suited for use with systems that are chemically and/or mechanically sensitive, such as graphene. Graphene p-n-p junctions with suspended top gates formed through these processes exhibit high mobility and control of local doping density and type. This fabrication technique may be further extended to fabricate other types of suspended structures, such as local current carrying wires for inducing local magnetic fields, a point contact for local injection of current, and moving parts in microelectromechanical devices.

Abstract: A method of formation of a microelectromechanical system (MEMS) resonator or filter which is compatible with integration with any analog, digital, or mixed-signal integrated circuit (IC) process, after or concurrently with the formation of the metal interconnect layers in those processes, by virtue of its materials of composition, processing steps, and temperature of fabrication is presented. The MEMS resonator or filter incorporates a lower metal level, which forms the electrodes of the MEMS resonator or filter, that may be shared with any or none of the existing metal interconnect levels on the IC. It further incorporates a resonating member that is comprised of at least one metal layer for electrical connection and electrostatic actuation, and at least one dielectric layer for structural purposes. The gap between the electrodes and the resonating member is created by the deposition and subsequent removal of a sacrificial layer comprised of a carbon-based material.

Abstract: A method of forming an integrated circuit structure includes providing a substrate including a first active region and a second active region; forming a gate electrode layer over the substrate; and etching the gate electrode layer. The remaining portions of the gate electrode layer include a first gate strip and a second gate strip substantially parallel to each other; and a sacrificial strip unparallel to, and interconnecting, the first gate strip and the second gate strip. The sacrificial strip is between the first active region and the second active region. The method further includes forming a mask layer covering portions of the first gate strip and the second gate strip, wherein the sacrificial strip and portions of the first gate strip and the second gate strip are exposed through an opening in the mask layer; and etching the sacrificial strip and the portions of the first gate strip and the second gate strip through the opening.

Abstract: The present invention relates to a TFT, a TFT array panel, and a method of manufacturing the TFT array panel. A method of manufacturing the TFT array panel includes the steps of forming a first electrode and a second electrode that are separated from each other on a substrate, forming a silicon layer including amorphous silicon and polycrystalline silicon on the substrate, forming a semiconductor by patterning the silicon layer, forming a gate insulating layer on the semiconductor, forming a third electrode that is opposite to the semiconductor on the gate insulating layer, forming a passivation layer on the third electrode, and forming a pixel electrode on the passivation layer. The TFT array panel has high mobility because the TFT include polycrystalline silicon at the channel region of the TFT.

Abstract: A semiconductor device has a first insulating film formed over a semiconductor substrate, a first opening formed in the first insulating film, a first manganese oxide film formed along an inner wall of the first opening, a first copper wiring embedded in the first opening, and a second manganese oxide film formed on the first copper wiring including carbon.

Abstract: A method and apparatus for thermally processing a substrate is provided. A substrate is disposed within a processing chamber configured for thermal processing by directing electromagnetic energy toward a surface of the substrate. An energy blocker is provided to block at least a portion of the energy directed toward the substrate. The blocker prevents damage to the substrate from thermal stresses as the incident energy approaches an edge of the substrate.

Abstract: A surface emitting laser includes a lower Bragg reflector, a resonator and an upper Bragg reflector. The resonator is provided on top of the lower Bragg reflector and includes an active layer, a lower semiconductor layer and an upper semiconductor layer. The upper Bragg reflector is provided on top of the resonator, and includes a plurality of semiconductor layers. In this surface emitting laser, the uppermost layer among the plurality of semiconductor layers in the lower Bragg reflector forms an air gap, which is larger than the aperture of the first insulating layer, while the lowermost layer among the plurality of semiconductor layers in the upper Bragg reflector forms an air gap, which is larger than the aperture of the second insulating layer.

Abstract: A method of forming a diffusion region is disclosed. The method includes depositing a nanoparticle ink on a surface of a wafer to form a non-densified thin film, the nanoparticle ink having set of nanoparticles, wherein at least some nanoparticles of the set of nanoparticles include dopant atoms therein. The method also includes heating the non-densified thin film to a first temperature and for a first time period to remove a solvent from the deposited nanoparticle ink; and heating the non-densified thin film to a second temperature and for a second time period to form a densified thin film, wherein at least some of the dopant atoms diffuse into the wafer to form the diffusion region.

Abstract: In a first aspect, a first method is provided. The first method includes the steps of (1) preconditioning a process chamber with an aggressive plasma; (2) loading a substrate into the process chamber; and (3) performing plasma nitridation on the substrate within the process chamber. The process chamber is preconditioned using a plasma power that is at least 150% higher than a plasma power used during plasma nitridation of the substrate. Numerous other aspects are provided.

Abstract: In a first aspect, a first method is provided. The first method includes the steps of (1) preconditioning a process chamber with an aggressive plasma; (2) loading a substrate into the process chamber; and (3) performing plasma nitridation on the substrate within the process chamber. The process chamber is preconditioned using a plasma power that is at least 150% higher than a plasma power used during plasma nitridation of the substrate. Numerous other aspects are provided.

Abstract: A method and system for removing heat from an LED facilitates the fabrication of LEDs having enhanced brightness. A thermally conductive interposer can be attached to the top of the LED. Heat can flow through the top of the LED and into the interposer. The interposer can carry the heat away from the LED. Light can exit the LED though an at least partially transparent substrate of the LED. By removing heat from an LED, the use of more current through the LED is facilitated, thus resulting in a brighter LED.

Abstract: A method and system for removing heat from an LED facilitates the fabrication of LEDs having enhanced brightness. A thermally conductive interposer can be attached to the top of the LED. Heat can flow through the top of the LED and into the interposer. The interposer can carry the heat away from the LED. Light can exit the LED though an at least partially transparent substrate of the LED. By removing heat from an LED, the use of more current through the LED is facilitated, thus resulting in a brighter LED.

Abstract: An integrated circuit package may include a substrate and an integrated circuit. The substrate may include at least one region, and a first magnetic material associated with the at least one region. The integrated circuit may have a second magnetic material associated therewith. The second magnetic material may be attracted to the first magnetic material to coupled the integrated circuit to the at least one region of the substrate. The IC package may be utilized in an RFID tag of an RFID system. An associated method for assembling an integrated circuit to a substrate is also provided.

Abstract: The invention includes methods of forming electrically conductive material between line constructions associated with a peripheral region or a pitch region of a semiconductor substrate. The electrically conductive material can be incorporated into an electrically-grounded shield, and/or can be configured to create a magnetic field bias. Also, the conductive material can have electrically isolated segments that are utilized as electrical jumpers for connecting circuit elements. The invention also includes semiconductor constructions comprising the electrically conductive material between line constructions associated with one or both of the pitch region and the peripheral region.