Patents Examined by Mohammed Rehman
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Patent number: 10146552Abstract: A method for managing an initiation of a computing system. In an embodiment, the method includes a computer processor detecting that a first computing system receives a request to initiate a second computing system. The method further includes accessing a table that includes information associated with a plurality of storage entities that include bootable OS images, where the plurality of storage entities are included in at least one storage system. The method further includes determining a first storage entity that includes a corresponding instance of a first bootable OS image of the requested second computing system. The method further includes initiating the requested second computing system based, at least in part, on the instance of the bootable OS image of the first storage entity.Type: GrantFiled: June 22, 2016Date of Patent: December 4, 2018Assignee: International Business Machines CorporationInventors: Sudhir Chandrasekhar, Syed A. Rehman
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Patent number: 10133583Abstract: There is provided an electronic device including a manipulation unit configured to acquire manipulation by a user, and a control unit configured to selectively execute one of a plurality of controls of the electronic device which are associated with a duration of the manipulation and to perform switching of at least one of the plurality of controls according to information indicating a state of the electronic device.Type: GrantFiled: June 2, 2014Date of Patent: November 20, 2018Assignee: Sony CorporationInventors: Tetsuya Takahashi, Takeshi Masuda
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Patent number: 10122716Abstract: A communication and security device for a portable computer having an interface for connecting the security device to a host device to enable the security device to control encryption and decryption of data communication between a processor of the host device and a data storage of the host device. Examples include a security device with data storage for storing an encryption key for the encryption and decryption of the data communication, a security processor coupled to the interface and to the data storage for controlling the data communication by use of the encryption key, and a wide area communication interface configured for secure communication with a remote device. The security processor may be configured to control the data communication between the processor of the host device and the data storage of the host device based on the secure communication.Type: GrantFiled: December 9, 2015Date of Patent: November 6, 2018Assignee: ExactTrak LimitedInventors: Norman Shaw, John Pragnell
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Patent number: 10101784Abstract: A system for controlling energy usage in a server having a processor, where the system includes a memory for storing energy cost information, and a controller for determining a transaction rate for the processor. The controller is also for determining a cumulative of energy expended by the server based on the determined transaction rate for each of a number of available power level states (P-states) for operation of the processor, and for selecting one of the available P-states for operation of the processor based on the determined cumulative energy expended and the stored energy cost information.Type: GrantFiled: June 1, 2016Date of Patent: October 16, 2018Assignee: Oracle International CorporationInventors: Kalyanaraman Vaidyanathan, Kenneth C. Gross, David Belanger, Ayse Kivilcim Coskun
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Patent number: 10055244Abstract: A non-transitory computer-readable storage medium storing therein a boot control program that causes a computer to execute a process includes storing booting process result data in which a first memory amount based on a sum of a memory amount allocated to a virtual machine that has been booted up and a memory amount allocated to a virtual machine to be booted up, and a boot processing time for booting the virtual machine to be booted up are associated with each other and determining a timing at which a booting process of a new virtual machine starts based on the boot processing time associated with the first memory amount having a correlation with a second memory amount based on a sum of a memory amount.Type: GrantFiled: June 23, 2016Date of Patent: August 21, 2018Assignee: FUJITSU LIMITEDInventors: Hiroki Sumida, Yasuo Yoshimoto
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Patent number: 10025333Abstract: Described is an apparatus which comprises: a first feedback loop to generate a control signal for regulating an output voltage provided to a load; and a second feedback loop, separate from the first feedback loop, to receive the control signal from the first feedback loop, the second feedback loop to regulate the output voltage provided to the load.Type: GrantFiled: March 4, 2015Date of Patent: July 17, 2018Assignee: Intel CorporationInventors: Moonkyun Maeng, Aaron Martin
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Patent number: 10025365Abstract: Examples described herein include receiving current values of a power device, determining a spike situation of the power device, determining a power course for the power device, and operating the power device according to the power course. The current values may include a first current value at a first time and a second current value at a second time. The power course may be determined based on a plurality of current change values associated with the spike situation, a total number of spikes associated with the spike situation, and a duration of at least one spike out of the total number of spikes associated with the spike situation.Type: GrantFiled: June 23, 2016Date of Patent: July 17, 2018Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Abhishek Banerjee, James W. Hollas
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Patent number: 10007530Abstract: An electronic device having an external memory according to various embodiments of the present disclosure may include a communication unit; an internal memory configured to store a first electronic device information of the electronic device and a first booting data in a first booting area, said first booting data is loaded when an electric power is supplied to the electronic device; an external memory configured to store a second electronic device information of the electronic device, firmware corresponding to the electronic device in a firmware storage area, and updated firmware received via the communication unit in a firmware update information storage area; and a controller configured to compare the second electronic device information stored in the external memory and the first electronic device information stored in the internal memory and configured to control to change the firmware in the firmware storage area based on the updated firmware stored in the firmware update information storage area duringType: GrantFiled: June 22, 2016Date of Patent: June 26, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Wonsuk Jung, Wookwang Lee
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Patent number: 10002212Abstract: A model-based virtual power management driven multi-chip system simulator generates utilization data and performance data with a workload model that models one or more types of workloads based on parameters that characterize the one or more types of workloads. The simulator generates thermal data and power consumption data with a power model that models power consumption at a chip-level and a system-level. The simulator then generates performance counter information with a performance model that models change of performance counters over time and at least one of the generated utilization data and the generated performance data as input to the performance model. The simulator provides this generated data as input to a driver of the simulator.Type: GrantFiled: December 13, 2016Date of Patent: June 19, 2018Assignee: International Business Machines CorporationInventors: Bishop Brock, Michael S. Floyd, Erika Gunadi, Nan Ni, Srinivasan Ramani, Ken V. Vu
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Patent number: 9983816Abstract: A method is used in managing disk drive power saving in data storage systems. Multiple data storage systems storage elements capable of operating in a power saving mode are identified and grouped into a RAID group. One or more logical units are created from the RAID group. The one or more logical units are exposed to a server. The one or more logical units are associated to an application at the server. Power saving settings are determined. A power saving mode based on the power saving settings is enabled.Type: GrantFiled: September 30, 2012Date of Patent: May 29, 2018Assignee: EMC IP Holding Company LLCInventors: Christine G. Cao, Joseph C. Caiani, Andrew P. Kubicki, Russell R. Laporte, Jingyan Zhao
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Patent number: 9985842Abstract: Provided is a device, including: a first interface to couple the device to a direct current (DC) bus-bar power interface of a rack configured to hold computing equipment; a second interface to couple the device to an alternative (AC) power input interface of the computing equipment; a powerline modem; and a controller operative to execute commands form the powerline modem.Type: GrantFiled: September 6, 2016Date of Patent: May 29, 2018Assignee: Vapor IO Inc.Inventor: Steven White
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Patent number: 9967252Abstract: A communication and security device for a portable computer is disclosed including a housing, a connector provided on the housing for physical connection to the portable computer, a computer interface coupled to the connector for communicating data with the portable computer, a wireless modem coupled to the computer interface for communicating data between the portable computer and a remote device via a wireless network, a controller configured to control access to the data storage based on an identifier in a security message received via the wireless network.Type: GrantFiled: December 9, 2015Date of Patent: May 8, 2018Assignee: ExactTrak LimitedInventors: Norman Shaw, John Pragnell
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Patent number: 9952880Abstract: A wake up system for electronic device includes a detecting circuit, an amplifier circuit, a switch circuit, and a south bridge chip. The detecting circuit detects an ambient temperature change as a result of the physical proximity of a user, converts the temperature change to a weak voltage signal, and amplifies the voltage signal for the first time. The amplifier circuit receives the amplified voltage signal and amplifies the voltage signal for the second time. The switch circuit receives the voltage signal that is amplified for the second time, and outputs a wake up signal when the voltage signal amplified for the second time is greater than a turn-on voltage. The south bridge chip receives the wake up signal, and wakes up the electronic device accordingly.Type: GrantFiled: December 31, 2014Date of Patent: April 24, 2018Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Tong-Qi Huang, Chun-Sheng Chen
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Patent number: 9952879Abstract: A software layout system is described herein that speeds up computer system boot time and/or application initialization time by moving constant data and executable code into byte-addressable, persistent random access memory (BPRAM). The system determines which components and aspects of the operating system or application change infrequently. From this information, the system builds a high performance BPRAM cache to provide faster access to these frequently used components, including the kernel. The result is that kernel or application code and data structures have a high performance access and execution time with regard to memory fetches. Thus, the software layout system provides a faster way to prepare operating systems and applications for normal operation and reduces the time spent on initialization.Type: GrantFiled: August 30, 2012Date of Patent: April 24, 2018Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Edmund Nightingale, Ky Srinivasan
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Patent number: 9939838Abstract: Systems and methods are disclosed for providing sensor data to a host processor. A sequence of data samples may be generated at a sample rate established by a clock source associated with the sensor. A time stamp derived from another clock source, such as the clock employed by the host processor, is assigned to at least one of each periodically retrieved data samples. As such, at least one of the assigned time stamps then may be adjusted by applying a correction determined from a timing characteristic associated with retrieval of the data samples.Type: GrantFiled: January 22, 2015Date of Patent: April 10, 2018Assignee: InvenSense, Inc.Inventors: Ge Gao, William Kerry Keal, Rosa M. Y. Chow
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Patent number: 9927863Abstract: In one embodiment, a system includes a power management controller that controls a duty cycle of a processor to manage power. By frequently powering up and powering down the processor during a period of time, the power consumption of the processor may be controlled while providing the perception that the processor is continuously available. Before powering the processor up, the power management control may determine whether or not there is work for the processor to perform. If there is no work to perform, the power management control may delay powering the processor up until there is work to perform, saving additional power. This additional power savings may be tracked, and may serve as a “credit” for the processor when subsequently powered up again.Type: GrantFiled: April 19, 2016Date of Patent: March 27, 2018Assignee: Apple Inc.Inventor: Jason P. Jane
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Patent number: 9921631Abstract: In one example embodiment, a device uses a camera and an eye detection service to determine whether a user is looking at a display of the device during periods when the user is not actively interacting with the device. In response to a determination that the user is not looking at the display, the display is automatically powered off. In response to the user's resumption of looking at the display, the display may be automatically powered back on. Other embodiments are described and claimed.Type: GrantFiled: March 25, 2012Date of Patent: March 20, 2018Assignee: INTEL CORPORATIONInventors: Jose Piccolotto, German Lancioni
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Patent number: 9912465Abstract: An exemplary method of synchronizing a master clock and a slave clock comprises transmitting a plurality of packets between a master device and a slave device, calculating a first skew between a first pair of the plurality of packets at the slave device and a second skew between the first pair at the master device, calculating a ratio between the first skew and the second skew, providing a slave clock frequency correction to the slave device, calculating a first packet trip delay using a time that the master device initiates sending a packet to the slave device, a time the master device receives a response from the slave device, a corrected time the slave device receives the packet, and a corrected time the slave device initiates sending the response, calculating a first offset based on the first packet trip delay, and providing the first offset to the slave device.Type: GrantFiled: April 25, 2016Date of Patent: March 6, 2018Assignee: Aviat U.S., Inc.Inventor: Janez Mihelic
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Patent number: 9910677Abstract: Provided is a manner of switching between the operating environment of a primary OS and the operating environment of a secondary OS. In certain embodiments, a HDD keeps a runtime image of the secondary OS generated in a system memory. A DMA space for allowing the secondary OS to operate is formed in a physical address space where a memory image of the primary OS is active. The runtime image of the secondary OS is transferred to the DMA space. The operation of the memory image of the primary OS is stopped and the runtime image of the secondary OS is executed in the DMA space. Before activating the memory image of the primary OS, the runtime image of the secondary OS is saved to the HDD again.Type: GrantFiled: July 7, 2014Date of Patent: March 6, 2018Assignee: Lenovo (Singapore) PTE. LTD.Inventors: Seiichi Kawano, Kenji Oka, Randall Scott Springfield
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Patent number: 9898307Abstract: Apparatuses, methods and storage medium associated with virtual machine application processor startup, are disclosed herein. In embodiments, an apparatus for computing may include a plurality of processor cores; and a plurality of OS modules of an OS. The OS modules may include a BSP module and an AP module. The BSP module may be configured to write into a storage area a start state of an AP of a VM, while the VM is being started up; and the AP module may be configured to start the AP at the start state, directly in a protected mode of execution without first going through a real mode of execution. Other embodiments may be described and/or claimed.Type: GrantFiled: December 21, 2015Date of Patent: February 20, 2018Assignee: Intel CorporationInventors: Arumugam Thiyagarajah, Gaurav Khanna, Stalinselvaraj Jeyasingh, Sohil Mehta, Mukesh J. Jagasia