Abstract: An apparatus and method for adaptively changing a constant power level of a system in compliance with a current system specification can improve safety issues such as overheating, due to excess charging capacity. After purchase/after market add-ons to the system made by a customer can change the load such that the present invention adaptively changes the constant power level supplied to match the after initial purchase add-ons. The method includes acquiring system specification information, searching for a constant power level corresponding to the acquired system specification information, and changing a constant power level according to the searched constant power level.

Abstract: We describe an example system and method of power sharing that includes communicating a power status of each of a plurality of devices on a network to a rest of the plurality of devices connected to the network and sharing power between the plurality of devices responsive to the communicating.

Abstract: Apparatus and method for managing power consumption of circuits within a Serial Attached SCSI (SAS) device. A SAS device having a plurality of PHY logic circuits includes a queue manager and a power manager. The queue manager is operable to determine a current workload based on queued entries for the plurality of PHY logic circuits. Based on the current workload, the power manager is operable to set identified ones of the plurality of PHY logic circuits into a low power mode. In some embodiments, PHY logic circuits may be restored to full power operation responsive to changes in the current workload and/or responsive to receipt of a signal from another SAS device coupled to the SAS device. In other embodiments the power manager is further operable to manage power consumption of link and/or DMA logic circuits of the SAS device.

Abstract: A system may include a printed circuit board, a first component located on the printed circuit board, the first component having a first unique identifier and a processor located on the printed circuit board, the processor including a one time programming section. The processor may acquire the first unique identifier from the first component and store the first unique identifier in the one time programming section during the first time initialization. Upon subsequent initializations, the processor may acquire the first unique identifier from the first component and compare the first unique identifier to the stored first unique identifier. The processor may allow the subsequent initializations to proceed if the first unique identifier matches the stored first unique. The processor may disallow the subsequent initializations from proceeding if the first unique identifier does not match the stored first unique identifier.

Abstract: When a packet received in a deep sleep mode matches a packet stored in a WOL-pattern storage region, a network portion performs reply processing suited for the matched packet after returning a power supply mode of a power supply unit from the deep sleep mode to a normal mode. When the packet received in the deep sleep mode matches a packet stored in a proxy-response-pattern storage region, the network portion performs reply processing suited for the matched packet while maintaining the power supply mode of the power supply unit at the deep sleep mode.

Abstract: A power supply circuit for a graphic card on a motherboard includes first to fourth electrical switches. The first electrical switch is connected to the motherboard to receive a power good signal from the motherboard. The second electrical switch is connected between the first electrical switch and each of the third and fourth electrical switches. The third and fourth electrical switches provide power to the graphic card. The first electrical switch is turned on or off according to the voltage of the power good signal. The second electrical switch is turned on or off by the first electrical switch, so as to selectively control one of the third and fourth electrical switches turn on to output power to the graphic card.

Abstract: An audio control system and method of an electronic device receives audio streams, but does not play the audio streams when one or more applications are in a mute mode. The system and method mixes the one or more of the audio streams if the volume of the one or more audio streams is not zero, and transmits the mixed audio streams to an audio processor of the electronic device.

Abstract: A method and apparatus for an instantly-on computer system is presented. A computer that incorporates fast non-volatile primary memory for storing the operating system, resulting in an instant-on or instant-booting of the computer. Large parts of the operating system code and application code are stored in non-volatile write-protectable areas that cannot be modified by malicious sources, resulting in a secure computer. It solves the problem from typical computers having to load the operating system and applications from a slow device such as the hard disk to the main memory. This loading is avoided by permanently housing the operating system in a non-volatile main memory. The system also solves the problem of corruption of operating system areas from malicious sources. The memory contains writeable and write-protected areas and a memory controller controls the access to the various regions of the memory.

Abstract: A method, system, and computer program product are disclosed for automatically determining a valid ordering of provisioning operations, and their needed parameters, so that a provisioning system can configure a desired resource state. This is accomplished by formally describing the pre-conditions and effects of provisioning operations, the current state of managed resources and the desired final state. A planning algorithm is then used to determine the provisioning operations, a valid ordering and appropriate parameters to bring the system from the current state to the desired state.

Abstract: An information handling system includes a host including a central processing unit, a management controller enabled to communicate with the host, a network interface resource in communication with the host and operable to enable the information handling system to communicate via an external network, and a target system in communication with the host through the network interface resource. The management controller comprises an iSCSI initiator operable to generate a request to the target system for an initial OS image.

Abstract: A performance state control system includes a processor and a voltage regulator coupled to the processor. The voltage regulator provides a regulated voltage to the processor, as instructed by the processor. A logic circuit coupled to the processor and the voltage regulator detects that the processor is in an operating power state, determines a time that the processor is in the operating state and instructs the processor to execute a performance state determination algorithm when the time that the processor is in the operating state exceeds a pre-determined threshold value.

Abstract: A technique for controlling a group of logic included in a hard disk drive system, is performed by obtaining an access instruction associated with accessing a target location in a disk included in the hard disk system. A number of units until the target location is accessed is calculated. It is determined whether to put the group of logic into a lower power state based at least in part on the number of units until the target location is accessed and a warm up time associated with the group of logic; in the event it is determined to do so, the group of logic is put into the lower power state.

Abstract: Aspects of a method and system for energy efficient networking over a serial communication channel are provided. In this regard, one or more circuits in an Ethernet PHY that communicates over one or more serial communication channels may transmit and/or receive physical layer signals to maintain and/or refresh synchronization and/or training parameters while operating in an energy saving mode. The Ethernet PHY may transition out of the energy saving mode upon transmitting and/or receiving a wake sequence via the serial communication channel(s), where the wake sequence comprises one or more deterministic forward error correction (FEC) block in instances that FEC is utilized for communications via the serial communication channel(s). The one or more circuits in the Ethernet PHY may be operable to perform forward error correction (FEC) functions and one or more of the FEC functions may be disabled while remaining ones of the FEC functions are enabled.

Abstract: A communication device includes a power supply system, the power supply system includes: an MCH, a power module, and at least one AMC module. The AMC module is adapted to send a load power supply control command according to a received load power supply control request. The power module is adapted to receive input of external power supply, and provide management power supply and load power supply after converting the input of external power supply. The at least one Advanced Mezzanine Card (AMC) module is adapted to send the load power control request to the MCH, receive the load power supply control command sent by the MCH, and control provision of the load power supply of the power module according to the load power supply control command.

Abstract: In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.

Abstract: A method and apparatus for instantly-available applications in a computer system is presented. A computer that incorporates fast non-volatile primary memory for storing the application software and/or operating system, resulting in an instant-on computer is presented. Large parts of the application code and/or operating system code are stored in non-volatile write-protectable areas of the memory that cannot be modified by malicious sources, resulting in a secure computer. It solves the problem of typical computers having to load the applications from a slow device such as the hard disk to the main memory. This loading is avoided by permanently housing the applications in a non-volatile main memory. The system also solves the problem of corruption of application software areas from malicious sources. The memory system contains writeable and write-protected areas and a memory controller that controls the access to the various regions of the memory.

Abstract: A computer system including a first memory unit, a second memory unit and a switch unit is provided. The first memory unit stores a first BIOS. The second memory unit stores a second BIOS. The switch unit has a first configuration and a second configuration. Upon the computer system being started, the switch unit receives an enable signal. When the switch unit is in the first configuration, the enable signal is provided to the first memory unit to start the first basic input/output system. When the switch unit is in the second configuration, the enable signal is provided to the second memory unit to start the second basic input/output system.

Abstract: A method for booting a computer device under a low temperature state is provided. A trigger signal is detected when a power button is pressed. A hard disk temperature of a hard disk is obtained via a temperature sensor to determine whether the hard disk temperature is less than a first predetermined temperature. If so, a heater is activated to heat the hard disk until the hard disk temperature is greater than the first predetermined temperature. If the hard disk temperature is greater than the first predetermined temperature, the heater is turned off and afterwards a voltage of a battery cell is checked if the voltage has reached a predetermined voltage. If the voltage of the battery cell has reached the predetermined voltage, a system component of a computer device is activated.

Abstract: A system comprises a computer and an external power adapter configured to be connected to the computer to provide power to the computer. The computer comprises a computer control circuit that generates a computer control signal that is provided to the external power adapter and causes a change in an output voltage of the external power adapter. The external power adapter comprises an adapter control circuit that generates an adapter control signal that is provided to the computer and causes the computer to change its power draw. The computer and adapter control circuits generate the control signals on a common conductor interconnecting the computer and the external power adapter.

Abstract: Methods, apparatus and computer program products are provided for reducing power consumption in a device. One method includes identifying a plurality of addressable areas for storing data in a volatile memory element of a device and, responsive to a detection of a power condition in the device, enabling power to a first portion of the addressable areas and disabling power to a second portion.