Abstract: A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.

Abstract: Methods and apparatus for forming a reverse selective etch stop layer are disclosed. Some embodiments of the disclosure provide interconnects with lower resistance than methods which utilize non-selective (e.g., blanket) etch stop layers. Some embodiments of the disclosure utilize reverse selective etch stop layers within a subtractive etch scheme. Some embodiments of the disclosure selectively deposit the etch stop layer by passivating the surface of the metal material.

Abstract: A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

Abstract: In a method of coating a photo resist over a wafer, dispensing the photo resist from a nozzle over the wafer is started while rotating the wafer, and dispensing the photo resist is stopped while rotating the wafer. After starting and before stopping the dispensing the photo resist, a wafer rotation speed is changed at least 4 times. During dispensing, an arm holding the nozzle may move horizontally. A tip end of the nozzle may be located at a height of 2.5 mm to 3.5 mm from the wafer.

Abstract: A method for cleaning semiconductor wafer includes putting at least one wafer on a cassette bracket in a first cleaning tank filled with chemical solution; after said wafers have been processed in the first cleaning tank, transferring the wafers from the first cleaning tank to a second cleaning tank with the wafers immersing in the chemical solution; and after said wafers have been processed in the second cleaning tank, taking the wafers out of the second cleaning tank.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: A display device includes a first substrate including a display area and a peripheral area outside the display area, pixels arranged in the display area and each including an emission area defined by a non-emission area, a thin-film encapsulation layer covering the pixels and including at least one inorganic encapsulation layer and at least one organic encapsulation layer, a pattern layer above the thin-film encapsulation layer, the pattern layer including a first light-blocking pattern shielding at least a portion of the non-emission area, and a second substrate facing the first substrate and including a second light-blocking pattern shielding at least a portion of the non-emission area.

Abstract: A semiconductor device includes: a gate trench formed into a semiconductor substrate; a gate dielectric layer formed in the gate trench to cover an inside surface of the gate trench; and a gate electrode disposed over the gate dielectric layer to fill the gate trench, wherein the gate electrode includes: second crystal grains formed in the gate trench; and first crystal grains disposed between the second crystal grains and the gate dielectric layer and having a smaller crystal grain size than the second crystal grains.

Abstract: In order to reduce the occurrence of current alarms in a semiconductor etching or deposition process, a controller determines an offset in relative positions of a cover ring and a shield over a wafer within a vacuum chamber. The controller provides a position alarm and/or adjusts the position of the cover ring or shield when the offset is greater than a predetermined value or outside a range of acceptable values.

Abstract: Disclosed is a semiconductor device for improving a gate induced drain leakage and a method for fabricating the same, and the method for fabricating semiconductor device may include forming a trench in a substrate; forming a gate dielectric layer over the trench, embedding a first dipole inducing portion in the gate dielectric layer on a lower side of the trench, filling a lower gate over the first dipole inducing portion, embedding a second dipole inducing portion in the gate dielectric layer on an upper side of the trench and forming an upper gate over the lower gate.

Abstract: There is provided a technique that includes a substrate support including a support column made of metal and a plurality of supports installed at the support column and configured to support a plurality of substrates in multiple stages; a process chamber configured to accommodate the plurality of substrates supported by the substrate support; and a heater configured to heat the plurality of substrates accommodated in the process chamber, wherein the plurality of supports includes at least a contact portion configured to make contact with the plurality of substrates and made of at least one selected from the group of a metal oxide and a non-metal material.

Abstract: An organic light-emitting diode display is disclosed. In one aspect, the display includes a display unit located on the substrate and including a display area and a non-display area surrounding the display area, and a thin film encapsulation layer sealing the display unit. The display also includes a voltage line formed in the non-display area and surrounding the display area, a metal layer formed of the same material as the voltage line, and a dam surrounding the display area and contacting the voltage line. The voltage line includes a first voltage line disposed in one side of the display area. The first voltage line includes a pair of first end portions and a pair of first connectors respectively connected to the pair of first end portions and extending away from the display area. The metal layer is disposed between the pair of first connectors. The dam contacts the metal layer.

Abstract: A plasma processing system includes a plasma processing apparatus including a processing container that accommodates a substrate, and configured to perform a plasma processing on the substrate by generating a plasma in the processing container; and a control device configured to control the plasma processing apparatus. The control device collects a measurement value indicating a matching state of impedance between a power supply and the plasma; specifies a point corresponding to a value of the variables that maximizes a gradient of change of the measurement value with respect to a vector; specifies a point farther from the matching point than the passing point on a straight line; and ignites the plasma in the plasma processing apparatus by controlling each variable so that the measurement value changes from the starting point toward the matching point along the straight line.

Abstract: Three-dimensional (3D) object manufacturing systems and methods are operable to manufacture printed 3D objects corresponding to user-selected physical objects of interest shown in a media content event that have been viewed by a user, wherein at least one 3D printer that is accessible by the user of the media device is operable to manufacture the printed 3D object corresponding to the viewed physical object of interest.

Abstract: This disclosure relates to the field of display technologies, and discloses a display substrate, a method for fabricating the same, and a display device. The display substrate includes: a substrate, and a plurality of pixels and a pixel definition layer on the substrate, wherein the pixels include long sides and short sides; and the pixel definition layer includes long-side sections adjacent to the long sides, and short-side sections adjacent to the short sides, wherein heights of the long-side sections are greater than heights of the short-side sections.

Abstract: A backside illumination (BSI) image sensor and a method of forming the same are provided. A device includes a substrate and a plurality of photosensitive regions in the substrate. The substrate has a first side and a second side opposite to the first side. The device further includes an interconnect structure on the first side of the substrate, and a plurality of recesses on the second side of the substrate. The plurality of recesses extend into a semiconductor material of the substrate.

Abstract: A method of planarizing a substrate comprises dispensing formable material onto a substrate, contacting, at a planarizing station at a first location, a superstrate held by a superstrate chuck with the formable material on the substrate, thereby forming a multilayer structure including the superstrate, a film of the formable material, and the substrate, releasing the superstrate from the superstrate chuck, moving the multilayer structure from the first location to a curing station located at a second location away from the first location, the curing station including an array of light-emitting diodes, and curing the film of the multilayer structure by exposing the film to light emitted from the array of light-emitting diodes.

Abstract: A device is disclosed. The device includes a source contact in a source contact trench and a drain contact in a drain contact trench, a channel under the source contact and the drain contact, a first spacing layer on a bottom of the source contact trench and a second spacing layer on a bottom of the drain contact trench. The first spacing layer and the second spacing layer are on the surface of the channel. The device also includes a gate electrode below the channel and a dielectric above the gate electrode and underneath the channel.

Abstract: A light-emitting element containing a fluorescent material and having high emission efficiency is provided. The light-emitting element contains the fluorescent material and a host material. The host material contains a first organic compound and a second organic compound. The first organic compound and the second organic compound can form an exciplex. The minimum value of a distance between centroids of the fluorescent material and at least one of the first organic compound and the second organic compound is 0.7 nm or more and 5 nm or less.