Abstract: A power amplification circuit includes first and second clock signal generating portions operable to produce, respectively, first and second clock signals different in frequency from each other; first and second PWM signal generating portions operable to produce first and second PWM signals based on first and second input signals using the first and second clock signals, respectively; a first switching amplifier operable to perform a switching operation in response to the first PWM signal to subject the first PWM signal to power amplification to produce a first output signal and to supply the first output signal to a first circuit load; and a second switching amplifier operable to perform a switching operation in response to the second PWM signal to subject the second PWM signal to power amplification to produce a second output signal and to supply the second output signal to a second circuit load.

Abstract: An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential.

Abstract: Systems and methods for decreasing transmission timing variations include precharging a data channel at a level before data is sent over the channel. The driver sets the level in response to the reception of a precharging control signal.

Abstract: The invention relates to an amplifier capable of delivering a plurality of output signals, these output signals being controlled by a plurality of input signals. A multiple-input and multiple-output amplifier of the invention comprises a common input terminal, 4 signal input terminals, 4 signal output terminals, a common terminal amplifier, 4 active sub-circuits and a feedback network. Each active sub-circuit has a sub-circuit input terminal connected to one of the signal input terminals, a sub-circuit output terminal connected to one of the signal output terminals and a sub-circuit common terminal. The feedback network has four C terminals and one R terminal. Each of said C terminals of the feedback network is coupled to the sub-circuit common terminal of one of said active sub-circuits. The output terminal of the common terminal amplifier is coupled to said R terminal of the feedback network.

Abstract: An RF switch useable up to millimeter wave frequencies and higher frequencies of 30 GHz and above. Four embodiments of the invention are configured as ground switches. Two of the ground switch embodiments are configured with a planar air bridge. Both of these embodiments are configured so that the bridge length is shortened between the transmission line and ground by introducing grounded stops. The other two ground switch embodiments include an elevated metal seesaw. In these embodiments, a shortened path to ground is provided with relatively low inductance by proper sizing and positioning of the seesaw structure. Lastly, broadband power switch embodiment is configured to utilize only a small portion of the air bridge to carry the signal. The relatively short path length results in a relatively low inductance and resistance lowers the RF power loss of the switch, thereby increasing the RF power handling capability of the switch.

Abstract: An RF switch useable up to millimeter wave frequencies and higher frequencies of 30 GHz and above. Four embodiments of the invention are configured as ground switches. Two of the ground switch embodiments are configured with a planar air bridge. Both of these embodiments are configured so that the bridge length is shortened between the transmission line and ground by introducing grounded stops. The other two ground switch embodiments include an elevated metal seesaw. In these embodiments, a shortened path to ground is provided with relatively low inductance by proper sizing and positioning of the seesaw structure. Lastly, broadband power switch embodiment is configured to utilize only a small portion of the air bridge to carry the signal. The relatively short path length results in a relatively low inductance and resistance lowers the RF power loss of the switch, thereby increasing the RF power handling capability of the switch.

Abstract: An apparatus includes a buck boost converter for generating a regulated output voltage responsive to an input voltage. The buck boost converter includes an inductor, a first pair of switching transistors responsive to a first PWM signal and a second pair of switching transistors responsive to a second PWM signal. An error amplifier generates an error voltage responsive to the regulated output voltage and a reference voltage. A control circuit generates the first PWM signal and the second PWM signal responsive to the error voltage and a sensed current voltage responsive to a sensed current through the inductor. The control circuit controls switching of the first pair of switching transistors and the second pair of switching transistors using the first PWM signal and the second PWM signal responsive to the sensed current through the inductor and a plurality of offset error voltages based on the error voltage.

Abstract: An integrated circuit includes a first current source. A second current source is electrically coupled with the first current source via a conductive line. A switch circuit is coupled between the first current source and the second current source. A first circuit is coupled between a first node and a second node. The first node is disposed between the first current source and the switch circuit. The second node is coupled with the first current source. The first circuit is configured for substantially equalizing voltages on the first node and the second node. A second circuit is coupled between a third node and a fourth node. The third node is disposed between the second current source and the switch circuit. The fourth node is disposed coupled with the second current source. The second circuit is configured for substantially equalizing voltages on the third node and the fourth node.

Abstract: A system is configured to facilitate bidirectional voice communication between a number of data and/or telephony devices.

Abstract: Techniques for performing DC to DC power conversion in switch-mode converter circuits include combinations of dynamic switch shedding, phase shedding, symmetric phase circuit topologies, and asymmetric phase circuit topologies. In at least one embodiment of the invention, a method of operating a power converter circuit includes operating a first phase switch circuit portion using a first number of switch devices when the power converter circuit is configured in a first mode of operation. The first number is greater than zero. The method includes operating the first phase switch circuit portion using the first number of switch devices when the power converter circuit is configured in a second mode of operation. The method includes operating a second phase switch circuit portion using a second number of switch devices when the power converter circuit is configured in the second mode of operation. The second number is greater than the first number.

Abstract: A multi-stage charge pump selects the number of active stages dynamically. In the exemplary embodiment, this is done by having a multi-stage master charge pump section in which the number of active stages is settable and a slave charge pump section that is of the same design as the master section. The master section is used to drive the external load, while the slave section drives an adjustable internal load. The adjustable internal load is set by control logic by comparing the operation of the two sections. The control logic then operates the slave section with a different number of active stages than the master stage in order to determine whether the master stage is using the optimal number of active stages. The control logic can then change the number of active stages accordingly.

Abstract: An adaptive pulse positioning modulator including a sense circuit which provides a compensation signal indicative of output voltage error, a filter circuit having an input receiving the compensation signal and an output providing an adjust signal, a leading ramp circuit which provides a repetitive first leading edge ramp signal having a slope which is adjusted by the adjust signal, a comparator circuit which provides a first start trigger signal when the first leading edge ramp signal reaches the compensation signal and a first end trigger signal when a first trailing edge ramp signal reaches the compensation signal, a trailing ramp circuit which initiates ramping of the first trailing edge ramp signal when the first start trigger signal is provided, and a pulse control logic which asserts pulses on a PWM signal based on the trigger signals.

Abstract: According to one embodiment, a semiconductor device includes an interface, a power supply, a driver, and a switch section. The interface includes a first MOSFET and converts a terminal switch signal of input serial data into parallel data. The first MOSFET is provided on the SOI substrate and has a back gate in a floating state. The power supply includes a second MOSFET and generates an ON potential higher than a potential of a power supply to be supplied to the interface. The second MOSFET is provided on the SOI substrate and has a back gate connected to a source. The driver includes a third MOSFET and outputs a control signal for controlling the ON potential to be in a high level according to the parallel data. The third MOSFET is provided on the SOI substrate and has a back gate connected to a source.

Abstract: A regulator for regulating a charge pump is provided. The regulator includes a comparator having a first input end capable of receiving a first voltage and a second input end capable of receiving a second voltage for determining enabling or disabling the charge pump. The first voltage is associated with an output voltage of the charge pump. The second voltage is associated with an internal power voltage and a reference voltage Vref.

Abstract: A paging apparatus and method in a mobile communication system providing an MBMS (Multimedia Broadcast Multicast Service). In the mobile communication system, to page a UE for a first service through a primary carrier during a second service in progress through a secondary carrier, a PICH (Paging Indication Channel) transmitter in a Node B transmits paging indication information to the UE through the primary carrier by oscillating the primary carrier as a transmission frequency. A PCH (Paging Channel) transmitter transmits paging information to the UE through the primary carrier or the secondary carrier by oscillating the primary carrier or the secondary carrier as the transmission frequency under a predetermined control. A PBMSCH (Physical Broadcast Multicast Shared Channel) transmitter transmits data of the second service through the secondary carrier by oscillating the secondary carrier as the transmission frequency.

Abstract: Automatic microwave pre-matching tuners with new zero positioning capability allowing for a minimum idle airline section between pre-matching and tuning section, thus minimizing insertion loss and enhancing high reflection tuning capability at high frequencies and tuner calibration algorithm of the pre-matching section over one half of a wavelength and of the tuning section over one full wavelength at each operation frequency and associated tuning and measurement operation algorithms.

Abstract: A multichannel electrical power amplifying system constructed and arranged to distribute electrical power of amount P to a total load coupled thereto. The system includes a plurality n of power amplifier channels, coupling the power amplifying system to a portion of the electrical load. Each of the amplifier channels distributes a portion of the electrical power P to a portion of the electrical load. Each power amplifier channel has a power distribution capacity, at least one of the power amplifier channels having a power distribution capacity significantly greater than P n . The sum of the capacities of the plurality of amplifier channels is significantly greater than P.

Abstract: A USB-based isolator system conveys USB signals between a pair of galvanically isolated circuit systems and supports controlled enumeration by a downstream device on upstream USB signal lines. The isolator system provides a multi-mode voltage regulator to support multiple voltage supply configurations. The isolator system further provides control systems for each of the isolated circuit systems and provides robust control in a variety of start up conditions. Additionally, the isolator system includes refresh timers and watchdog mechanisms to support persistent operation but manage possible communication errors that can arise between the isolated circuit systems.

Abstract: A USB-based isolator system conveys USB signals between a pair of galvanically isolated circuit systems and supports controlled enumeration by a downstream device on upstream USB signal lines. The isolator system provides a multi-mode voltage regulator to support multiple voltage supply configurations. The isolator system further provides control systems for each of the isolated circuit systems and provides robust control in a variety of start up conditions. Additionally, the isolator system includes refresh timers and watchdog mechanisms to support persistent operation but manage possible communication errors that can arise between the isolated circuit systems.

Abstract: A USB-based isolator system conveys USB signals between a pair of galvanically isolated circuit systems and supports controlled enumeration by a downstream device on upstream USB signal lines. The isolator system provides a multi-mode voltage regulator to support multiple voltage supply configurations. The isolator system further provides control systems for each of the isolated circuit systems and provides robust control in a variety of start up conditions. Additionally, the isolator system includes refresh timers and watchdog mechanisms to support persistent operation but manage possible communication errors that can arise between the isolated circuit systems.