Abstract: Aspects of the disclosed technology relate to techniques of optical proximity correction for directed self-assembly guiding patterns. An initial mask pattern for photomask fabrication is first generated by performing a plurality of conventional optical proximity correction iterations. Predicted print errors for two or more via-type features are then determined based on a predicted guiding pattern for the two or more via-type features, a target guiding pattern for the two or more via-type features, and correlation information between a plurality of guiding pattern parameters and location and size parameters for the two or more via-type features. Here the predicted guiding pattern is derived based on the initial mask pattern. Based on the predicted print errors and the correlation information, the initial mask pattern is adjusted to generate a new mask pattern.

Abstract: Antenna array calibration for wireless charging is disclosed. In one aspect, an initial calibration sequence is performed each time a wireless charging station is powered on. The initial calibration sequence utilizes a reference antenna element, which is an antenna element randomly selected from a plurality of antenna elements in the wireless charging station, to determine relative receiver phase errors between the reference antenna element and each of the other antenna elements in an antenna array. In another aspect, a training sequence is performed after completing the initial calibration sequence to determine total relative phase errors between the reference antenna element and each of the other antenna elements in the antenna array. Adjustments can then be made to match respective total relative phase errors among the plurality of antenna elements to achieve phase coherency among the plurality of antenna elements for improved wireless charging power efficiency.

Abstract: Antenna array calibration for wireless charging is disclosed. In one aspect, an initial calibration sequence is performed each time a wireless charging station is powered on. The initial calibration sequence utilizes a reference antenna element, which is an antenna element randomly selected from a plurality of antenna elements in the wireless charging station, to determine relative receiver phase errors between the reference antenna element and each of the other antenna elements in an antenna array. In another aspect, a training sequence is performed after completing the initial calibration sequence to determine total relative phase errors between the reference antenna element and each of the other antenna elements in the antenna array. Adjustments can then be made to match respective total relative phase errors among the plurality of antenna elements to achieve phase coherency among the plurality of antenna elements for improved wireless charging power efficiency.

Abstract: A computer-implemented method for a hierarchical design flow for deterministic or statistical timing convergence of VLSI circuits enabling design reuse, concurrency and out of context signoff analysis includes: defining, by a computing device, component clock definitions; performing static timing analysis on a lower level component of a circuit design; performing a timing closure for the lower level component based on performing the static timing analysis; generating a timing abstract associated with the lower level component; performing static timing analysis on a higher level component of the circuit design using the timing abstract and the results of the out-of-context timing analysis of the lower level component; generating smart guidance assertions based on performing the static timing analysis on the higher level component; and storing the smart guidance assertions for performing a subsequent timing analysis on the lower level component.

Abstract: A power supply apparatus includes a wireless power supply unit that wirelessly supplies power to an electronic device, a wireless communication unit that wirelessly communicates with the electronic device, a detection unit that detects a change of a position of the electronic device, and a control unit that controls, based on a result detected by the detection unit, a frequency of a communication between the wireless communication unit and the electronic device.

Abstract: A vehicle-side, electronic charging device of a wireless battery charging system receives, converts and feeds energy into a rechargeable traction battery of an electric vehicle traction motor. The traction battery is charged by an external charging system via a wireless link and the vehicle-side charging device. The vehicle-side charging device includes a first LC resonant circuit between first and second output ports, and a current rectifier having first and second AC voltage inputs and first and second DC voltage outputs. Either (i) the first and second DC voltage outputs of the current rectifier, or (ii) the first and second AC voltage inputs of the current rectifier, or (iii) the first and the second output ports of the first LC resonant circuit, or (iv) a first and a second connection of the reception coil are switchably connected to one another via an actuable kill switch.

Abstract: Methods and systems are described for using detection coils to detect metallic or conductive foreign objects that can interfere with the wireless transfer of power from a power transmitter to a power receiver. In particular, the detection coils are targeted to foreign objects that are smaller than a power transmitter coil in the power transmitter.

Abstract: The invention concerns a method of designing a prototype comprising a plurality of programmable chips, such as FPGA chips, for modelling an ASIC circuit, said ASIC circuit being intended to implement a logic design comprising a hierarchy of logic modules communicating together. The method according to the invention comprises steps of: —partitioning the hierarchy of logic modules into regions each comprising one or a plurality of programmable chips, while minimising: —inter-region communications in a manner correlated to the physical connections available between each pair of programmable chips; —and the number of crossings of programmable chips of a critical combinatorial path; —establishing a routing of the signals between programmable chips using the physical resources available.

Abstract: This application discloses tools to build a topology library including one or more topologies, each of which includes a description of multiple transistors, their parameters, and associated connectivity, and also includes rules or criteria to be utilized in downstream design flow processes. The tools can analyze a circuit design describing an electronic device to recognize a subset of transistors in the electronic device has a pre-defined circuit topology, and identify layout rules or simulation criteria for the transistors in the recognized circuit topology. The tools can utilize the layout rules to automatically generate a portion of a physical design layout corresponding to the recognized topology in the circuit design. The tools also can compare results from a simulation of the circuit design that correspond to the transistors in the recognized circuit topology to the simulation criteria to determine whether the transistors in the recognized circuit topology meet design specifications.

Abstract: A power storage system has a plurality of secondary battery packs and a host device. The secondary battery packs each have: secondary batteries; a charge switch means that turns a charging path to the secondary batteries ON and OFF; a discharge switch means that turns a discharging path from the secondary battery ON and OFF; and a current-limiting means that causes the secondary battery to discharge while limiting the current to, or below, a fixed value. When switching from the secondary battery pack connected to the input/output terminals of the system to a first secondary battery pack in which voltage is higher than in the second secondary battery pack, the host device causes the charge switch means of the second secondary battery pack to turn OFF the charging path while in a state in which the current limiting means of the first secondary battery pack will cause a discharge operation to begin while limiting the flow of current.

Abstract: A method for generating a load variation for detecting a wireless power receiving unit in wireless charging is provided. The method includes maintaining a switch connected to a dummy load in an ON state by the wireless power receiving unit, receiving wireless power from a wireless power transmitting unit, and, upon receiving the wireless power, switching the switch connected to the dummy load to an OFF state.

Abstract: A method for arranging an integrated circuit to correct a hold-time violation is provided. A first layout of the integrated circuit is prepared. The first layout includes a plurality of cells including a plurality of cell pins, wires connected between the cells, and one of the cell pins is located in a preservation area. The hold-time violation of the first layout is estimated to obtain an estimation result. A dummy wire structure is designed to be placed in the preservation area according to the estimation result to correct the hold-time violation. The dummy wire structure only contacts the cell pin in the preservation area. A second layout is generated according to the first layout and the designed dummy wire structure. The integrated circuit is arranged according to the second layout.

Abstract: Vehicles and vehicle systems for wirelessly charging portable electronic devices are disclosed. A vehicle includes one or more processors, one or more memory modules, a display, a wireless charger module, and machine readable instructions stored in the one or more memory modules. When executed by the one or more processors, the machine readable instructions cause the vehicle to present a wireless charger module input control on the display, detect tactile input indicative of a selection of the wireless charger module input control, and control the wireless charger module, in response to detecting the tactile input, thereby wirelessly charging the portable electronic device.

Abstract: An integrated device product having objects positioned in accordance with in-situ constraints. Said in-situ constraints comprise predetermined constraints and their local modifications. These local modifications, individually formulated for a specific pair of objects, account for on-the-spot conditions that influence the optimal positioning of the objects. The present invention improves the yield of integrated devices by adding local process modification distances to the predetermined constraints around processing hotspots thus adding extra safety margin to the device yield.

Abstract: A method can include separating a design area of a substrate for a semiconductor integrated circuit (IC) into cell blocks, where a distance between adjacent ones of the cell blocks can be greater than or equal to a minimum distance defined by a design rule for the semiconductor integrated circuit to provide separated cell blocks, designing a layout for the semiconductor IC in the separated cell blocks, and individually coloring the layout of each of the separated cell blocks.

Abstract: A method includes generating a schematic of an integrated circuit (IC), the IC having a circuit component. The method also includes searching a database having one or more configurations of the circuit component, each of the one or more configurations of the circuit component having a corresponding estimated resistance capacitance (RC) value and an assigned color scheme based on the estimated RC value. The method further includes displaying the circuit component in the schematic as a symbol representing the circuit component, the symbol representing the circuit component being displayed having the assigned color scheme of a selected circuit component configuration.

Abstract: A control system for a lithium secondary battery measures a voltage V of a negative electrode that uses silicon oxide as a negative electrode active material, with respect to a lithium reference electrode and a discharge capacity Q of the lithium secondary battery during discharge of the lithium secondary battery; generates a V?dQ/dV curve representing a relationship between dQ/dV, which is a proportion of an amount of change dQ in the discharge capacity Q to an amount of change dV in the voltage V, and the voltage V; calculates an intensity ratio of two peaks appearing on the V?dQ/dV curve for two voltage values in the voltage V; and senses a state of the negative electrode utilizing the intensity ratio.

Abstract: Analysis of a first verification test suite automatically generates properties that may be directly used in a subsequent verification test suite. For example, an IP module may be verified by executing a software simulation test suite. The resulting data is accessed and analyzed to detect a set of properties of the software simulation test suite. A set of emulator-synthesizable properties are selected from the set of detected properties. The emulator-synthesizable properties are suitable for incorporation in a hardware emulation test suite used to test the SoC.

Abstract: A hand tool accumulator charging device is proposed having a charging device housing and a charging coil, provided for the purpose of charging a hand tool accumulator situated in an accumulator charging region, and having only one mounting device that is provided for the purpose of coupling with a hand tool case situated in a case receptacle region, the accumulator charging region and the case receptacle region being situated on sides of the charging device housing facing away from one another.

Abstract: A method, executed by one or more processors, for optimizing placement of a logic network, includes partitioning a logic network into a set of logic partitions, launching a set of placement optimization threads that correspond to the logic partitions, and allocating memory that is accessible to the placement optimization threads to provide a globally accessible placement memory for reserving placement locations on the integrated circuit. Each placement optimization thread may be configured to conduct the operations of determining a desired location for a logic element, reserving a set of potential locations for the logic element, determining a best location from the set of potential locations, and placing the logic element to the best location. Each placement optimization thread may also be configured to release each of the potential locations that are not the best location. A corresponding computer program product and computer system are also disclosed herein.