Abstract: Methods and system are provided for a discharge system. In one example, an emergency response vehicle, comprising a battery discharge system having a charging connector configured to electrically couple a capacitor of the emergency response vehicle to a battery of an electric vehicle.

Abstract: A method includes: identifying attributes that are associated with cell edges of abutted cells in a layout of a semiconductor device, wherein the attributes include at least one of terminal types of the cell edges; determining at least one minimal boundary leakage of the abutted cells based on the attributes, for adjustment of the layout of the semiconductor device. A system is also disclosed herein.

Abstract: Standard cell libraries include one or more standard cells and one or more corresponding standard cell variations. The one or more standard cell variations are different from their one or more standard cells in terms of geometric shapes, locations of the geometric shapes, and/or interconnections between the geometric shapes. The exemplary systems and methods described herein selectively choose from among the one or more standard cells and/or the one or more standard cell variations to form an electronic architectural design for an electronic device. In some situations, some of the one or more standard cells are unable to satisfy one or more electronic design constraints imposed by a semiconductor foundry and/or semiconductor technology node when placed onto the electronic device design real estate. In these situations, the one or more standard cell variations corresponding to these standard cells are placed onto the electronic device design real estate.

Abstract: An integrated circuit includes a middle active-region structure between a group-one active-region structure and a group-two active-region structure. The integrated circuit also includes a main circuit, a group-one circuit, and a group-two circuit. The main circuit includes at least one boundary gate-conductor intersecting the middle active-region structure. The group-one circuit includes a group-one isolation structure separating the group-one active-region structure into a first part in the group-one circuit and a second part in a first adjacent circuit. The group-two circuit includes a group-two isolation structure separating the group-two active-region structure into a first part in the group-two circuit and a second part in a second adjacent circuit.

Abstract: An integrated circuit (IC) layout includes various memory blocks arranged in rows and columns, and a memory controller arranged in parallel to one of the rows and the columns. The IC layout further includes metal routes that are created over the memory blocks for coupling the memory and the memory controller and facilitating signal routing therebetween. Each memory block is coupled with the memory controller by way of one or more metal routes. When the memory controller is arranged in parallel to the rows, the one or more metal routes are created over memory blocks that are included in a column, whereas when the memory controller is arranged in parallel to the columns, the one or more metal routes are created over memory blocks that are included in a row.

Abstract: A mobile power station for the purpose of recharging electric vehicles is provided. The charging station includes separate, but different, types of electrical generation capabilities. For example, the charging station may include two or more of: wind power, solar power and power generated from suspension mounted oscillators, which charge its battery pack over land. If desired, the mobile power station can be amphibious, as well, with the ability to navigate small and large bodies of water.

Abstract: The present invention discloses a method for modeling sequence impedance of a modular multilevel converter (MMC) under phase locked loop (PLL) coupling. The method includes the following steps: S1, establishing a circuit topology model; S2, establishing a PLL output characteristic model; S3, establishing a PI controller output control small signal model under a dq axis; S4, deducing a modulation small signal; and S5, calculating MMC port impedance. According to the method, a precise MMC port impedance model is established by analyzing a double mirror frequency coupling effect in the output of a modulation signal in a control link caused by a phase angle disturbance and comprehensively considering the combination of the multi-harmonic coupling effect of an MMC.

Abstract: In an embodiment, an airport electric vehicle charging system includes a current transducer electrically coupled with a power source; a solid state converter electrically coupleable with an aircraft at or near an airport gate and configured to provide and maintain power to the aircraft; and a controller. The system further includes a first feedback loop between the controller and the current transducer; a second feedback loop between the controller and the solid state converter; and a battery charger electrically coupled with the power source and configured to charge one or more electric vehicles. The first feedback loop provides a first feedback signal generated by the current transducer to the controller. The second feedback loop provides a second feedback signal generated by the solid state converter to the controller. The battery charger is configured to consume power from the power source in accordance with the first and second feedback signals.

Abstract: On-the-fly multi-bit flip-flop (MBFF) generation is provided by selecting at least two flip-flop blocks from a plurality of candidate flip-flop blocks; identifying a control block from a plurality of candidate control blocks, the control block being identified based on operational specifications of the selected flip-flop blocks; and generating a multi-bit flip-flop instance based on the selected flip-flop blocks and the identified control block.

Abstract: An electronic watch may include a housing, a display positioned at least partially within the housing, a transparent cover coupled to the housing and at least partially covering the display, a battery, and a coil coupled to the battery and configured to, during a battery charging operation, supply a first current to the battery and, during a haptic output operation, receive a second current from the battery to produce a haptic output. The electronic watch may further include a ferromagnetic element positioned at least partially within the housing and movable relative to the housing. The second current may cause the coil to produce a magnetic field, and the haptic output may be produced as a result of an interaction between the magnetic field and the ferromagnetic element that causes the ferromagnetic element to move relative to the housing.

Abstract: An apparatus for implementing a power distribution system for electric vehicles charging within a structure that includes a battery for storing electrical energy. A power node module connects to an electrical grid of the structure at a preexisting load point to receive an electric current at a first power level. The power node module charges the battery responsive to the received electric current at the first power level and generates a charging current at a second power level for charging a connected electric vehicle using the stored electrical energy of the battery responsive to a received charging control signal. At least one charger connector connected to the power node module connects the connected electric vehicle to receive the charging current.

Abstract: Process for determining defects in cells of a circuit is provided. A layout of a circuit is received. The layout comprises a first cell and a second cell separated by a boundary circuit. Bridge pairs for the first cell and the second cell is determined. The bridge pairs comprises a first plurality of boundary nodes of the first cell paired with a second plurality of boundary nodes of the second cell. Bridge pair faults between the bridge pairs are modeled. A test pattern for the bridge pair faults is generated.

Abstract: Disclosed is a method of placing a semiconductor device, the method being performed by a computing device, the method including: receiving information about a prohibited area designated so that a semiconductor device is not placed; and training a neural network model to place a semiconductor device based on characteristic information of the semiconductor device and the information about the prohibited area.

Abstract: Described herein are embodiments of methods and apparatus for determining the SoC and SoH a lithium ion battery and for restoring capacity to a lithium ion battery. Some embodiments provide a method and apparatus including an ultrasound transducer designed to measure characteristics of a lithium ion battery in order to determine the SoC and SoH of the lithium ion battery, and to disrupt the SSEI layer inside the lithium ion battery. Several other methods for determination of SoC and SoH and disruption of the SSEI layer are also described. Use of such methods and apparatus may be advantageous in assessing a state of the lithium ion battery, as well as rejuvenating a lithium ion battery and increasing its life span.

Abstract: An electrochemical cell management system comprising an electrochemical cell and at least one controller configured to control the cell such that, for at least a portion of a charge cycle, the cell is charged at a charging rate or current that is lower than a discharging rate or current of at least a portion of a previous discharge cycle. An electrochemical cell management method. An electrochemical cell management system comprising an electrochemical cell and at least one controller configured to induce a discharge of the cell before and/or after a charging step of the cell. An electrochemical cell management method. A electrochemical cell management system comprising an electrochemical cell and at least one controller configured to: monitor at least one characteristic of the cell and, based on the at least one characteristic of the cell, induce a discharge and/or control a charging rate or current of the cell.

Abstract: Methods for analyzing electromigration (EM) in an integrated circuit (IC) are provided. A layout of the IC is obtained. A metal segment is selected from the layout according to a current simulation result of the IC. Two first vias are formed over and in contact with the metal segment in the layout. EM rule is kept on the metal segment when a distance between the two first vias is greater than a threshold distance. The EM rule is relaxed on the metal segment when the distance between the two first vias is less than or equal to the threshold distance.

Abstract: A method includes specifying a target memory macro, and determining failure rates of function-blocks in the target memory macro based on an amount of transistors and area distributions in a collection of base cells. The method also includes determining a safety level of the target memory macro, based upon a failure-mode analysis of the target memory macro, from a memory compiler, based on the determined failure rate.

Abstract: A Register Transfer Level (RTL) representation is recovered from a netlist representing an integrated circuit (IC). The netlist is converted to a graph comprising nodes belonging to a set of node types and edges connecting the nodes. The set of node types includes an instance node type representing an electronic component and a wire node type representing signal transfer between components. The graph is converted to a standardized graph by replacing subgraphs of the graph with standardized subgraphs. An RTL representation of the standardized graph is generated by operations including building signal declarations in a hardware description language (HDL) from the wire nodes of the standardized graph and building signal assignments in the HDL from instance nodes of the standardized graph.

Abstract: Aspects described herein relate to obtaining a mask pattern using a cost function gradient (CFG) generated from a Jacobian matrix generated from a perturbation look-up table (PLT). In an example method, a PLT is populated (108). Each table entry of the PLT is based on a respective perturbed intensity signal. The respective perturbed intensity signal is based on a simulated signal received at an image surface using a mask pattern having a perturbed element of the mask pattern. The mask pattern is for a design of an integrated circuit. A matrix is populated (110) using the PLT and a target intensity signal. The target intensity signal is based on a signal received at the image surface to form target features at the image surface. A CFG is defined (112) based on the matrix. An analysis is performed (114) on the mask pattern based on the CFG.

Abstract: Techniques are presented for scheduling the charging of electric vehicles (EVs) that protect the resources of local low voltage distribution networks. From utilities, data on local low voltage distribution networks, such as the rating of a distribution transformer through which a group of EVs are supplied, is provided to a load manager application. Telematics information on vehicle usage is provided from the EVs, such as by way of the original equipment manufacturer. From these data, the load manager application determines schedules for charging the group of EVs through a shared low voltage distribution network so that the capabilities of the local low voltage distribution network are not exceeded while meeting the needs of the EV user. Charging schedules are then transmitted to the on-board control systems of the EVs for implementation.