Abstract: A testing device and probe elements thereof are provided. The testing device includes a circuit substrate, a plurality of probe elements, a first housing and a second housing. The plurality of probe elements are independent of each other and arranged at fixed intervals. Each probe element comprises a body, a first contact section and a second contact section. The body is provided with a plurality of strip-shaped perforations, and the body includes a first lateral side and a second lateral side opposite to each other. The first contact section is connected to the first lateral side, and the second contact section is connected to the second lateral side. The extension direction of the first contact section relative to the body and the extension direction of the second contact section relative to the body are distinct from each other.

Abstract: A probe card device includes a printed circuit board (PCB), a space transformer, and a high-speed flexible printed circuit (FPC). The PCB includes a plurality of first connecting bodies coupled to a tester, and a plurality of second connecting bodies. The space transformer includes a plurality of connecting bodies disposed on a first surface of the space transformer and coupled to the plurality of second connecting bodies of the printed circuit board, a plurality of general contact pads disposed on a second surface of the space transformer and contacted with a plurality of first probes, and a plurality of high-speed contact pads disposed on the second surface of the space transformer and contacted with a plurality of second probes. The high-speed FPC has a first connecting terminal coupled to the tester, and a second connecting terminal coupled to the plurality of high-speed contact pads.

Abstract: A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.

Abstract: A probe apparatus includes a chuck configured to support a wafer, a track surrounding the chuck, a tester disposed on the track and having a probe. The tester is configured to move around the wafer along a circumferential direction. The probe apparatus also includes a processing unit in communication with the tester and configured to control a movement of the tester.

Abstract: An object is to enhance the durability of substrates of a probe substrate and/or the probe substrate and a member to be joined.

Abstract: A testing apparatus for Devices Under Test (DUTs) includes at least one intake damper and at least one exhaust damper. At least one fan moves recirculated fluid and exterior fluid across one or more DUTs inside the testing apparatus. In one aspect, the testing apparatus includes a door to provide access to a chamber and the door includes at least one channel. At least a portion of the fluid flows through the at least one channel of the door. In another aspect, the door is configured to provide access to a chamber from the front of the chamber and the fluid is moved in a direction across the one or more DUTs substantially from the front of the chamber towards a rear of the chamber.

Abstract: The present disclosure provides a probe cable assembly comprising a probe interface configured to couple to a measurement interface and to receive a differential signal, a measurement output interface configured to output the differential signal, and a cable arrangement electrically arranged between the probe interface and the measurement output interface and configured to conduct the differential signal between the probe interface and the measurement output interface, the cable arrangement comprising a cable, a plurality of magnetic elements arranged around at least a section of the length of the cable, wherein each magnetic element is separated by a gap from adjacent magnetic elements, and a plastically deformable guiding element configured to fix the cable arrangement with a predetermined relative position between the probe interface and the measurement output interface.

Abstract: A semiconductor fabricating apparatus may include a probe card, a test head, a support and a chamber wall. The probe card may include a plurality of probing needles. The probe card may be installed at the test head. The support may be configured to receive a wafer including a plurality of test pads making contact with the probing needles. The chamber wall may be configured to receive the support. The chamber wall may define a chamber in which a probe test may be performed. At least one of the probe card and the support, the probe card and the test head, and the test head and the chamber wall may be combined with each other by a magnetic module.

Abstract: A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.

Abstract: A method includes providing a test structure above a tester, wherein the test structure includes a load board including a first and second connectors, a first socket electrically connected to the first and second connectors of the load board, and a second socket electrically isolated from the first connector of the load board and electrically connected to the second connector of the load board. A first and second semiconductor dies are disposed respectively on the first and second sockets. A test signal to the first semiconductor die and the second semiconductor die through the second connector of the load board are simultaneously applied by using the tester. A first signal of the first semiconductor die through the first connector is read by using the tester. Whether the first semiconductor die is disturbed by the second semiconductor die is determined according to the first signal.

Abstract: A test fixture for PCB components is described herein. The test fixture comprises a shim with an aperture configured to direct RF energy from a component of a PCB, via an end of the PCB, and to a top clamp of the test fixture. The end of the PCB may correspond to a cut line of a destructive test. The test fixture also comprises the top clamp with a test port and a taper configured to direct the RF energy from the aperture to the test port. The test fixture also comprises a bottom clamp attached to the top clamp to retain the PCB between the top and bottom clamps for testing. The test fixture allows for quick mounting of the PCB and testing of the component without modifying a design of the PCB or requiring specific drilling of the PCB.

Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.

Abstract: Example devices and methods for compensating for monitoring a surge protection device are provided. In some embodiments, a device is configured to couple to a surge protection device. The device comprises a processor that is capable of sending a DC current signal. A serial data interface is electrically connected to the processor and includes at least one shift register. The device also comprises a multiplexer coupled to the serial data interface. The serial data interface is operable to direct the DC current through the multiplexer. The device also comprises an analog to digital converter (optionally embedded within the processor) that is operable to output a digital signal corresponding to a voltage induced by the DC current signal. Returned DC signals represent surge protection device's health and a multitude of other surge module information.

Abstract: A testing apparatus for a semiconductor package includes a circuit board, testing patterns and a socket. The circuit board has a testing region and includes a plurality of testing contacts and a plurality of signal contacts distributed in the testing region. The testing patterns are embedded in the circuit board and electrically connected to the testing contacts, where each of the testing patterns includes a first conductive line and a second conductive line including a main portion and a branch portion connected to main portion. The first conductive line is connected to the main portion. The socket is located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.

Abstract: Evaluation board (EVB) assemblies or stacks utilized in tuning electronic modules are disclosed, as are methods for tuning such modules. In embodiments, the module testing assembly includes an EVB and an EVB baseplate. The EVB includes, in turn, an EVB through-port extending from a first EVB side to a second, opposing EVB side; and a module mount region on the first EVB side and extending about a periphery of the EVB through-port. The module mount region is shaped and sized to accommodate installation of a sample electronic module provided in a partially-completed, pre-encapsulated state fabricated in accordance with a separate thermal path electronic module design. A baseplate through-port combines with the EVB through-port to form a tuning access tunnel providing physical access to circuit components of the sample electronic module through the EVB baseplate from the second EVB side when the sample electronic module is installed on the module mount region.

Abstract: The semiconductor inspecting method includes following steps. First, a first position of a probe needle from above is defined by adopting a vision system of a semiconductor inspecting system. Then, a first relative vertical movement between the probe needle and the pad is made by adopting a driving system of the semiconductor inspecting system. Thereafter, a minimum change in position of the probe needle corresponding to the first position is recognized by adopting the vision system of the semiconductor inspecting system. Next, the first relative vertical movement is stopped by adopting the driving system of the semiconductor inspecting system.

Abstract: A current transformer having a body having an upper half and a lower half hingedly connected to the upper half, a pair of ferrite cores located within one of the upper half and the lower half of the body, the pair of ferrite cores defining a gap formed between each ferrite core of the pair of ferrite cores, and a sensor located within the gap formed between each ferrite core of the pair of ferrite cores.

Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.

Abstract: Aspects of the invention include a wafer test device with a conformal laminate and rigid probes extending from the laminate to form an electrical connection with a microcircuit under test. The wafer test device also includes a spring plate on a side of the laminate that is opposite a side from which the rigid probes extend. The spring plate includes a conformal inner frame and a rigid outer frame. The laminate is attached to the inner frame of the spring plate.

Abstract: The probe assembly operates with a circuit board test apparatus and includes a main test probe and a secondary test probes. The probe assembly is capable of moving in X, Y and Z directions relative to a circuit board being tested (UUT). The two test probes are movable linearly relative to each other and rotatable together so as to accurately locate the two probes on selected pins on the UUT, for receiving signals from the selected pins, The received signals are transmitted to a display apparatus.