Abstract: A storage controller receives a command from a host application to perform a point-in-time backup of a source dataset to a storage cloud. The storage controller generates a target dataset via a point-in-time copy of the source dataset, and a mapping that indicates a correspondence between locations of the source dataset and locations of the target dataset. The storage controller copies the target dataset to the storage cloud to generate a backup dataset that is the point-in-time backup of the source dataset, wherein the backup dataset is accessible via reference to the locations of the source dataset.

Abstract: A memory controller includes a first flash translation layer (FTL) generating a physical address corresponding to a first type logical address received from a host on the basis of information about the first memory blocks, a second FTL generating a physical address corresponding to a second type logical address received from the host on the basis of information about the second memory blocks, and a memory control unit controlling the first memory area or the second memory area to perform an operation on the physical address corresponding to the first type logical address or the physical address corresponding to the second type logical address, wherein the first FTL provides the second FTL with block request information for requesting use of the second memory blocks, and generates the physical address corresponding to the first type logical address received from the host on the basis of block allocation information provided by the second FTL.

Abstract: A system includes a memory device having multiple of dice and a processing device operatively coupled to the memory device. The processing device performs operations including receiving memory operations to program sets of pages of data across at least a subset of the plurality of dice and identifying a plurality of the sets of pages experiencing a variation in a data state metric satisfying a threshold criterion. The operations further include partitioning, into a set of partitions, a set of pages of the plurality of the sets of pages, programming the set of partitions to the plurality of dice, and storing, in a metadata table, at least one bit to indicate that the first set of pages is partitioned.

Abstract: A memory system includes a non-volatile memory device and a controller. The non-volatile memory device includes plural memory groups storing plural chunks. The controller is capable of generating the plural chunks including data chunks and parity chunks based on original data, assign different priorities to the data chunks and the parity chunks, and recovering at least one chunk among the plural chunks based on the different priorities when an operation regarding the at least one chunk fails.

Abstract: Storage devices are divided into subgroups and assigned to subsystems based on data input and data output frequencies of the subsystems. Each subgroup of storage devices is associated with a corresponding subsystem. A subsystem with higher data input and data output frequencies is assigned a higher number of solid state drives than a subsystem with lower data input and data output frequencies.

Abstract: The present disclosure relates to a digital asset conflict resolution system that provides conflict resolution of composite-part-based synchronized digital assets. In particular, the digital asset conflict resolution system detects conflicts within composite-part-based digital assets and resolves the conflicts at a composite-part level (i.e., composite-part level) within the digital asset based on format-specific rules. In various embodiments, the digital asset conflict resolution system utilizes format-specific rules and rule sets to automatically resolve conflicts at the composite-part level within a digital asset without duplicating the digital asset and without requiring immediate user involvement.

Abstract: Aspects of a storage device are provided which allow for identification of control page patterns from previous read commands and prediction of control pages to load in advance for subsequent read commands. The storage device includes a memory configured to store data and a plurality of control pages. Each of the control pages includes a plurality of logical addresses associated with the data. A controller is configured to receive from a host device a plurality of read commands associated with a sequence of the control pages. The controller is further configured to identify and store a control page pattern based on the sequence of control pages and to predict one or more of the control pages from one or more of the other control pages in the sequence in a subsequent plurality of read commands.

Abstract: The invention relates to an apparatus, a method, and a non-transitory computer program product for programming flash administration tables. The non-transitory computer program product includes program code to: periodically determine whether user data that has been programmed into a current block of a flash module satisfies a random-write condition; and update a record of a host-to-flash (H2F) sub-table according to content of a flash-to-host (F2H) table for the current block when user data that has been programmed into the current block of the flash module satisfies the random-write condition.

Abstract: Exemplary methods, apparatuses, and systems include a controller to manage memory proximity disturb. The controller identifies a first memory location in response to an access of a second memory location, the first memory location storing a first value. The controller updates a first disturb value by a first amount, the first disturb value representing a cumulative disturb effect on the first value in the first memory location by accesses to a first plurality of memory locations proximate to the first memory location, the first plurality of memory locations including the second memory location.

Abstract: A system is provided to receive a request to write data to a non-volatile memory, wherein the data is associated with a logical block address. The system classifies the data into a category based on an access frequency corresponding to the logical block address, and assigns the data to a channel based on the classified category. The system writes the data to the non-volatile memory via the assigned channel.

Abstract: A provided a storage device configured to support a number of namespaces. The storage device includes a memory and a controller coupled to the memory. The controller includes a host interface layer and a flash translation layer configured to report to the host interface layer a first over-provisioning chunk from an over-provisioning pool and a first chunk separate from the over-provisioning pool. The controller is configured to receive a command at the host interface layer to utilize a portion of the memory for a first namespace from among the number of namespaces and the first namespace includes an unaligned chunk. The controller is configured to utilize the first over-provisioning chunk as the unaligned chunk of the first namespace. A number of over-provisioning chunks to be utilized as unaligned chunks is less than the number of namespaces.

Abstract: According to one embodiment, a memory system stores a part of a logical-to-physical address translation table stored in a nonvolatile memory, as a first cache, in a random-access memory, and stores a compressed logical-to-physical address translation table obtained by compressing the logical-to-physical address translation table, as a second cache, in the random-access memory. The memory system stores first information indicative of a part of a first address translation data, in a first area of a first entry of the second cache where first compressed address translation data is stored. When executing processing of checking a part of the first address translation data, the memory system refers to the first information stored in the first entry of the second cache.

Abstract: In the embodiment a determination is made, for one or more applications being executed by the computing system, of an amount of the first or second memory being used by the one or more applications. Based on the determination, a portion of the memory resources of the third memory are configured to function with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is not sufficient for the memory needs of the one or more applications and a portion of the memory resources of the third memory are removed from functioning with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is more than is needed for the memory needs of the one or more applications.

Abstract: A method for dynamically configuring a storage system to facilitate independent scaling of resources is provided. The method includes detecting a change to a topology of the storage system consisting of different sets of blades configured within one of a plurality of chassis and reconfiguring the storage system to change an allocation of resources to one or more authorities responsive to detecting the change to the topology of the storage system.

Abstract: A storage controller is configured to communicate with a host over a first storage area network. Data controlled via the storage controller is mirrored to another storage controller over a second storage area network. The storage controller receives a request from the host to provide read diagnostic parameters of the second storage area network. In response to receiving the request, the storage controller secures the read diagnostic parameters of the second storage area network. The storage controller transmits the read diagnostic parameters of the second storage area network to the host.

Abstract: A memory system includes a memory device and a controller. The controller performs multiple read operations on a target block, using a first duster of read threshold voltages. The controller generates a second duster of read threshold voltages using the first cluster when a difference between the maximum number of fail bits and the minimum number of fail bits associated with the multiple read operations exceeds a threshold. The controller splits pages in the target block into a first group of pages for the first cluster and a second group of pages for the second cluster. The controller performs additional read operations on the first group of pages using the first cluster and on the second group of pages using the second cluster.

Abstract: Techniques support and perform data replication of a virtual machine. Changed data tracking is performed on a storage unit associated with the virtual machine in a storage system, to obtain changed data related information related to the virtual machine, wherein the changed data related information indicates a range and a type of data change related to the virtual machine; from the changed data related information, changed data related information related to the virtual machine within a specified range is obtained in response to receiving an obtainment request of the storage system for changed data related information within the specified range; and the changed data related information within the specified range is sent to the storage system. Accordingly, changed data related information can be provided to a storage system, such that the storage system can implement an optimized data replication operation based on the changed data related information.

Abstract: A cache system having cache sets, and the cache sets having a first cache set configured to provide a first physical output upon a cache hit and a second cache set configured to provide a second physical output upon a cache hit. The cache system also has a control register and a mapping circuit coupled to the control register to map respective physical outputs of the cache sets to a first logical cache and a second logical cache according to a state of the control register. The first logical cache can be a normal or main cache for non-speculative executions by a processor and the second logical cache can be a shadow cache for speculative executions by the processor.

Abstract: The invention introduces a method for handling sudden power off recovery, performed by a processing unit of an electronic apparatus, to include: driving a flash interface to program data sent by a host into pseudo single-level cell (pSLC) blocks of multiple logical unit numbers (LUNs) in a single-level cell (SLC) mode with multiple channels after detecting that the electronic apparatus has suffered a sudden power off (SPO). The pSLC blocks are reserved from being written any data in regular operations until the SPO is detected.

Abstract: The present disclosure includes apparatuses and methods related to a memory system with cache line data. An example apparatus can store data in a number of cache lines in the cache, wherein each of the number of lines includes a number of chunks of data that are individually accessible.