Abstract: An epitaxial structure including a first epitaxial layer, a second epitaxial layer, and an interface treatment layer is provided. The first epitaxial layer is an ohmic contact layer. The second epitaxial layer is disposed on the first epitaxial layer and is a phosphide compound layer, where a material of the second epitaxial layer is different from a material of the first epitaxial layer. The interface treatment layer contacts the first epitaxial layer and the second epitaxial layer and is located between the first epitaxial layer and the second epitaxial layer. An image contrast ratio of a transmission electron microscope (TEM) of the interface treatment layer to the first epitaxial layer and an image contrast ratio of the TEM of the interface treatment layer to the second epitaxial layer are both greater than 1.005. A method for forming an epitaxial structure is also provided.

Abstract: A III-nitride LED with simultaneous visible and ultraviolet (UV) emission, in which the visible emission is due to conventional InGaN active region mechanisms and the UV emission occurs due to Auger carrier injection into a UV light emitting region, such as impurity-doped AlGaN. The primary application for the III-nitride LED is general airborne pathogen inactivation to prevent the transmission of airborne-mediated pathogens while being safe for humans.

Abstract: A display device includes an active layer, a gate electrode on the active layer, a conductive layer on the gate electrode and connected to the active layer, a pixel electrode which is on the conductive layer and connected to the conductive layer, and a connection electrode which connects the conductive layer connected to the active layer, to the pixel electrode. The connection electrode which connects the conductive layer connected to the active layer, to the pixel electrode, has a tensile strength less than or equal to a tensile strength of the active layer.

Abstract: A method for manufacturing a display device is provided. The method includes: placing a light emitting element on a substrate including cell areas; placing an insulating layer on the light emitting element; and separating the cell areas from each other. Light emitting panels are located on the substrate, correspond to each of the cell areas, and include the light emitting element. The separating of the cell areas from each other includes electrically separating the light emitting panels from each other. The electrically separating the light emitting panels from each other is performed after the placing of the insulating layer.

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

Abstract: An image sensor includes a first unit. The first unit includes a first photodiode having a first dimension, a second photodiode disposed adjacent the first photodiode and having a second dimension that is greater than the first dimension, a first color filter overlapping the first photodiode and the second photodiode, and a first internal reflector disposed in the first color filter and overlapping the first photodiode. The first internal reflector has an inclined light receiving surface inclined from a top surface of the first color filter toward the second photodiode, and a refraction index of the first internal reflector is smaller than a refraction index of the first color filter.

Abstract: A semiconductor package includes a base film having a first mount section, a first folding section, a second folding section, and a second mount section. A first semiconductor chip is disposed on the first mount section of the base film. A second semiconductor chip is disposed on the second mount section of the base film. Test pads are disposed on the first or second folding sections of the base film and is connected to each of the first and second semiconductor chips. Connection pads are disposed on the first or second mount sections of the base film and are connected to each of the first and second semiconductor chips. The first and second folding sections vertically overlap each other. The test pads are interposed between and buried by the first and second folding sections.

Abstract: An imaging element, includes a pixel array in which a plurality of pixels including photoelectric conversion elements are arranged in a two-dimensional array, and an optical element array in which optical elements composed of a plurality of columnar structure bodies arranged opposite to a pixel array and guiding incident light to a corresponding photoelectric conversion element are arranged in a two-dimensional array, wherein the plurality of columnar structure bodies are formed in a width having a phase characteristic for guiding light to a photoelectric conversion element directly below a columnar structure body in accordance with an incident angle of the incident light of each columnar structure body when viewed in a plan view and are formed at a same height when viewed in a side view.

Abstract: An image sensor includes a color unit pixel comprising sub-pixels arranged in an m×n matrix on a substrate, and a pixel isolation structure isolating the sub-pixels from each other in the color unit pixel. The pixel isolation structure includes an outer isolation film surrounding the color unit pixel, at least one inner isolation film including a portion between two sub-pixels, which are adjacent to each other, among the sub-pixels, a doped isolation liner covering opposite sidewalls of the at least one inner isolation film, and at least one doped isolation pillar contacting at least two sub-pixels selected from the sub-pixels. The at least one doped isolation pillar and the at least one inner isolation film are arranged to define a size of a partial region of each of the sub-pixels.

Abstract: Provided is a display substrate. The display substrate includes a base substrate which includes a first surface; a first transistor which includes a first active layer and a first gate insulative layer; a first insulative layer; and a second transistor which includes a second active layer and an orthographic projection of the second active layer on the first surface is staggered from an orthographic projection of the first active layer on the first surface.

Abstract: Disclosed is a magnetic field-free spin-orbit torque switching device including a sapphire miscut substrate. More particularly, a spin-orbit torque switching device according to an embodiment includes a substrate having a step-terrace structure; and an input device formed on the substrate and provided with a heavy metal layer HM and a ferromagnetic layer FM.

Abstract: A structure includes a first air gap including a first opening defined in a first dielectric layer and a second dielectric layer over the first opening and closing an end portion of the first opening. A second air gap may be over at least a portion of the first air gap. The second air gap includes a second opening defined in the second dielectric layer and a third dielectric layer over the second opening and closing an end portion of the second opening. The second air gap has a pointed lower end portion. In another version, the structure includes a first air gap in a first dielectric layer, a second dielectric layer over the first air gap, and a discrete dielectric member positioned in the second dielectric layer and aligned over the first air gap.

Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a metal matrix composite layer on the backside surface, wherein the metal matrix composite layer has a filler material disposed therein to reduce the coefficient of thermal expansion thereof. The filler material may be a plurality of graphitic carbon filler particles, wherein the plurality of graphitic carbon filler particles has an average aspect ratio of greater than about 10, or the filler material may be a plurality of diamond particles, wherein the filler material is clad with a metal material.

Abstract: An integrated circuit structure in which a gate overlies channel region in an active area of a first transistor. The first transistor includes a channel region, a source region and a drain region. A conductive contact is coupled to the drain region of the first transistor. A second transistor that includes a channel region, a source region a drain region is adjacent to the first transistor. The gate of the second transistor is spaced from the gate of the first transistor. A conductive via passes through an insulation layer to electrically connect to the gate of the second transistor. An expanded conductive via overlays both the conductive contact and the conductive via to electrically connect the drain of the first transistor to the gate of the second transistor.

Abstract: The present feature relates to a solid-state imaging device that allows generation of flare to be reduced and a manufacturing method therefor. A solid-state imaging device according to the present feature includes a semiconductor substrate having a pixel area having a plurality of pixels provided therein, and a transparent structure joined to a light incident surface side of the semiconductor substrate with resin and having a hollow structure. In the solid-state imaging device according to the present feature, the transparent structure includes a glass substrate and a transparent film, and the hollow structure is formed between the glass substrate and the transparent film. The present feature can be applied for example to imaging devices.

Abstract: An integrated chip including includes a substrate having a first side and a second side opposite the first side. The integrated chip further includes a first photodetector positioned in a first pixel region within the substrate. A floating diffusion region with a first doping concentration of a first polarity is positioned on the first side of the substrate in the first pixel region. A first body contact region with a second doping concentration of a second polarity different from the first polarity is positioned on the second side of the substrate in the first pixel region.

Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes: a substrate, a first dielectric layer, a second dielectric layer, and a gate structure, where an active region is provided in the substrate, and a source region of a first doping type and a drain region of the first doping type are disposed in the active region; the first dielectric layer is disposed on the substrate and covers a part of the source region and/or a part of the drain region; the second dielectric layer is disposed on the substrate and connected to the first dielectric layer, a dielectric constant of the second dielectric layer is greater than a dielectric constant of the first dielectric layer.

Abstract: An image sensor includes a color unit pixel comprising sub-pixels arranged in an m×n matrix on a substrate, and a pixel isolation structure isolating the sub-pixels from each other in the color unit pixel. The pixel isolation structure includes an outer isolation film surrounding the color unit pixel, at least one inner isolation film including a portion between two sub-pixels, which are adjacent to each other, among the sub-pixels, a doped isolation liner covering opposite sidewalls of the at least one inner isolation film, and at least one doped isolation pillar contacting at least two sub-pixels selected from the sub-pixels. The at least one doped isolation pillar and the at least one inner isolation film are arranged to define a size of a partial region of each of the sub-pixels.

Abstract: A light emitting display apparatus according to an aspect of the present disclosure may include a first driving transistor and a second driving transistor spaced apart from each other on a substrate, a first anode connected to the first driving transistor and overlapping with the second driving transistor, a second anode connected to the second driving transistor, and a shielding metal between the second driving transistor and the first anode. The second anode may have a smaller area than the first anode, and the shielding metal may reduce a parasitic capacitance associated with the second anode and the first anode.

Abstract: There is provided a solid-state imaging apparatus that allows to suitably dispose a translucent member on a substrate including a photoelectric conversion portion. The solid-state imaging apparatus of the present disclosure has: a substrate that includes a photoelectric conversion portion; a lens that is disposed on the substrate; and a translucent member that is disposed on the lens. The translucent member includes a plurality of protruded portions that are disposed in a two-dimensional array form on an upper surface of the translucent member.