Abstract: Provided is a switching method for supporting different operating systems by an application function, including: establishing a one-to-one mapping relationship table between switching setting signals and unique switching setting codes, wherein the application function in the different operating systems corresponds to the different unique switching setting codes, and the unique switching setting codes are capable of uniquely identifying and activating the application function supported by the different operating systems; detecting the switching setting signal output by the operating system; and switching an operating system of a device to the operating system corresponding to the switching setting signal, wherein the device is configured with the application function and supports the different operating systems.

Abstract: Techniques are disclosed that pertain to synchronizing power states between integrated circuit dies. A system includes an integrated circuit that includes a plurality of integrated circuit dies coupled together. A particular integrated circuit die may include a primary power manager circuit and one or more remaining integrated circuit dies include respective secondary power manager circuits. The primary power manager circuit is configured to issue a transition request to the secondary power manager circuits to transition their integrated circuit dies from a first power state to a second power state. A given secondary power manager circuit is configured to receive the transition request, transition its integrated circuit die to the second power state, and issue an acknowledgement to the primary power manager circuit that its integrated circuit die has been transitioned to the second power state.

Abstract: Techniques are disclosed relating to data rate limiting based on toggle rate. In some embodiments, toggle detector circuitry determines a toggle rate between consecutive clock cycles for node circuitry that communicates via a data bus and provides toggle information to data rate limiter circuitry based on the determined toggle rate. The data rate limiter circuitry may limit data rate based on toggle information and the one or more limit inputs. Toggle detector circuitry may be configured to aggregate the toggle rate over multiple cycles using a rolling multi-cycle window, generate toggle information for windows of different lengths, generate toggle information for different data, or some combination thereof.

Abstract: Disclosed is a supercapacitor based automatic energy-saving system of a direct-current high-voltage beam pumping unit. The system comprises a frequency converter, wherein a direct-current bus of the frequency converter is combined with a direct-current contactor, a BUCK/BOOST power conversion circuit and an energy storage unit to form a series loop. The system further comprises a single-chip microcomputer system mainboard, which is in communication connection with the energy storage unit. A BUCK/BOOST pre-stage PWM processing circuit is connected to the single-chip microcomputer system mainboard and the BUCK/BOOST pre-stage PWM processing circuit includes a dead zone logic processing circuit, an optical coupling isolator, an IGBT power drive and protection circuit.

Abstract: In one implementation, a device includes a set-reset architecture with multiple latches including a first latch, a second latch and a third latch. The first latch may receive a first data signal from first logic and provide a first latched data signal as a first output based on a clock signal. The second latch may receive a second data signal from second logic and provide a second latched data signal as a second output based on the clock signal. The third latch may receive a third data signal from third logic and provide a third latched data signal as a third output based on the clock signal.

Abstract: Systems and apparatus for adjusting power caps for computing system components includes: a power subsystem, one or more components, and a BMC (baseboard management controller) configured to: receive, from the power subsystem, an over-power signal indicating a draw on the power subsystem exceeding one or more limits of the power subsystem, and reduce, by a predetermined amount, a power cap for the one or more components.

Abstract: A power management system for managing power consumption of a digital signal processor (DSP) that implements a protection system, the power management system comprising: a power management block configured to: detect a parameter indicative of a power of an input signal to the DSP; compare the detected parameter to a threshold; and responsive to a determination that the detected parameter is less than the threshold, cause one or more processing blocks of the DSP to enter a low power mode of operation.

Abstract: An implementation of portable playback device power management involves launching a power coordinator background process, the power coordinator background process having multiple client programs and establishing respective inter-process communication (IPC) mechanisms between the multiple client programs and the power coordinator background process. The implementation further involves receiving, via the established IPC mechanisms from the multiple client programs, messages indicating that the respective client program is ready to suspend, and determining that each client program of the multiple client programs is ready to suspend. The implementation further includes sending instructions to the operating system to kernel suspend. While in kernel suspend, the playback device detects a particular trigger to kernel resume and in response, performs a kernel resume.

Abstract: A status monitoring system includes a status sensor configured to monitor a status of an electronic circuit. If the status monitoring system detects a status that exceeds a threshold, the status monitoring system records the details of the event on the electronic circuit. The status monitoring system operates in a low-power power mode during transit from a manufacturing facility to an installation location.

Abstract: Embodiments of the present application provide a power supply control method and apparatus of a server, and a power support unit of a server. The method includes: obtaining a target power supply power of a server to be powered; selecting, from a plurality of voltage converters deployed in a power support unit, one or more target voltage converters matched with the target power supply power; and controlling the one or more target voltage converters to supply power to the server, wherein each target voltage converter is configured for converting a power supply voltage of a power supply into a power supply voltage of the server. According to the present application, the problem in related art of low power supply efficiency of the power support unit can be solved, and the effect of improving the power supply efficiency of the power support unit is achieved.

Abstract: A system, method, apparatus and device for adjusting power consumption, and a medium are provided. The system includes a Power Supply Unit (PSU) and a Complex Programmable Logic Device (CPLD). An input end of the PSU is connected to a server, and the PSU is configured to receive an initial electrical signal of the server in real time, and determine a current power supply condition according to the initial electrical signal to obtain a final electrical signal. The CPLD is connected to an output end of the PSU, and the CPLD is configured to receive the final electrical signal, increase a power of the server when the final electrical signal is a signal representing that the current power supply condition is high output power, and decrease the power of the server when the final electrical signal is a signal representing that the current power supply condition is low output power.

Abstract: A processor includes a plurality of cores, at least two of which may execute redundantly, a configuration register to store a first synchronization domain indicator to indicate that a first core and a second core are associated with a first synchronization domain, and a power controller having a synchronization circuit to cause a dynamic adjustment to a frequency of at least one of the first and second cores to cause these cores to operate at a common frequency, based at least in part on the first synchronization domain indicator.

Abstract: Performance adaptation for an integrated circuit includes receiving, by a workload prediction system of a hardware processor, telemetry data for one or more systems of the hardware processor. A workload prediction is determined by processing the telemetry data through a workload prediction model executed by a workload prediction controller of the workload prediction system. A profile is selected, from a plurality of profiles, that matches the workload prediction. The selected profile specifies one or more operating parameters for the hardware processor. The selected profile is provided to a power management controller of the hardware processor for controlling an operational characteristic of the one or more systems.

Abstract: A method is presented for selectively throttling subsystems of a battery-powered computing device. The method comprises determining an amount of power consumed a plurality of rest-of-platform (ROP) subsystems of the battery-powered computing device. A total amount of power consumed by subsystems of a battery-powered computing device is determined. The subsystems including at least a system on a chip (SOC) and the plurality of ROP subsystems. Responsive to recognizing a condition where the amount of power consumed by the plurality of ROP subsystems is above an ROP power threshold, and where the total amount of power consumed increases above a first throttling threshold, one or more ROP subsystems are throttled.

Abstract: A distributed power control system is provided that can include a datacenter and a remote master control system. The datacenter can include (i) computing systems, (ii) a behind-the-meter power input system configured to receive power from a behind-the-meter power source and deliver power to the computing systems, and (iii) a datacenter control system configured to control the computing systems and the behind-the-meter power input system. The remote master control system can be configured to issue instructions to the datacenter that affect an amount of behind-the-meter power consumed by the datacenter. The datacenter control system can receive, from a local station control system configured to at least partially control the behind-the-meter power source, a directive for the datacenter to ramp-down power consumption, and in response to receiving the directive, cause the computing systems to perform a set of predetermined operations correlated with the directive.

Abstract: An integrated circuit may include multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances.

Abstract: A computer system, computer readable storage medium, and computer-implemented method for detecting if one or more processing devices have separately sourced power feeds. The method includes determining transmission of a first signal in a first electric path. The method also includes monitoring for a second signal in a second electric path that is different from the first electric path. The method further includes determining, subject to the monitoring, electrical isolation between the first electric path and the second electric path. The claimed computer-implemented method dynamically, and automatically, determines that power sources are separate, isolated, and redundant.

Abstract: Systems, methods, devices, and computer-implemented instructions for processor power management implemented in a compiler. In some implementations, a characteristic of code is determined. An instruction based on the determined characteristic is inserted into the code. The code and inserted instruction are compiled to generate compiled code. The compiled code is output.

Abstract: A processing method includes responding to a trigger condition being satisfied, starting a first application, and controlling the first application to perform a target operation corresponding to a target request to implement a first function different from a second function. The first application runs in a pre-operating system environment. The second function includes a function for initializing the pre-operating system environment. Data used to implement the first function and the second function is stored in different storage locations.

Abstract: Methods and apparatus for performing timed functions in battery-powered, wireless electronic devices, such as sensors or control modules. Such electronic devices comprise a main processor and a co-processor. When the main processor enters a quiescent state in order to preserve battery life, one or more timed functions are transferred from the main processor to the co-processor just before the main processor enters the quiescent state. When the co-processor determines that it is time to perform the timed function, the co-processor wakes the main processor in order for the main processor to perform the timed function.