Patents Examined by P. Hassanzadeh
  • Patent number: 6852195
    Abstract: An apparatus for low-damage, anisotropic etching of substrates having the substrate mounted upon a mechanical support located within an ac or dc plasma reactor. The mechanical support is independent of the plasma reactor generating apparatus and capable of being electrically biased. The substrate is subjected to plasma of low-energy electrons and a species reactive with the substrate. An additional structure capable of being electrically biased can be placed within the plasma to control further the extraction or retardation of particles from the plasma.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: February 8, 2005
    Assignee: Georgia Tech Research Corporation
    Inventors: Kevin P. Martin, Harry P. Gillis, Dmitri A. Choutov
  • Patent number: 6846428
    Abstract: Metal oxide films such as lithium niobate are formed in an amorphous state on a substrate such as lithium niobate and can be readily etched by conventional liquid or dry etchants. The amorphous film may then be converted by annealing to a crystalline form well suited to formation of electro-optical devices.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: January 25, 2005
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Leon McCaughan, Thomas F. Kuech, Dovas A. Saulys, Vladimir A. Joshkin, Aref Chowdhury
  • Patent number: 6834613
    Abstract: A plasma-resistant member used in a reaction chamber of a plasma treating apparatus is formed of a dense alumina sintered product having an average grain size of 18-45 &mgr;m, a surface roughness Ra of 0.8-3.0 &mgr;m and a bulk density of 3.90 g/cm3 or over.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: December 28, 2004
    Assignees: Toshiba Ceramics Co., Ltd., Tokyo Electron Limited
    Inventors: Akira Miyazaki, Keiji Morita, Sachiyuki Nagasaka, Shuji Moriya
  • Patent number: 6818562
    Abstract: A method and apparatus for operating a matching network within a plasma enhanced semiconductor wafer processing system that uses pulsed power to facilitate plasma processing.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 16, 2004
    Inventors: Valentin Todorow, John Holland, Nicolas Gani
  • Patent number: 6786176
    Abstract: A diamond film depositing apparatus and method are disclosed in which a uniform and large plasma is formed on a substrate having a diameter of larger than 100 mm without using a heated filament cathode, without applying a magnetic field thereto, and without using a ballast resistance. The thusly formed plasma is maintained stably for a long time, so that a diamond thick film having a diameter of larger than 4 inches and a thickness of over hundreds of &mgr;m can be deposited on a flat or curved substrate and also on a Si wafer.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: September 7, 2004
    Assignee: Korea Institute of Science and Technology
    Inventors: Wook-Seong Lee, Young Joon Baik, Kwang Yong Eun
  • Patent number: 6780340
    Abstract: A method for manufacturing an ejection head (10) or ejector suitable for ejecting in the form of droplets (16) a liquid (14) conveyed inside the ejection head (10), comprising a step of producing, from a silicon wafer, a nozzle plate (12) having at least one ejection nozzle (13); a step of producing, from another silicon wafer, a substrate (11) having at least one actuator (15) for activating the ejection of the droplets of liquid through the nozzle (13); and a step of joining the nozzle plate (12) and the substrate (11) together to form the ejection head, wherein this joining step comprises the production of a junction (25), made by means of the anodic bonding technology, between the substrate (11) and the nozzle plate (12), in such a way that, in the area of this junction (25), the ejection head (10) does not present structural discontinuities, and also possesses a resistance to chemical corrosion by the liquid (14) contained in the ejection head (10) at least equal to that of the silicon constituting both
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: August 24, 2004
    Assignee: Olivetti Tecnost S.p.A.
    Inventor: Renato Conta
  • Patent number: 6767428
    Abstract: An invention is provided for a chemical mechanical planarization apparatus. The apparatus includes a cylindrical frame, a polishing membrane attached to an end of the cylindrical frame, and a pad support disposed within the cylindrical frame and below the polishing membrane that is capable of differentially flexing the polishing membrane. The pad support can be air bearing that provides air pressure to the polishing membrane to differentially flex the polishing membrane during a CMP process. In a further aspect, the pad support can be in contact with the polishing membrane, and include mechanical elements that are capable of differentially flexing the polishing membrane during a CMP process. In addition, the apparatus can include a conditioner element disposed above the polishing membrane, and a conditioner pad support disposed below the polishing membrane and the conditioner element, wherein the conditioner element is capable of eroding the polishing membrane.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: July 27, 2004
    Assignee: Lam Research Corporation
    Inventors: Yehiel Gotkis, Aleksandar Owczarz, Rod Kistler
  • Patent number: 6767407
    Abstract: A substrate holding mechanism which is particularly adaptable to automatically centering a semiconductor wafer on a platen spider as the wafer is lowered from a wafer loading and unloading position to a wafer processing position in a medium current implanter such as a Varian EHP500. Upon subsequent placement of a mechanical clamp on the wafer to hold the wafer on the platen, the clamp fingers of the clamp engage the edge of the wafer with substantially uniform pressure to prevent micro-cracking or fracturing of the wafer.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: July 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chi-Fu Yu, Song-Yueha Lin, Hom-Chung Lin, Zuo-Chang Yen
  • Patent number: 6761771
    Abstract: A substrate-supporting apparatus, wherein a substrate is not warped or distorted and a film with uniform thickness is formed, is a semiconductor substrate-supporting apparatus which supports and heats semiconductor substrates inside a vacuum-pumped reaction chamber. On the substrate-supporting surface of the semiconductor substrate-supporting apparatus, a concave portion which includes a depression slanting from the peripheral portion to the center is provided, the semiconductor substrate is supported in a position where the peripheral portion of the back surface of the substrate contacts the slanting surface of the concave portion, and the concave portion is formed so that an interval between the center of the concave portion and the semiconductor substrate becomes the designated distance. The slanting surface of the concave portion may include a portion of a spherical surface or a conical surface.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: July 13, 2004
    Assignee: ASM Japan K.K.
    Inventors: Kiyoshi Satoh, Hiroki Arai
  • Patent number: 6758985
    Abstract: A method of removing a ceramic coating, such as a thermal barrier coating (TBC) of yttria-stabilized zirconia (YSZ), from the surface of a component, such as a gas turbine engine component. The method generally entails subjecting the ceramic coating to an aqueous solution of ammonium bifluoride, optionally containing a wetting agent, such as by immersing the component in the solution while maintained at an elevated temperature. Using the method of the invention, a ceramic coating can be completely removed from the component and any cooling holes, with essentially no degradation of the bond coat.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: July 6, 2004
    Assignee: General Electric Company
    Inventor: William C. Brooks
  • Patent number: 6758939
    Abstract: A laminated wear ring for a chemical mechanical planarization (CMP) apparatus provides improved control of the removal rate of material from the edge of a wafer during a polishing/planarization operation. The laminated wear ring includes a high stiffness stainless steel base and a plastic laminate. The high stiffness stainless steel base avoids flexing of the wear ring during polishing and thus provides control of the flexing of a polish pad against which the wafer surface is pressed. The plastic laminate protects the stainless steel base from attack by the polishing slurry and provides a buffer that protects the stainless steel base from mechanically damaging the wafer and vice versa.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: July 6, 2004
    Assignee: Speedfam-Ipec Corporation
    Inventors: David Marquardt, Wayne Lougher, Stephen C. Schultz
  • Patent number: 6746566
    Abstract: A voltage-isolating passageway for providing high voltage isolation between a component maintained at high DC voltage and a component maintained at a substantially lower voltage is described. The voltage-isolating passageway incorporates a transverse magnetic field across its passageway, which reduces the potential energy of charged particles (e.g., electrons) passing through the passageway. The reduction in electron potential energy reduces the energy of collisions between electrons and molecules and therefore reducing the likelihood of avalanche ionization. The voltage-isolating passageway includes a passageway and at least two magnets. The passageway has two openings and the two magnets are positioned along opposite and exterior surfaces of the passageway wherein the first and second magnets impose a magnetic field in a transverse direction with respect to a lengthwise axis of the passageway.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: June 8, 2004
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: James Daniel Olson, Jeffery Scott Coffer
  • Patent number: 6740196
    Abstract: A rapid thermal anneal (RTA) chamber having one or multiple openings in a chamber wall and a reflective index monitor in the opening or openings, respectively. The reflective index monitor or monitors each measures the infrared reflective index of the reflector plate of the rapid thermal anneal chamber, and sends a corresponding signal to a process controller, an alarm, or both a process controller and an alarm. In the event that the measured reflective index of the reflector plate deviates from the reflective index of a control, the process controller terminates heating operation of the chamber to prevent damage to the semiconductor wafer in the chamber. The alarm may be activated to alert personnel to the need for immediate replacement of the contaminated reflector plate.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: May 25, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Su Lee, Juin-Jie Chang, Ching-Shan Lu
  • Patent number: 6733619
    Abstract: The present invention relates to an integrated apparatus for monitoring wafers and for process control in the semiconductor manufacturing process, by means of at least two different measurements that can be installed inside any part of the semiconductor production line, i.e., inside the photocluster equipment, the CVD equipment or the CMP equipment. The apparatus comprises a measuring unit for performing at least one optical measurement in predetermined sites on said wafer, illumination sources for illuminating said wafer via measuring unit, supporting means for holding, rotating and translating the wafer and a control unit. The measuring unit comprises: at least two measuring sub-units, one of them being normal-incidence optical measuring system.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: May 11, 2004
    Assignee: Nova Measuring Instruments Ltd.
    Inventor: Moshe Finarov
  • Patent number: 6733593
    Abstract: A film deposition apparatus of the present invention includes a container forming a processing chamber for processing a target object, a mounting table which is provided in the processing chamber and on which the target object is mounted, a first heating apparatus provided in the mounting table, for heating the target object mounted on the mounting table, a first gas supply section provided in the container, for supplying processing gas into the processing chamber, the processing gas forming a high-melting-point metal-film layer on the target object mounted on the mounting table, a movable clamp for clamping a periphery of the target object and holding the target object on the mounting table, a second heating apparatus formed separately from the clamp, for heating the clamp indirectly, a gas flow path formed between the clamp and the second heating apparatus when the clamp is moved to a position where the clamp clamps the target object, and a second gas supply section for causing backside gas to flow into the
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: May 11, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Sumi Tanaka, Masatake Yoneda
  • Patent number: 6730174
    Abstract: An apparatus for replacing consumables of a vacuum chamber. A unitary removable shield assembly is provided to quickly replace consumables such as a shield. The shield assembly can include an upper adapter assembly, at least one shield member, a cover ring and an insulator member. The shield assembly is designed so that the consumables can be replaced in one step and allows the chamber to continue with its maintenance cycle.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: May 4, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Alan B. Liu, Ilya Lavitsky, Michael Rosenstein
  • Patent number: 6719874
    Abstract: A chemical mechanical planarization (CMP) system having a polishing pad, a carrier body for holding a wafer, a retaining ring, and an active retaining ring support is provided. The active retaining ring is defined by a circular ring having a thickness and a width. The circular ring is defined by an elastomeric material. The circular ring is configured to be placed between the retaining ring and the carrier body. The circular ring has a plurality of voids therein, and the plurality of voids are defined in locations around the circular ring. The circular ring has a compressibility level that is set by the elastomeric material and the plurality of voids.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: April 13, 2004
    Assignee: Lam Research Corporation
    Inventors: Yehiel Gotkis, Aleksander A. Owczarz, Miguel A. Saldana, David Wei, Damon Vincent Williams
  • Patent number: 6689220
    Abstract: A process system and a deposition method for depositing a highly controlled layered film on a workpiece is disclosed. The basic component of the present invention apparatus is a pulsing plasma source capable of either exciting or not-exciting a first precursor. The pulsing plasma source includes an energy source to generate a plasma, and a plasma adjusting system to cause the plasma to either excite or not-excite a precursor. The precursor could flow continuously (an aspect totally new to ALD), or intermittently (or pulsing, standard ALD operation process). The present invention further provides a method to deposit highly controlled layered film on a workpiece. The method comprises the steps of pulsing the plasma to excite/not-excite the precursors and the ambient to deposit and modify the depositing layers. This procedure then can be repeated alternately until the film reaches a desired thickness.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: February 10, 2004
    Assignee: Simplus Systems Corporation
    Inventor: Tue Nguyen
  • Patent number: 6685797
    Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: February 3, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
  • Patent number: 6676804
    Abstract: An electrostatic chuck 108 is provided on a lower electrode 106 provided inside a processing chamber 102 of an etching apparatus 100, and a conductive inner ring body 112a and an insulating outer ring body 112b are encompassing the outer edges of a wafer W mounted on the chuck surface. The temperatures of the wafer W and the inner and outer ring bodies 112a and 112b are detected by first˜third temperature sensors 142, 144 and 146. A controller 140 controls the pressure levels of He supplied to the space between the center of the wafer W and the electrostatic chuck 108 via first gas outlet ducts 114 and to the space between the outer edges of the wafer W and the electrostatic chuck 108 via second gas outlet ducts 116 and the quantity of heat generated by a heater 148 inside the outer ring body 112b based upon the information on the temperatures thus detected so that the temperatures of the wafer W and the inner ring body 112a are set roughly equal to each other.
    Type: Grant
    Filed: January 2, 2001
    Date of Patent: January 13, 2004
    Assignees: Tokyo Electron AT Limited, Japan Science and Technology Corp.
    Inventors: Chishio Koshimizu, Hiroyuki Ishihara, Kimihiro Higuchi, Koji Maruyama