Patents Examined by P. Hassanzadeh
  • Patent number: 6417111
    Abstract: A plasma processing method includes introducing at least one first processing gas into a processing chamber including a mounting stage supporting a substrate having a surface; generating a plasma in the first processing gas; introducing a second processing gas into a gas storage chamber separated from the processing chamber by a partition opposite the mounting stage and including a plurality of jet holes; and jetting neutral particles of the second processing gas from the gas storage chamber toward the substrate through the jet holes in a direction generally perpendicular to the surface of the substrate, thereby plasma processing the substrate.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: July 9, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuyasu Nishikawa, Hiroki Ootera, Tatsuo Oomori
  • Patent number: 6413359
    Abstract: Uniformity of plasma density is enhanced at high plasma density and with reduced gas cracking and/or without electron charging of a workpiece by limiting coupling of voltages to the plasma and returning a majority of RF current to elements of an antenna driven with different phases of a VHF/UHF signal and/or providing a magnetic filter which separates a hot plasma region from a cold plasma region along a side of the chamber and further provides a preferential drift path between the hot and cold plasma regions. The magnetic field structure of the magnetic filter is preferably closed at one end or fully closed to surround the plasma. Additional magnetic elements limit the transverse field at the surface of a workpiece to less than 10 Gauss. Either or both of the antenna and the magnetic filter can be retrofitted to existing plasma reactor vessels and improve the performance and throughput thereof.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: July 2, 2002
    Assignee: K2 Keller Consulting
    Inventor: John H. Keller
  • Patent number: 6412438
    Abstract: A remote plasma generator, coupling microwave frequency energy to a gas and delivering radicals to a downstream process chamber, includes several features which, in conjunction, enable highly efficient radical generation. In the illustrated embodiments, more efficient delivery of oxygen and fluorine radicals translates to more rapid photoresist etch or ash rates. A single-crystal, one-piece sapphire applicator and transport tube minimizes recombination of radicals in route to the process chamber and includes a bend to avoid direct line of sight from the glow discharge to the downstream process chamber. Microwave transparent cooling fluid within a cooling jacket around the applicator enables high power, high temperature plasma production. Additionally, dynamic impedance matching via a sliding short at the terminus of the microwave cavity reduces power loss through reflected energy. At the same time, a low profile microwave trap produces a more dense plasma to increase radical production.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: July 2, 2002
    Assignee: Matrix Integrated Systems, Inc.
    Inventors: Mohammad Kamarehi, Gerald M. Cox
  • Patent number: 6409896
    Abstract: A method and apparatus for detecting the presence of a plasma. The apparatus comprises an electrically floating contact member that is exposed to a plasma forming region, for example, a semiconductor wafer processing chamber. The floating contact is coupled to a measuring device. When a plasma is present in the plasma forming region, the plasma induces a voltage upon the floating contact which is detected by the measuring device.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: June 25, 2002
    Assignee: Applied Materials, Inc.
    Inventor: Steve Crocker
  • Patent number: 6406545
    Abstract: A wafer processing apparatus includes a processing chamber, a chuck arranged in the processing chamber for supporting a wafer, and a pedestal which is spaced apart from the chuck. A first gas layer is provided between the chuck and the wafer and a second gas layer is provided in the space between the pedestal and the chuck. The pressure of the first gas layer is controlled to be in a pressure range in which a thermal conductivity of the first gas layer is substantially constant with respect to changes in pressure of the first gas layer and the pressure of the second gas layer is controlled so as to control an amount of heat transferred to/from the pedestal.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: June 18, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naohiro Shoda, Peter Weigand
  • Patent number: 6406590
    Abstract: A method for treating a surface of a sample using plasma, including the steps of placing the sample in a predetermined atmosphere, locally supplying a reaction gas from a reaction gas supply portion to a vicinity of the sample, providing a wall surface opposed to the sample, providing a gas flow path having a low conductance from the reaction gas supply portion to the atmosphere, and locally forming a high-pressure reaction gas region having a pressure higher than the atmosphere in the gas flow path having a low conductance, and generating locally high-pressure plasma based on the reaction gas in the high-pressure reaction gas region; and subjecting the sample to surface treatment using an active seed in the high-pressure plasma.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: June 18, 2002
    Assignee: Sharp Kaubushiki Kaisha
    Inventors: Yusuke Ebata, Tohru Okuda
  • Patent number: 6403490
    Abstract: A method of producing a plasma by capacitive discharges between an active electrode and a passive electrode within a sealed chamber at controlled pressure, the passive electrode being placed at a given electric potential while the active electrode is fed with a discharge-maintaining voltage. The active electrode and passive electrode define a separation plane therebetween parallel to the electrodes. According to the method, a multipole magnetic barrier is placed between the electrodes within the sealed chamber, the multipole magnetic barrier producing magnetic field lines extending across the separation plane. Fast electrons accelerated by the active electrode are caused to oscillate between magnetic poles in order to create plasma production and diffusion zones that are situated on either side of a magnetic barrier facing each of the electrodes.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: June 11, 2002
    Assignee: Metal Process (Societe a Responsabilite Limitee)
    Inventors: Thierry Lagarde, Jacques Pelletier
  • Patent number: 6402886
    Abstract: A method and apparatus for improving etch uniformity in reticle etching by eliminating local effects at the edge of the reticle is disclosed. The present invention relates to a reticle frame which surrounds the reticle. The reticle frames are patterned with a pattern profile similar to that of the reticle to prevent edge uniformities of the reticle by allowing uniform plasma etching of the entire reticle surface. The reticle frames may also be used to move the reticle in and out of etch chambers without damaging them.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: June 11, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Richard Stocks, Kevin Donohoe
  • Patent number: 6401652
    Abstract: The present invention is embodied in a plasma reactor with an inductive coil antenna facing the reactor chamber in which the windings of the coil antenna have a flattened cross-sectional shape, the flat portion of the winding facing toward the plasma within the reactor. Preferably, the coil antenna is located outside the reactor and faces a ceiling or wall of the reactor chamber. The coil antenna may be a single helical coil winding or multiple concentric spiral windings.
    Type: Grant
    Filed: May 4, 2000
    Date of Patent: June 11, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Jonathan D. Mohn, Arthur H. Sato, Kien Nai Chuc
  • Patent number: 6398974
    Abstract: The present invention relates to a method of forming an electrode for a thin film transistor, which forms an electrode of a double-layered structure consisting of first and second metal layers by carrying out two steps of etching the metal layers by means of varying the diluted density of an etching solution, preventing hillock and junction spiking as well as controlling the generation of undercutting. The method includes the steps of forming a first and second metal layer on a substrate successively, forming a photoresist pattern on a predetermined portion of the second metal layer, etching the second metal layer to expose the first metal layer with a dense mixed solution of (H3PO4O+HNO3+CH3COOH+H2O), using the photoresist pattern as an etch mask, etching the exposed first metal layer with a diluted mixed solution of (H3PO4O+HNO3+CH3COOH+H2O), using the photoresist pattern as an etch mask, and removing the photoresist pattern.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: June 4, 2002
    Assignee: LG. Philipslcd Co., Ltd.
    Inventor: Myung Joon Kim
  • Patent number: 6395128
    Abstract: Plasma enhanced chemical vapor deposition (PECVD) reactors and methods of effecting the same are described. In accordance with a preferred implementation, a reaction chamber includes first and second electrodes operably associated therewith. A single RF power generator is connected to an RF power splitter which splits the RF power and applies the split power to both the first and second electrodes. Preferably, power which is applied to both electrodes is in accordance with a power ratio as between electrodes which is other than a 1:1 ratio. In accordance with one preferred aspect, the reaction chamber comprises part of a parallel plate PECVD system. In accordance with another preferred aspect, the reaction chamber comprises part of an inductive coil PECVD system. The power ratio is preferably adjustable and can be varied. One manner of effecting a power ratio adjustment is to vary respective electrode surface areas.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: May 28, 2002
    Assignees: Micron Technology, Inc., Applied Materials, Inc.
    Inventors: Sujit Sharan, Gurtej S. Sandhu, Paul Smith, Mei Chang
  • Patent number: 6395092
    Abstract: A silicon oxide film is deposited on a substrate by first introducing a process gas into a chamber. The process gas includes a gaseous source of silicon (such as silane), a gaseous source of fluorine (such as SiF4), a gaseous source of oxygen (such as nitrous oxide), and a gaseous source of nitrogen (such as N2). A plasma is formed from the process gas by applying a RF power component. Deposition is carried out at a rate of at least about 1.5 &mgr;m/min. The resulting FSG film is stable and has a low dielectric constant.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: May 28, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Dian Sugiarto, Judy Huang, David Cheung
  • Patent number: 6395641
    Abstract: Apparatus and method for an improved etch process. A power source alternates between high and low power cycles to produce and sustain a plasma discharge. Preferably, the high power cycles couple sufficient power into the plasma to produce a high density of ions (≳1011 cm−3) for etching. Preferably, the low power cycles allow electrons to cool off to reduce the average random (thermal) electron velocity in the plasma. Preferably, the low power cycle is limited in duration as necessary to prevent excessive plasma loss to the walls or due to recombination of negative and positive ions. It is an advantage of these and other aspects of the present invention that average electron thermal velocity is reduced, so fewer electrons overcome the plasma sheath and accumulate on substrate or mask layer surfaces. A separate power source alternates between high and low power cycles to accelerate ions toward the substrate being etched. In one embodiment, a strong bias is applied to the substrate in short bursts.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: May 28, 2002
    Assignee: Mattson Techonolgy, Inc.
    Inventor: Stephen E. Savas
  • Patent number: 6390020
    Abstract: An electrode is provided which can improve the efficiency and quality of plasma-generated coatings in a plasma enhanced chemical vapor deposition coating device. The electrode comprises dual shower head faces containing in the preferred mode a plurality of magnets which are aligned so that the poles of the magnets face in the same direction to thus generate two magnetron faces for each set of magnets.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: May 21, 2002
    Assignees: The Dow Chemical Company, Metroline Surfaces, Inc.
    Inventors: Ing-Feng Hu, Jeffrey R. Dykhouse
  • Patent number: 6391116
    Abstract: In a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method, a furnace tube port gas introducing pipe (9) for supplying gas to only one end portion of a furnace tube (2) is provided separately from a process gas introducing pipe (5) for supplying process gas into the furnace tube (2), and when wafers (4) are inserted into the furnace tube (2), an oxygen atmospheric layer (11) is formed only at the furnace tube port by oxygen gas or oxygen gas diluted with nitrogen gas which is supplied from the furnace tube port gas introducing pipe (9).
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventor: Tsuyoshi Moriyama
  • Patent number: 6391147
    Abstract: A plasma treatment method comprising exhausting a process chamber so as to decompress the process chamber, mounting a wafer on a suscepter, supplying a process gas to the wafer through a shower electrode, applying high frequency power, which has a first frequency f1 lower than an inherent lower ion transit frequencies of the process gas, to the suscepter, and applying high frequency power, which has a second frequency f2 higher than an inherent upper ion transit frequencies of the process gas, whereby a plasma is generated in the process chamber and activated species influence the wafer.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: May 21, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Kosuke Imafuku, Shosuke Endo, Kazuhiro Tahara, Yukio Naito, Kazuya Nagaseki, Keizo Hirose
  • Patent number: 6391146
    Abstract: An apparatus and method for reducing hazardous gases exhausted from a process chamber 25 includes an effluent gas treatment system 200 with a gas energizing reactor 210 with an erosion resistant inner surface 280. Optionally, an additive gas source 230 may be provided to introduce additive gas into the gas energizing reactor 210. In one embodiment, the inner surface comprises a fluorine-containing compound. In another embodiment, the inner surface comprises an oxide and a stabilizing agent.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: May 21, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Ashish Bhatnagar, Kartik Ramaswamy, Tony S. Kaushal, Kwok Manus Wong, Shamouil Shamouilian
  • Patent number: 6391216
    Abstract: The invention provides a method for reactive-ion etching a magnetic material with a plasma of a mixed gas of carbon monoxide and a nitrogen-containing compound, the method comprising a step, in which a multilayered film comprising a magnetic material thin film having thereon a resist film formed on a substrate is exposed to an electron beam and then developed, to form a pattern on the resist film, a step, in which a mask material is vacuum deposited, a step, in which the resist is dissolved, to form a mask, and a step, in which a part of the magnetic material thin film that is not covered with the mask is removed by reactive ion etching with a plasma of a mixed gas of carbon monoxide and a nitrogen-containing compound, to form a pattern on the magnetic material thin film, and thus obtaining the magnetic material thin film finely worked.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: May 21, 2002
    Assignees: National Research Institute for Metals, Japan Science and Technology Corporation
    Inventor: Isao Nakatani
  • Patent number: 6391114
    Abstract: The invention provides a vacuum processing apparatus, in which a substantial installation area is smaller than that of a conventional vacuum processing apparatus having a plurality of processing chambers of the same size and the same number, and easy maintenance can be achieved. More specifically, the invention provides a vacuum processing apparatus including a plurality of processing chambers, which are provided with processing devices for effecting predetermined processing on a target object, can achieve predetermined internal pressures, and can accommodate the target object for effecting predetermined processing under the predetermined pressures. In the vacuum processing apparatus, the plurality of processing chambers are arranged around a central chamber provided for object transfer and being capable of achieving a predetermined internal pressure, and are connected with the central chamber.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: May 21, 2002
    Assignee: Nissin Electric Co., Ltd.
    Inventor: Hiroya Kirimura
  • Patent number: 6391113
    Abstract: Semiconductor wafer counters are respectively provided at a loader portion, at a plurality of processing baths and at an unloader portion in a semiconductor wafer processing apparatus in which semiconductor wafers are processed in sequence using a plurality of processing baths, and when missing of wafers is detected, an alarm is issued. Also, there is provided an interlock function which stops processing in a processing bath in which the missing is detected and allows processing in downstream processing baths to continue, but prevents additional lots from being introduced into the loader portion and stops processing in upstream processing baths after the completion of the chemical processing under way.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: May 21, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toko Konishi, Naoki Yokoi