Patents Examined by Parviz Hassanzadeh
  • Patent number: 12291773
    Abstract: Methods and systems of heating a substrate in a vacuum deposition process include a resistive heater having a resistive heating element. Radiative heat emitted from the resistive heating element has a wavelength in a mid-infrared band from 5 ?m to 40 ?m that corresponds to a phonon absorption band of the substrate. The substrate comprises a wide bandgap semiconducting material and has an uncoated surface and a deposition surface opposite the uncoated surface. The resistive heater and the substrate are positioned in a vacuum deposition chamber. The uncoated surface of the substrate is spaced apart from and faces the resistive heater. The uncoated surface of the substrate is directly heated by absorbing the radiative heat.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: May 6, 2025
    Assignee: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Patent number: 12293903
    Abstract: The disclosed substrate support includes a first region, a second region, a first electrode, and a second electrode. The first region is configured to hold a substrate placed thereon. The second region is provided to surround the first region and configured to hold an edge ring placed thereon. The first electrode is provided in the first region to receive a first electrical bias. The second electrode is provided in at least the second region to receive a second electrical bias. The second electrode extends below the first electrode to face the first electrode within the first region.
    Type: Grant
    Filed: February 20, 2024
    Date of Patent: May 6, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Hajime Tamura, Yasuharu Sasaki, Shin Yamaguchi, Tsuguto Sugawara, Katsuyuki Koizumi
  • Patent number: 12286706
    Abstract: The present disclosure relates to exclusion rings for use in processing a semiconductor substrate in a processing chamber, such as a chemical vapor deposition chamber. The exclusion ring includes an alignment structure that cooperates with an alignment structure on a platen on which the exclusion ring will rest during processing of the wafer. The first alignment structure includes a guiding surface which promotes the reception of and positioning of the second alignment structure within the first alignment structure. Methods of utilizing the described exclusion rings are also described.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: April 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing CO., Ltd.
    Inventors: Ming-Yi Shen, Hsin-Lin Wu, Yao-Fong Dai, Pei-Yuan Tai, Chin-Wei Chen, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Patent number: 12288714
    Abstract: A sample holder according to the disclosure includes: for example, a plate-like ceramic substrate; a heat-generating resistor; a metallic member configured to cover another principal surface of the ceramic substrate; a bonding layer configured to bond the ceramic substrate and the metallic member; a lead terminal; a conduction section which is disposed inside the bonding layer and is configured to electrically connect the heat-generating resistor and the lead terminal; and a joining member configured to join the conduction section and the lead terminal. The joining member is covered with a low-thermal-conductivity member which is lower in thermal conductivity than the bonding layer.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: April 29, 2025
    Assignee: KYOCERA Corporation
    Inventor: Seiya Saisho
  • Patent number: 12288676
    Abstract: A stage includes a first member made of a material having a density of 5.0 g/cm3 or less, and a second member joined to the first member. The second member is made of a material having a linear expansion coefficient of 5.0×10?6/K or less and a thermal conductivity of 100 W/mK or more. A flow passage for a temperature control medium is formed in at least one of the first member and the second member.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: April 29, 2025
    Assignee: Tokyo Electron Limited
    Inventors: Takayuki Ishii, Kazuya Nagaseki, Michishige Saito
  • Patent number: 12278126
    Abstract: A plasma processing apparatus includes: a substrate support on which a substrate is supported; a detector configured to detect a temperature of the substrate support; a measurement unit configured to measure, by the detector, a temperature change of the substrate support while the temperature of the substrate support is increasing after igniting plasma or while the temperature of the substrate support is decreasing after the plasma processing is completed and the plasma is extinguished, based on the temperature of the substrate support detected by the detector; and an acquisition unit configured to acquire a thermal resistance between the substrate and the substrate support based on the temperature change of the substrate support measured by the measurement unit.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: April 15, 2025
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Shinsuke Oka
  • Patent number: 12278131
    Abstract: A stage includes a first mounting part on which a substrate is mounted, a second mounting part on which an edge ring surrounding a peripheral edge of the substrate is mounted, the second mounting part being lower than the first mounting part, a first bonding layer configured to bond a base to the first mounting part, a second bonding layer configured to bond the base to the second mounting part, and a seal member configured to close a space between the first mounting part and the second mounting part by deformation of the seal member above the first bonding layer and the second bonding layer while contacting with each of the first mounting part and the second mounting part.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 15, 2025
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Naoki Sugawa
  • Patent number: 12261066
    Abstract: According to one aspect of the technique, there is provided a substrate processing apparatus including: a reaction chamber in which a substrate is processed; a lid configured to close a furnace opening of the reaction chamber; a base provided below the lid; and a connector provided to connect the lid and the base. The connector includes: a shaft provided at the lid; an elastic structure provided to surround the shaft and configured to hold the lid; a cap provided to surround the elastic structure and provided at the base; a fixing block provided below the cap; and a moving block held by a holder provided between the fixing block and the shaft.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: March 25, 2025
    Assignee: Kokusai Electric Corporation
    Inventors: Takashi Nogami, Norihiro Yamashima
  • Patent number: 12252776
    Abstract: The present disclosure provides a carrying device and a semiconductor processing apparatus. The carrying device includes a heating plate and a cooling plate, the heating plate and the cooling plate are spaced apart, and a thermal insulation region is formed between the heating plate and the cooling plate. The carrying device of the present disclosure not only can preempt the need to stop the process due to excessively high temperature, but also can maintain a uniform and stable temperature throughout the process, thereby providing a qualified and stable processing temperature for a workpiece to be processed, and eventually obtaining better processing results.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: March 18, 2025
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Qing Chang, Bing Li, Mengxin Zhao
  • Patent number: 12249533
    Abstract: A substrate processing apparatus according to the present disclosure includes a gripping mechanism and a base plate. The gripping mechanism grips a peripheral edge of a substrate. The base plate is located below the substrate gripped by the gripping mechanism and supports the gripping mechanism. Furthermore, the base plate includes a liquid drain hole that discharges a processing liquid flowing from the substrate to an upper surface of the base plate through the gripping mechanism.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 11, 2025
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Yoshinori Ikeda, Toru Hirata
  • Patent number: 12203021
    Abstract: A substrate processing method includes holding a substrate; and supplying an etching liquid to the substrate held in the holding of the substrate. The etching liquid contains an etching agent configured to etch a metal-based first material and a silicon-based second material exposed on the substrate and a protection agent configured to react with the second material between the first material and the second material to form a protection layer on a surface of the second material. Here, the etching agent is a liquid which contains fluorine atoms and an organic solvent and substantially does not contain water, and the protection layer protects the second material from etching with the etching agent.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: January 21, 2025
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Koukichi Hiroshiro, Tetsuya Sakazaki, Koji Kagawa, Kenji Sekiguchi, Kazuyoshi Mizumoto
  • Patent number: 12205793
    Abstract: Methods and apparatuses for providing an anisotropic ion beam for etching and treatment of substrate are discussed. In one embodiment, a system for processing a substrate includes a chamber, a chuck assembly, an ion source, and a grid system. The ion source includes grid system interfaces both the chamber and the ion source and includes a plurality of holes through which ions are extracted from the ion source to form an ion beam. The grid system is oriented so the ion beam is directed into the chamber toward the substrate support, and the array of holes of the grid system is defined vertically by a y-axis and horizontally by an x-axis, The array of holes is defined by hole densities that vary vertically in the y-axis such that the ion beam is caused to have an energy density gradient that is defined vertically in the y-axis.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 21, 2025
    Assignee: Lam Research Corporation
    Inventors: Seokmin Yun, Shuogang Huang, Zhimin Wan, Mark Merrill
  • Patent number: 12191121
    Abstract: Provided is a plasma processing apparatus capable of obtaining desired etch profiles and preventing the degradation of yield rates due to the adhesion of particles, and equipped with a processing chamber in which a sample is plasma-treated; a radio-frequency power source for supplying radio-frequency power used to generate plasma; a sample stage which is provided with electrodes for electrostatically adsorbing the sample and on which the sample is mounted; and a DC power supply for applying DC voltages to the electrodes, the apparatus being further equipped with a control apparatus for controlling the DC power supply so as to apply such DC voltages as to decrease the absolute value of the potential of the sample in the absence of the plasma.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: January 7, 2025
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Kazuyuki Ikenaga, Masaki Ishiguro, Masahiro Sumiya, Shigeru Shirayone
  • Patent number: 12180586
    Abstract: Techniques are disclosed for roll-to-roll (R2R) atomic layer deposition (ALD). R2R ALD is accomplished by arranging precursor nozzles in A/B pairs while a flexible web substrate moves underneath the A/B pairs at a uniform speed. Nozzles A of the A/B pairs continuously flow a precursor A into the process volume of the R2R ALD chamber. The plasma enhanced/activated ALD (PEALD/PAALD) embodiments utilize electron cyclotron resonance or rotation (ECR)-enhanced hollow cathode plasma sources (HCPS) where nozzles B flow activated neutrals of precursor B into the process volume. As the flexible web moves in an R2R motion, nucleates from precursor A deposited on the surface of the substrate, and neutrals of precursor B undergo a self-limiting reaction to deposit a single atomically sized ALD film/layer. In this manner, multiple ALD layers may be deposited by each successive A/B pair in a single pass of the web.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: December 31, 2024
    Assignee: NanoMaster, Inc.
    Inventor: Birol Kuyel
  • Patent number: 12165847
    Abstract: This unit comprises a housing (50) for receiving an electrode suitable for creating an electrical discharge, and first means (20, 21, 22) for injecting treatment gas, comprising at least one plasma-forming gas, towards the support of the facility. According to the invention, the first injection means comprise an intake member (20) for the treatment gas, a treatment gas injection member (21), opening opposite the support, and an intermediate chamber (22) connecting these two members. This chamber comprises an upstream region (24), the gas passage cross-section of which increases from the inlet (25E, 26E) towards the outlet (25S, 26S) in longitudinal view (XX) and/or transverse view, as well as a downstream region (27), the passage cross-section of which increases from the inlet (28E, 29E) towards the outlet (28S, 29S) in transverse view but decreases in the vicinity of the outlet (28S, 29S) in longitudinal view (XX).
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: December 10, 2024
    Assignee: Coating Plasma Innovation
    Inventors: Julien Vallade, Cédric Pfister
  • Patent number: 12131923
    Abstract: A current detection section detects a current value of a swing shaft motor 14 and generates a first output. A first processing section obtains a contact pressure corresponding to the first output from the first output using first data indicating a correspondence relationship between a contact pressure applied to a semiconductor wafer by a top ring and the first output. A second processing section obtains a second output corresponding to a contact pressure obtained by the first processing section using second data indicating a correspondence relationship between the contact pressure obtained by the first processing section and the second output.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: October 29, 2024
    Assignee: EBARA CORPORATION
    Inventors: Yuta Suzuki, Taro Takahashi
  • Patent number: 12125681
    Abstract: This facility comprises a support (1) for the substrate, a pressing roll (2), capable of pressing the substrate against said support, a treatment unit positioned downstream of the pressing roll, with reference to the direction of travel of the substrate, said unit comprising injection means (37) for injecting a treatment gas towards said support and means (8) for transforming the surface of the moving substrate.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: October 22, 2024
    Assignee: Coating Plasma Innovation
    Inventors: Julien Vallade, Cédric Pfister
  • Patent number: 12116666
    Abstract: Described herein is a technique capable of shortening the time required to reduce the oxygen concentration in a transfer chamber. According to the technique described herein, there is provided a substrate processing apparatus including: a transfer chamber wherein a substrate from a container is transported; a transfer robot configured to transfer the substrate through the transfer chamber; a purge gas supply mechanism configured to supply a purge gas into the transfer chamber; and a pressure control mechanism configured to control an inner pressure of the transfer chamber wherein the pressure control mechanism is provided at an exhaust channel wherethrough an inner atmosphere of the transfer chamber is exhausted, the pressure control mechanism including: an exhaust damper configured to fully open or fully close the exhaust channel; and an adjusting damper provided in the exhaust damper and configured to maintain the inner pressure of the transfer chamber at predetermined pressure.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: October 15, 2024
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Daigi Kamimura, Takeshi Ito, Tomoshi Taniyama
  • Patent number: 12106934
    Abstract: The present disclosure provides a liner, a reaction chamber, and a semiconductor processing device. The liner is disposed in the reaction chamber and includes a liner body being arranged around an inner side wall of the reaction chamber and is grounded; a first separator being arranged to surround a periphery of a base disposed in the reaction chamber, a lower end of the first separator being grounded through the base; a dielectric ring being arranged between an inner peripheral wall of the first separator and an outer peripheral wall of the base; and a second separator being arranged to be around a lower end of the liner body and an outer peripheral wall of the first separator. The liner provided in the present disclosure can prevent the system from generating resonance, thereby enhancing the process stability.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: October 1, 2024
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Jinrong Zhao, Kai Chang
  • Patent number: 12040199
    Abstract: The disclosure relates to substrate processing apparatus, with a first and second reactor, each reactor configured with an elevator to transfer a boat with substrates to the reactor. The apparatus having a boat transfer device to transfer the boat with substrates between a substrate loading station, the first and/or second elevator and a cool down station. The substrate loading station and the cool down station may be arranged on opposite sides of the first and second elevator.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: July 16, 2024
    Assignee: ASM IP Holding B.V.
    Inventor: Jeroen Fluit