Patents Examined by Patricia A. George
  • Patent number: 7994058
    Abstract: The present invention relates to polishing slurry and polishing method used for polishing in a process for forming wirings of a semiconductor device, and the like. There are provided polishing slurry giving a polished surface having high flatness even if the polished surface is made of two or more substances, and further, capable of suppressing metal residue and scratches after polishing, and a method of chemical mechanical polishing using this. The polishing slurry of the present invention is polishing slurry containing at least one of a surfactant and an organic solvent, and a metal oxide dissolving agent and water, or polishing slurry containing water and abrasive, wherein the surface of the abrasive is modified with an alkyl group, and preferably, it further contains a metal oxidizer, water-soluble polymer, and metal inhibitor.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: August 9, 2011
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Jin Amanokura, Takafumi Sakurada, Sou Anzai, Masato Fukasawa, Shouichi Sasaki
  • Patent number: 7976889
    Abstract: Improved doughs containing dehydrated potato products, food products made from said doughs, and the methods for making the same are disclosed. Although the improved doughs contain non-ideal dehydrated potato products, processing efficiency and finished product quality are comparable to that of finished products made with doughs containing dehydrated potato products having from 40% to 60% broken cells and from 16% to 27% free amylose.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: July 12, 2011
    Assignee: The Procter & Gamble Company
    Inventors: Maria Dolores Martinez-Serna Villagran, Anthony John Boiano
  • Patent number: 7955635
    Abstract: The present invention relates to an improved process for extract purification of sugar beet raw juice, especially for reduction of lime consumption during the purification of sugar beet raw juice, to a process for producing a nutrient-rich non-sucrose concentrate from sugar beet raw juice, to the non-sucrose substance concentrate thus produced, to uses of the non-sucrose substance concentrate and to an apparatus for preliming sugar beet raw juice and/or for obtaining the non-sucrose substance concentrate.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: June 7, 2011
    Assignee: Sudzucker Aktiengesellschaft
    Inventors: Eric Deneus, Gunter Merkel, Thomas Michelberger, Mohsen Ajdari Rad, Marc Willems
  • Patent number: 7922921
    Abstract: The present invention includes the steps of providing a substrate having a main surface; depositing a dual-metal layer such as Mo/AlNd, MoW/AlNd, MoW/Al onto the main surface of the substrate; defining gate and word line patter using a layer of photoresist; and using the photoresist as an etching mask, a first metal dry etching process is carried out to etch the dual-metal layer at an etching selectivity that is significantly higher than prior art. The first metal dry etching process uses oxygen/fluorine containing etching gas mixture and oxygen/chlorine containing etching gas mixture to form the dual-metal gate and word line pattern having slightly oblique sidewalls. End point detection mode detected at 704 nm is used in the first metal dry etching process.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: April 12, 2011
    Assignee: AU Optronics Corp.
    Inventors: Chih-Chung Chuang, Shin-Jien Kuo, Chao-Yun Cheng, Shu-Feng Wu
  • Patent number: 7883631
    Abstract: A plasma etching method includes the step of performing a plasma etching on a silicon-containing dielectric layer formed on a substrate to be processed by using a plasma, while using an organic layer as a mask. In addition, the plasma is generated from a processing gas at least including a first fluorocarbon gas which is an unsaturated gas; a second fluorocarbon gas which is an aliphatic saturated gas expressed by CmF2m+2 (m=5, 6); and an oxygen gas. Further, a computer-readable storage medium for storing therein a computer executable control program is provided where the control program, when executed, controls a plasma etching apparatus to perform the above plasma etching method.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: February 8, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Akinori Kitamura, Masanobu Honda, Nozomi Hirai
  • Patent number: 7851373
    Abstract: Systems and methods for processing semiconductor devices are disclosed. A preferred embodiment comprises a processing method that includes providing a processing system including a first container and a second container fluidly coupled to the first container, the second container being adapted to receive and retain an overflow amount of a fluid from the first container, and disposing the fluid in the first container and a portion of the second container. The method includes providing at least one semiconductor device, disposing the at least one semiconductor device in the first container, and maintaining the fluid in the second container substantially to a first level while processing the at least one semiconductor device with the fluid.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: December 14, 2010
    Assignee: Infineon Technologies AG
    Inventor: Lothar Doni
  • Patent number: 7820218
    Abstract: A method for forming thin edible pieces uses two continuous belts that cooperate to form a fill cavity. An edible mass, such as chocolate, is flowed into the fill cavity where it forms an edible blank which is transported on a belt path with the two belts moving in tandem. After the edible blank is released from the first or second continuous belt, a three-dimensional shape may be imparted to the edible blank at a forming station using one or more stamping dies or a forming drum. Using the techniques and apparatus described herein, novel edible products, and particularly novel chocolate products, can be made having shape characteristics that cannot be obtained using known molding or forming techniques.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: October 26, 2010
    Assignee: Mars, Incorporated
    Inventors: James M. Suttle, Thomas M. Collins, George Graham, Alfred V. Camporini, Jennifer Tomasso
  • Patent number: 7794615
    Abstract: A plasma processing apparatus includes an upper matching unit 44 which is a variable matching unit whose impedance can be varied, and a main controller 100. The upper matching unit 44 includes a controller 104 for variably controlling the impedance positions of a variable reactance element of a matching circuit 102, a RF sensor for measuring a load impedance including the matching circuit 102, and a VPP measuring circuit 112 for measuring a peak value (peak-to-peak value) of a radio frequency voltage in a waveguide line at the output side of the upper matching unit 44. The main controller 100 executes and controls an autorunning of the matching units 44, 88 for optimizing an off preset of the impedance positions thereof. The plasma can be readily get ignited without requiring to set or change special processing conditions while influencing none of the processes.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Hiroshi Ogawa
  • Patent number: 7758761
    Abstract: A substance including tungsten and carbon is etched by using plasma. The plasma is generated from a mixed gas of a gas including a fluorine atom and a gas including a CN bond and a hydrogen atom.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Hideo Nakagawa, Masaru Sasago, Tomoyasu Murakami
  • Patent number: 7695637
    Abstract: Disclosed are a slurry composition for chemical mechanical polishing and a precursor composition thereof. The polishing slurry composition includes deionized water, abrasive particles, a pH-adjusting agent and a surfactant, wherein the surfactant includes two or more ionic moieties and two or more lipophilic groups. The polishing slurry composition can polish convex surfaces of a semiconductor having a step height at a higher rate than the polishing rate for concave surfaces acting as polishing stop layers of the semiconductor so that the polishing can be self-stopped, reduces the occurrence of surface defects after the polishing process, and has a high degree of polishing planarization and good dispersion stability.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: April 13, 2010
    Assignee: Cheil Industries Inc.
    Inventors: Tae Won Park, In Kyung Lee, Byoung Ho Choi
  • Patent number: 7687407
    Abstract: The present invention provides an interconnect structure, a method of manufacture therefore, and a method for manufacturing an integrated circuit including the same. The method for forming the interconnect structure, among other steps, includes subjecting a first portion (510) of a substrate (220) to a first etch process, the first etch process designed to etch at a first entry angle (?1), and subjecting a second portion (610) of the substrate (220) to a second different etch process, the second different etch process designed to etch at a second lesser entry angle (?2).
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: March 30, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: David G. Farber, Brian E. Goodllin, Robert Kraft
  • Patent number: 7648724
    Abstract: There are provided an intermolecular compound of (a) di-saturated medium chain fatty acids mono-saturated long chain fatty acid triglyceride and (b) 1,3-di-saturated long chain fatty acids 2-mono-unsaturated long chain fatty acid triglyceride, of which a long spacing value by X-ray diffraction is 65 ? or more, and foods containing the intermolecular compound. The intermolecular compound can be used as a part of fats and oils that constitute foods. Due to formation of the intermolecular compound, the fats and oils containing large amounts of symmetric triglycerides such as cocoa butter and those containing medium chain fatty acids do not form separate crystals and, therefore, can keep smooth texture and prevent blooming.
    Type: Grant
    Filed: November 12, 2007
    Date of Patent: January 19, 2010
    Assignee: The Nisshin OilliO Group, Ltd.
    Inventors: Shin Arimoto, Hidetaka Uehara, Satoshi Negishi
  • Patent number: 7628932
    Abstract: A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The substrate is exposed to a buffered fluoride etch solution which undercuts the silicon to provide lateral shelves when patterned in the <100> direction. The resulting structure includes an undercut feature when patterned in the <100> direction.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: December 8, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Whonchee Lee, Janos Fucsko, David H. Wells
  • Patent number: 7622050
    Abstract: A process for polishing a glass substrate required to have high-degree of flatness and smoothness, is provided. A preliminarily polished glass substrate is applied with a surface treatment by a first-step gas-cluster ion beam etching to improve the flatness, and then, the glass substrate is applied with a surface treatment by a second-step gas-cluster ion beam etching having different irradiation conditions of those of the first-step gas-cluster ion beam etching to improve the surface roughness, whereby the glass substrate is finish-polished to have a flatness of at most 0.05 ?m and a surface roughness (Rms) of at most 0.25 nm.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: November 24, 2009
    Assignee: Asahi Glass Company, Limited
    Inventors: Koji Otsuka, Masabumi Ito
  • Patent number: 7615495
    Abstract: A plurality of wires and electrodes are formed by forming a first conductive film, selectively forming a resist over the first conductive film, forming a second conductive film over the first conductive film and the resist, removing the second conductive film formed over the resist by removing the resist, forming a third conductive film so as to cover the second conductive film formed over the first conductive film, and selectively etching the first conductive film and the third conductive film. Thus, wires using a low resistance material can be formed in a large-sized panel, and thus, a problem of signal delay can be solved.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: November 10, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Saishi Fujikawa, Kunio Hosoya
  • Patent number: 7604750
    Abstract: A method for fabricating a semiconductor device is provided. The method includes: loading a wafer into a chamber including a ceramic dome coated with a material having etch tolerance against a plasma; etching a gate structure formed on the wafer, thereby generating etch remnants; and removing the etch remnants by using a gas of SF6 as a main etch gas.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: October 20, 2009
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Kyoung-Choul Shin, Seong-Yeol Mun
  • Patent number: 7604751
    Abstract: A polishing liquid composition is applicable as a means of forming embedded metal interconnections on a semiconductor substrate. In a surface to be polished comprising an insulating layer and a metal interconnection layer, the polishing liquid composition is capable of maintaining a polishing speed of the metal layer, of suppressing an etching speed, and of preventing dishing of the metal layer.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: October 20, 2009
    Assignee: Kao Corporation
    Inventors: Yasuhiro Yoneda, Ryoichi Hashimoto, Toshiya Hagihara
  • Patent number: 7592264
    Abstract: A method of removing materials, and preferably photoresist, from a substrate comprises dispensing a liquid sulfuric acid composition comprising sulfuric acid and/or its desiccating species and precursors and having a water/sulfuric acid molar ratio of no greater than 5:1 onto an material coated substrate in an amount effective to substantially uniformly coat the material coated substrate. The substrate is preferably heated to a temperature of at least about 90° C., either before, during or after dispensing of the liquid sulfuric acid composition. After the substrate is at a temperature of at least about 90° C., the liquid sulfuric acid composition is exposed to water vapor in an amount effective to increase the temperature of the liquid sulfuric acid composition above the temperature of the liquid sulfuric acid composition prior to exposure to the water vapor. The substrate is then preferably rinsed to remove the material.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: September 22, 2009
    Assignee: FSI International, Inc.
    Inventors: Kurt Karl Christenson, Ronald J. Hanestad, Patricia Ann Ruether, Thomas J. Wagener
  • Patent number: 7578944
    Abstract: A method for manufacturing a semiconductor device may include: forming a main magnetic field having an axis, and forming a subsidiary magnetic field substantially parallel to the axis; applying an alternating current along a path between the main and the subsidiary magnetic fields; allowing a gas to flow along a flow path along the path of the current so that a gas plasma is generated from the gas; providing the gas plasma into a chamber separated from a position where the gas plasma is generated; and performing a process for manufacturing a semiconductor device by employing the gas plasma.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: August 25, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Min Min, Dae-Kyu Choi, Do-In Bae, Yun-Sik Yang, Wan-Goo Hwang, Jin-Man Kim
  • Patent number: 7544305
    Abstract: A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: June 9, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Jung Hsu, Art Yu, Hsiao-Ling Lu, Teng-Chun Tsai