Abstract: A voltage output device which is capable of preventing an increase in circuit scale and includes an offset compensation function that is suitably applicable in particular to a drive circuit for display devices such as liquid crystal display panels. The voltage output device includes an operational amplifier which has an inverting input terminal and a non-inverting input terminal. Resistance values of a load resistor on the inverting input side and a load resistor on the non-inverting input side are maintained when the output voltage of the amplifier has changed while sequentially varying either one or both of the resistance values of the load resistor on the inverting input side and the load resistor on the non-inverting input side in a state that the inverting input terminal and the non-inverting input terminal are connected. The voltage output device is configured to output the output voltage of the amplifier with the inverting input terminal not connected to the non-inverting input terminal.

Abstract: Methods and apparatus are described for mitigating intercell interference in wireless communication systems utilizing substantially the same operating frequency band across multiple neighboring coverage areas. The operating frequency band may be shared across multiple neighboring or otherwise adjacent cells, such as in a frequency reuse one configuration. The wireless communication system can synchronize one or more resource allocation regions or zones across the multiple base stations, and can coordinate a permutation type within each resource allocation zone. The base stations can coordinate a pilot configuration in each of a plurality of coordinated resource allocation regions. Subscriber stations can be assigned resources in a coordinated resource allocation region based on interference levels. A subscriber station can determine a channel estimate for each of multiple base stations in the coordinated resource allocation region to mitigate interference.

Abstract: Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. The power transistor circuitry, the broadband combiner, and the impedance matching filter are integrated in a unified package. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described.

Abstract: A switched-capacitor amplifier circuit (200 and 300) with rail-to-rail capability without requiring a rail-to-rail operational amplifier includes a switched-capacitor amplifier (202 and 302) and an input network (201) coupled to the switched-capacitor amplifier. The switched-capacitor amplifier includes a non-rail-to-rail operational amplifier (275 and 375). The input network prevents the non-rail-to-rail operational amplifier from receiving an input differential signal that has a common-mode voltage at or near rails of the non-rail-to-rail operational amplifier. Voltages at input terminals of the operational amplifier remain near analog ground, which is an arbitrary voltage level between the rails, during both phases of switching in the switched-capacitor amplifier. In one embodiment, the switched-capacitor amplifier uses a correlated double sampling technique.

Abstract: Aspects of the invention may comprise calibrating operations of wireless transmitters and/or receivers in a communication device to mitigate interference caused during concurrent communications via the wireless interfaces in the communication device. Calibration may be performed dynamically, and may comprise managing system parameters and/or physical resources of the communication device and/or the wireless transmitters and/or receivers; managing characteristics of wireless communication performed via the wireless transmitters and/or receivers; and/or managing isolation between two or more of said plurality of wireless transmitters and/or receivers in said communication device. The calibration may be performed based on data generated, via the wireless transmitters and/or receivers, during active and/or idle phases of operations. The data may be based on monitoring of RF effects caused by operations of other wireless transmitters and/or receivers.

Abstract: There is provided an amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal.

Abstract: A distributed power converter is for use with an RF power amplifier and includes a primary converter connected to an input voltage and configured to provide a regulated DC intermediate voltage that is galvanically isolated from the input voltage. Additionally, the distributed power converter also includes a secondary regulator connected galvanically to the regulated DC intermediate voltage and configured to generate a regulated DC supply voltage for at least a portion of the RF power amplifier. In another aspect, a method of operating a distributed power converter is for use with an RF power amplifier and includes providing a regulated DC intermediate voltage that is galvanically isolated from an input voltage and generating a regulated DC supply voltage for at least a portion of the RF power amplifier that is galvanically connected to the regulated DC intermediate voltage.

Abstract: An amplifier circuit includes a signal summing node, a first amplifier configured to operate in a first mode, an impedance inverter, a second amplifier configured to operate in a second mode and a wideband impedance transformer. The impedance inverter couples an output of the first amplifier to the signal summing node. The impedance inverter is configured to provide impedance transformation and load modulation to the first amplifier. The second amplifier has an output coupled to the signal summing node. The wideband impedance transformer has a first end coupled to the signal summing node and a second end forming a terminal node. The wideband impedance transformer is configured to present a real impedance to the first amplifier over at least 25% of a radio frequency bandwidth of the amplifier circuit.

Abstract: A method and apparatus improve the performance of a carrier amplifier in a Doherty amplifier. The Doherty amplifier includes a power divider, a carrier amplifier, at least one peaking amplifier, offset lines, and a Doherty circuit. The power divider provides a power signal to each of the carrier amplifier and the at least one peaking amplifier. The carrier amplifier amplifies power of a signal inputted from the power divider. The at least one peaking amplifier amplifies power of a signal inputted from the power divider. The offset lines control a load impedance when the at least one peaking amplifier does not operate. When the at least one peaking amplifier does not operate, the Doherty circuit generates the load impedance of the carrier amplifier that is larger than twice a load impedance at the maximum output power of the carrier amplifier.

Abstract: Constant and accurate signal gain systems based on controlling signal amplifier gain level by applying the signal amplifier output signal to a signal level divider with a set ratio. The output signal of the signal level divider is applied to one input of the gain control amplifier, which is a differential amplifier, while the signal amplifier input signal is applied to the other input. The gain control amplifier output level is used to control the gain level of the signal amplifier. The gain control amplifier output level forces by negative feedback the gain control amplifier input levels to be substantially equal thus maintaining the signal amplifier gain level substantially constant.

Abstract: Current-feedback instrumentation amplifiers that include dynamic element matching for the input transconductance amplifiers by periodically swapping the transconductance amplifiers between the instrumentation amplifier input and the feedback input. The instrumentation amplifiers may include a gain error reduction loop, which loop corrects differences in the gains of the input transconductance amplifiers and eliminates the ripple in the instrumentation amplifier output caused by the dynamic element matching. If chopper stabilization is used, the amplifiers may also include an offset reduction loop. Various embodiments are disclosed.

Abstract: An amplifier circuit includes an amplifier unit that amplifies a signal received by an input terminal and outputs the amplified signal to an output terminal, a feedback capacitor that is connected between the input terminal of the amplifier and the output terminal, and a controller that varies a capacitance in the feedback capacitor for a certain period when a potential of the output terminal in the amplifier unit becomes higher or lower than a certain potential.

Abstract: Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L1C1, L2C2), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.

Abstract: A switching amplifier (200; 300; 400; 500) comprising: a switch (202; 302) configured to electrically connect and disconnect a first pin (202a; 302a) of the switch (202; 302) to a second pin (202b; 302b) of the switch (202; 302) in accordance with a pulse width modulated input signal (216; 316; 516). The second pin (202b; 302b) is connected to a ground connector (204; 304). The switching amplifier also comprises a feed inductor (206; 306; 406) connected between a voltage supply connector (208; 308) and the first pin (202a; 302a) of the switch (202; 302), and a circuit (210; 310; 522) comprising a variable component having a variable imaginary impedance. The circuit (210; 310; 522) is connected between the first pin (202a; 302a) of the switch (202; 302) and an output connector of the amplifier (212; 312.

Abstract: An electrical receptacle assembly having a housing that includes a wireless transceiver electrically coupled to one or more antennas that can be integrated into the receptacle housing itself or in the receptacle's faceplate. The one or more antennas can be one or more dipoles or a single loop antenna. The housing also houses a power converter that derives its power directly from the line connection to the outlet. A junction box includes an integrated antenna reflector for improved radio direction and propagation relative to the antenna(s). Or, an antenna reflector insert is placed within the junction box behind the electrical receptacle assembly. The electrical receptacle assembly further includes a temperature sensor, a PLC module, or a current/voltage sensor and communicates associated data via its wireless transceiver. A status indicator is disposed on the front of the housing. A reset switch on housing resets the electronics to a default state.

Abstract: Embodiments of circuits, apparatuses, and systems for an overdrive protection circuit arranged at an input to a primary power transistor to protect against overdrive conditions, where the overdrive protection circuit includes a sensing resistor. Other embodiments may be described and claimed.

Abstract: A nested transimpedance amplifier circuit including a first power source, a second power source, a charge pump module and a transimpedance amplifier. The first power source is at a first voltage. The second power source is at a second voltage. The second voltage is different than the first voltage. The charge pump module (i) receives the first voltage and the second voltage and (ii) generates a third voltage based on the first voltage and the second voltage. The first transimpedance amplifier includes an input, an output and a first operational amplifier. The input of the first transimpedance amplifier receives an input voltage. The output of the first transimpedance amplifier outputs an output voltage. The first operational amplifier receives the third voltage. The first transimpedance amplifier generates the output voltage based on the third voltage and the input voltage.

Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.

Abstract: In one embodiment, a method includes: detecting one of a short-to-ground condition and a short-to-supply condition at an output node; selectively activating a feedback control transistor according to the detecting; detecting a first current passing through a first transistor using a second transistor sized to be smaller than the first transistor; mirroring the detected current using a plurality of transistors to form a feedback current; and providing the feedback current to a gate electrode of the first transistor according to the selectively activating the feedback control transistor.

Abstract: Systems and methods for detecting the impedance of an output load coupled to a digital amplifier and compensating for changes in the response of the amplifier. One embodiment of the invention is implemented in a Class D pulse width modulated (PWM) amplifier. In this embodiment, a digital PCM test signal is generated. This test signal is processed by the amplifier to produce a corresponding analog audio output signal that is used to drive a speaker. A sense resistor placed in series with the speaker is used to generate a test voltage that is compared to a reference voltage. When the test voltage reaches the reference voltage, the current through the sense resistor (hence the speaker) is at a known level, so the value of the digital test signal is noted. The impedance of the speaker is then determined from the test signal value and the speaker current.