Patents Examined by Patricia Nguyen
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Patent number: 8155333Abstract: An active noise control apparatus that controls by a control sound a noise which is output from a noise source, includes: a control sound generating section which inputs a control signal, and produce the control sound; a residual noise detecting section which detects, as a residual noise signal, a noise remaining after the noise control by the control sound; a control signal generating section which inputs, as a reference signal, a signal concerning the noise or the generation state of the noise, and generates the control signal; and a controlling section which inputs the control signal and the residual noise signal, detects the components that cannot be identified in the control signal generating section, and controls the generation of the control signal in the control signal generating section.Type: GrantFiled: January 27, 2009Date of Patent: April 10, 2012Assignee: Fujitsu LimitedInventors: Taro Togawa, Takeshi Otani, Kaori Endo, Yasuji Ota
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Patent number: 8154341Abstract: A power amplifying apparatus includes a high-speed low pass filter which inputs an envelope signal included in a transmission signal therein, a low-speed low pass filter which inputs the envelope signal therein, a determination unit which inputs the envelope signal therein and determines rising or falling of the envelope signal, a selecting unit which selects one of the high-speed low pass filter and the low-speed low pass filter according to a determined result of the determination unit, and a voltage supply unit which generates a voltage based on a signal input according to a selection by the selecting unit and supplies the voltage to a power amplifier which inputs the transmission signal therein so as to amplify a power of the transmission signal.Type: GrantFiled: December 16, 2008Date of Patent: April 10, 2012Assignee: Fujitsu LimitedInventors: Hiroyoshi Ishikawa, Nobukazu Fudaba, Hajime Hamada, Yuichi Utsunomiya, Kazuo Nagatani, Toru Maniwa
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Patent number: 8149059Abstract: In a method and apparatus for compensating for gain changes in an amplifier circuit comprising radio-frequency modules and attenuation elements, a radio-frequency module is driven with a first temperature-dependent monitoring voltage UHF(T), and an attenuation element with a second temperature-dependent monitoring voltage UVG(T). The first temperature-dependent monitoring voltage UHF(T) is produced by applying a temperature dependency to an individual monitoring voltage Uopt, which is predetermined for a predetermined temperature for a radio-frequency module, in order to set the optimum operating point of the radio-frequency module. The second temperature-dependent monitoring voltage UVG(T) is produced by applying a temperature dependency to a predetermined monitoring voltage UVG—T for the attenuation element. The monitoring voltage UVG—T is determined in an iteration method, such that the output power of the amplifier circuit reaches a predeterminable level at a constant input power.Type: GrantFiled: March 14, 2009Date of Patent: April 3, 2012Assignee: EADS Deutschland GmbHInventors: Joerg Schroth, Rolf Reber, Rainer Rittmeyer, Hardy Sledzik
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Patent number: 8149057Abstract: A signal processing circuit includes a waveform shaping section that applies a first gain to an input signal and generates a first signal when an absolute value of a level of the input signal falls within a first input range from a first level to a second level, a variable gain section that adjusts an amplitude of the first signal and amplifies the first signal by a gain to generate an output signal, and a control section that reduces the gain of the variable gain section so that the output signal is prevented from occurrence of clipping when the amplitude of the first signal falls within a second input range. The second input range includes a range of the level of the first signal output from the waveform shaping section corresponding to the first input range of the input signal.Type: GrantFiled: January 25, 2011Date of Patent: April 3, 2012Assignee: Yamaha CorporationInventor: Masayuki Iwamatsu
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Patent number: 8149060Abstract: Provided is a low distortion amplifier which can satisfy both securement of a setting space in a vicinity of a transistor and low impedance. The low distortion amplifier includes a short stub having a leading end thereof short-circuited with a high-frequency short-circuit element and a low-frequency short-circuit element, in which the short stub is connected to a vicinity of at least one of a gate terminal and a drain terminal of the transistor, and includes a plurality of branched lines, the plurality of branched lines each having a leading end thereof short-circuited with the high-frequency short-circuit element and the low-frequency short-circuit element.Type: GrantFiled: March 25, 2008Date of Patent: April 3, 2012Assignee: Mitsubishi Electric CorporationInventors: Kazuhisa Yamauchi, Hifumi Noto, Akira Inoue, Tomokazu Hamada, Masatoshi Nakayama, Kenichi Horiguchi
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Patent number: 8143952Abstract: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.Type: GrantFiled: October 8, 2009Date of Patent: March 27, 2012Assignee: QUALCOMM IncorporatedInventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-Eoan, Seyfollah S. Bazarjani, Matthew Nowak
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Patent number: 8143946Abstract: A current to voltage converter which includes a common gate transconductance element having at least one input and one output. The current to voltage converter further includes a common source transconductance element having at least one input and one output, where the common source transconductance element is connected to the common gate transconductance element. The current to voltage converter further includes a feedback circuit including a resistor, where the feedback circuit connects any input having a polarity to any output having an opposite polarity.Type: GrantFiled: October 8, 2010Date of Patent: March 27, 2012Assignee: Project FT, Inc.Inventor: Farbod Aram
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Patent number: 8138826Abstract: A circuit and method for signal amplification is provided. The circuit includes an amplifier including an input amplifier that is arranged to receive an input analog signal, and to provide an input amplifier output signal by amplifying the input analog signal. The amplifier further includes a DC offset correction circuit that is arranged to determine a DC offset correction for the input amplifier each time the amplifier is powered up. The DC offset correction is performed by iteratively adjusting a DC offset of the input amplifier until the input amplifier output DC offset is zero when the input analog AC signal is zero, within a predetermined tolerance. The DC offset correction circuit is further arranged to provide the determined DC offset correction to the input amplifier during operation of the amplifier.Type: GrantFiled: July 22, 2010Date of Patent: March 20, 2012Assignee: National Semiconductor CorporationInventors: Ansuya P. Bhatt, Raminder Jit Singh, Adam Abed, David A. Beeson
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Patent number: 8130041Abstract: Provided is a power amplifier device. The power amplifier device includes: a cutoff unit cutting off a direct current (DC) component of a signal delivered from a signal input terminal; a circuit protecting unit connected to the cutoff unit and stabilizing a signal delivered from the cutoff unit; and an amplification unit connected to the circuit protecting unit and amplifying a signal delivered from the circuit protecting unit, wherein the amplification unit comprises a plurality of transistors connected in parallel to the circuit protecting unit and the circuit protecting unit comprises resistors connected to between bases of the plurality of transistors.Type: GrantFiled: December 3, 2010Date of Patent: March 6, 2012Assignee: Electronics and Telecommunications Research InstituteInventors: Seong-Il Kim, Jongmin Lee, Byoung-Gue Min, Hyung Sup Yoon, Hae Cheon Kim, Eun Soo Nam
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Patent number: 8130037Abstract: An input bias current cancellation circuit includes reference transistors placed in series and a current summation network. The current summation network can be configured to sum the base currents of the reference transistors to produce a summed current. A current mirror can be provided to attenuate the summed current to produce input bias cancellation currents. The input bias cancellation currents can be provided to the base inputs of an input bipolar differential pair, thereby reducing input current noise.Type: GrantFiled: March 23, 2010Date of Patent: March 6, 2012Assignee: Analog Devices, Inc.Inventor: Derek F. Bowers
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Patent number: 8120421Abstract: A circuit structure free from test effect is provided. The circuit structure includes a first test terminal and a second test terminal. A symmetric circuit unit is coupled between the first test terminal and the second test terminal. The symmetric circuit unit includes a plurality of transistors, wherein the transistors are symmetrically disposed to form a first part circuit and a second part circuit. A switch control unit alternatively connects the transistors of the first part circuit and the transistors of the second part circuit between the first test terminal and the second test terminal according to a control signal.Type: GrantFiled: October 22, 2009Date of Patent: February 21, 2012Assignee: Novatek Microelectronics Corp.Inventor: Ju-Lin Huang
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Patent number: 8120423Abstract: An operational amplifier with two pairs of differential inputs for use with an input switch capacitor network. The operational amplifier has reset devices for resetting the second pair of differential inputs while amplifying the first pair of differential inputs, and for resetting the first pair of differential inputs while amplifying the second pair of differential inputs for reducing memory effect in electronic circuits. In an embodiment, the amplifier has an additional reset device for resetting the outputs during a prophase of amplifying the first pair of differential inputs and a prophase of amplifying the second pair of differential inputs.Type: GrantFiled: December 6, 2010Date of Patent: February 21, 2012Assignee: OmniVision Technologies, Inc.Inventors: Liping Deng, Tiejun Dai, Wei Zheng, Xueqing Wang
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Patent number: 8115547Abstract: A reconfigurable power amplifier includes at least one amplification circuit (E1, E2), and a circuit (6) for controlling the amplification circuit so as to adapt its operation according to an applied input signal (RFin). The circuit for controlling includes a circuit (4, 5) for modifying the compression point of the amplification circuit and for adapting the gain of the amplification circuit in such a manner as to increase the power added efficiency of the circuit for the modified compression point.Type: GrantFiled: January 14, 2008Date of Patent: February 14, 2012Assignees: STMicroelectronics S.A., Centre National de la Recherche ScientifiqueInventors: Didier Belot, Yann Deval, Eric Kerherve, Nathalie Deltimple, Pierre Jarry
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Patent number: 8115543Abstract: The invention relates to an upstream unit (1) for a switched power amplifier (2) for a high-frequency transmission circuit (16). The upstream unit (1) supplies a pulse-length modulated HF pulse signal (22) to the switched power amplifier (2), wherein the linearity of the pulse length modulation and of the high-frequency transmission circuit is improved. The upstream unit (1) according to the invention has a first signal input (3) for a high-frequency, phase-modulated first input signal (18), a second signal input (4) for a second input signal (19) having a low frequency in comparison with the first input signal, a controllable first delay unit (5), a controllable second delay unit (7), a pulse generator (9) and a control unit (10).Type: GrantFiled: December 4, 2009Date of Patent: February 14, 2012Assignee: IHP GmbH—Innovations for High Performance Microelectronics/Leibniz—Institut fur Innovative MikroelektronikInventor: Johann Christoph Scheytt
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Patent number: 8115546Abstract: An apparatus and method for maximizing the performance of a peaking amplifier in a Doherty amplifier are provided. The apparatus includes a splitter, a carrier amplifier, an (N?1) number of peaking amplifiers, a Doherty combiner, and an output load. The splitter splits an input signal into an ‘N’ number of power signals. The carrier amplifier amplifies the signal provided from the splitter using a first Direct Current (DC) bias. The peaking amplifiers amplify the signals provided from the splitter using a second DC bias, which is lower than the first DC bias. When the carrier amplifier and the peaking amplifiers are all operating, the Doherty combiner forms a load impedance of the respective amplifiers such that the load impedance of the peaking amplifiers are less than the load impedance of the carrier amplifier. The output load outputs the signals amplified by the carrier amplifier and the peaking amplifiers.Type: GrantFiled: May 13, 2010Date of Patent: February 14, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Chul Hong, Young-Yoon Woo
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Patent number: 8115555Abstract: Systems and methods are provided for a transformer or balun function with reference enhancement. The systems and methods may include a transformer having at least a primary winding and a secondary winding for reference enhancement, where the primary winding includes a center tap, where the secondary winding includes a first port and a second port, and an electrical connection that electrically connects the second port and the center tap of the primary winding to provide a common reference for the primary winding and the secondary winding. The primary winding of the transformer may be configured to receive differential outputs of a power amplifier, and the transformer may be configured to convert the differential outputs from a balanced signal to an unbalanced signal available at the first port of the secondary winding.Type: GrantFiled: March 12, 2010Date of Patent: February 14, 2012Assignee: Samsung Electro-MechanicsInventors: Kyu Hwan An, Yunseo Park, Chang-Ho Lee
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Patent number: 8115548Abstract: Disclosed are an apparatus and method for controlling output distortions of an amplifier. The apparatus for controlling output distortions of an amplifier, includes a compensation signal generator to predict a fluctuation of a supply voltage of a power supply using a prediction model which reflects fluctuations characteristics of the supply voltage, and to generate a compensation signal based on the prediction, and a compensator to transform an input signal using the compensating signal to control the output distortions.Type: GrantFiled: June 12, 2009Date of Patent: February 14, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Kim, Sang-chul Ko, Young-tae Kim, Jung-woo Choi
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Patent number: 8115553Abstract: A radio frequency wide band amplifier having a noise that does not exceed a threshold value, and a linearity better than a threshold value. The radio frequency wide band amplifier architecture includes a first stage amplifier and a second stage amplifier. The second stage amplifier includes an input source resistor (Rin) that receives an input voltage signal, a feedback resistor (Rfb) directly connected to the input source resistor, a p-type metal-oxide-semiconductor (PMOS) transistor directly connected to the input source resistor. The PMOS transistor receives an output from the input source resistor. A n-type metal-oxide-semiconductor (NMOS) transistor directly connected to the input source resistor. The NMOS transistor receives an output from the input source resistor. A lumped output resistor (Rout) that receives an output from the feedback resistor, the PMOS transistor, and the NMOS transistor. A terminal of the lumped output impedance is connected to ground.Type: GrantFiled: September 15, 2010Date of Patent: February 14, 2012Assignee: Newport Media, Inc.Inventor: Dejun Wang
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Patent number: 8115542Abstract: A class-D amplifier includes a ramp generator to provide a ramp signal having a frequency varying with an audio input signal, and a modulator to convert the audio input signal to a pulse width modulation signal according to the ramp signal for a driver to drive a load device. The varying frequency of the ramp signal will cause the frequency of the pulse width modulation signal unfixed and consequently improves EMI issue.Type: GrantFiled: August 17, 2010Date of Patent: February 14, 2012Assignee: Richtek Technology Corp.Inventors: Pei-Cheng Huang, Jwin-Yen Guo, Shao-Ming Sun
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Patent number: 8111097Abstract: A programmable system includes a programmable analog device including an operational amplifier to generate an output voltage based on input voltages at terminals of the operational amplifier. The programmable system also includes a system controller to direct the programmable analog device to reconfigure analog circuitry providing the input voltages to the operational amplifier. The reconfiguration of the analog circuitry allows the programmable analog device to implement discrete-time or continuous-time functions.Type: GrantFiled: April 16, 2010Date of Patent: February 7, 2012Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Warren Snyder, Monte Mar, Dennis Seguine, Gajender Rohilla, Eashwar Thiagarajan