Patents Examined by Patricia Nguyen
  • Patent number: 8258875
    Abstract: A power amplifier system is provided that includes a power amplifier configured to receive an RF input. A DC-DC converter is coupled to the power amplifier. Clocking circuits drive the DC-DC converter. The clocking circuits use the RF input to generate a clock. The clock acts with the DC-DC converter to provide an output voltage used in the power amplifier.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: September 4, 2012
    Assignee: Amalfi Semiconductor, Inc.
    Inventors: Malcolm Smith, Matthew Anthony Mow
  • Patent number: 8258865
    Abstract: A signal generating apparatus comprises an amplifier, which comprises differential input terminals for receiving a first input signal, a common mode output signal adjusting terminal for receiving a second input signal, and an output terminal. The signal generating apparatus may provide two or more differential output signals according to the first input signal, and provide two or more common mode output signals according to the second input signal. The amplifier provides an output signal comprising one of the differential output signals and one of the common mode output signals at the output terminal.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: September 4, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chen-Chih Huang, Yu-Chang Chen, Wei-Chou Wang, Sheng-Huang Tsao
  • Patent number: 8253492
    Abstract: A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Katsumasa Hijikata, Mineyuki Iwaida
  • Patent number: 8253494
    Abstract: A combination amplifier (1,1a) is provided which comprises a carrier amplifier (7,7a) and a series connection of a first peak amplifier (9,9a) and a second peak amplifier (11,11a) which are provided with a phase-shifted input signal relative to the input signal supplied to the carrier amplifier, wherein a transfer characteristics of the combination amplifier may be optimized by independently adjusting transfer characteristics of the carrier amplifier, the first peak amplifier and the second peak amplifier. Thereby, a linearity and/or an efficiency of the combination amplifier may be improved compared to a conventional Doherty amplifier.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: August 28, 2012
    Assignee: NXP B.V.
    Inventor: Igor Blednov
  • Patent number: 8253486
    Abstract: There is provided a wireless apparatus having a shielding function for shielding signal interference between driving power from a power amplifier and a conductive wire of a coupler. The wireless apparatus having a shielding function, includes an amplifying unit receiving preset driving power and amplifying a radio frequency (RF) input signal according to a preset gain, an impedance matching unit including at least one coil, receiving the driving power from the amplifying unit, and matching the impedance of a path of a signal, amplified from the amplifying unit, through the coil, and a shielding unit eliminating signal interference between the coil and a transmission path of the driving power from the amplifying unit.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: August 28, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ki Joong Kim, Tae Joon Park, Young Jean Song, Jun Goo Won, Youn Suk Kim
  • Patent number: 8248160
    Abstract: Systems, methods, and devices relating to the provision of deliberate predistortion to an input signal to compensate for distortions introduced by an amplifier subsystem. An input signal is received by a signal processing system which includes a predistortion subsystem. The input signal is decomposed and the fragments are then predistorted by the predistortion subsystem by applying a deliberate predistortion to the fragments. The predistorted fragments are then separately processed and recombined to arrive at the system output signal. The predistortion subsystem adaptively adjusts based on characteristics of the system output signal. Also, the predistortion subsystem is equipped with a control system that is state based—the state of the predistortion subsystem is dependent upon the prevailing conditions and, when required, the control system switches the state of the predistortion subsystem.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: August 21, 2012
    Assignee: Zarbana Digital Fund LLC
    Inventor: Aryan Saed
  • Patent number: 8248158
    Abstract: A chopper stabilized amplifier may include a modulation circuit that performs a digital conversion on an input signal so as to convert the input signal into a first modulated signal by using a modulation signal, the modulation signal being a rectangular wave having a predetermined frequency, an operational amplifier circuit that amplifies the first modulated signal so as to convert the first modulated signal into a second modulated signal, and a demodulation circuit that performs analog conversion on the second modulated signal so as to convert the second modulated signal into an output signal by using a demodulation signal, the demodulation signal having a waveform that corresponds to the differences between frequency components of the first modulated signal and the second modulated signal.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: August 21, 2012
    Assignee: Olympus Corporation
    Inventor: Masato Osawa
  • Patent number: 8242855
    Abstract: An integrated power combiner is disclosed. The power combiner includes a first circular geometry primary winding having one or more inductive elements, such as an active winding with one or more driver stages. A circular geometry secondary winding is disposed adjacent to the first primary winding, such as an active winding with one or more driver stages. A second circular geometry primary winding is disposed adjacent to the secondary winding and has one or more inductive elements. One or more connections are provided between one or more of the inductive elements of the first circular geometry primary winding and one or more of the inductive elements of the second circular geometry primary winding.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: August 14, 2012
    Assignee: Axiom Microdevices, Inc.
    Inventors: Scott D. Kee, Ichiro Aoki, Hui Wu, Seyed-Ali Hajimiri, Frank Carr, Rahul Magoon, Alexander Kral, Afshin Mellati, Florian Bohn, Donald McClymont
  • Patent number: 8237509
    Abstract: An amplifier with integrated filter (e.g., an LNA) is described. In one design, the amplifier may include a gain stage, a filter stage, and a buffer stage. The gain stage may provide signal amplification for an input signal. The filter stage may provide filtering for the input signal. The buffer stage may buffer a filtered signal from the filter stage. The amplifier may further include a second filter stage and a second buffer stage. The second filter stage may provide additional filtering for the input signal. The second buffer stage may buffer a second filtered signal from the second filter stage. All of the stages may be stacked and coupled between a supply voltage and circuit ground. The filter stage(s) may implement an elliptical lowpass filter. Each filter stage may include an inductor and a capacitor coupled in parallel and forming a resonator tank to attenuate interfering signals.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: August 7, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Tae Wook Kim, Guy Klemens, Kenneth Charles Barnett, Susanta Sangupta, Gurkanwal Singh Sahota
  • Patent number: 8228118
    Abstract: A switching amplifying method or a switching amplifier for obtaining a linearly amplified replica of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to class D amplifiers. Another aspect of the present invention provides a switching amplifier that is completely off when there is no input signal. Yet another aspect of the present invention further comprises an act of comparing an input signal with an output feedback signal for detection and correction of overall system signal processes therefore does not require a power supply regulator and is substantially immune to power supply and load perturbations.
    Type: Grant
    Filed: September 17, 2011
    Date of Patent: July 24, 2012
    Inventor: Wen-Hsiung Hsieh
  • Patent number: 8228119
    Abstract: When an output voltage from the amplifying circuit includes a positive DC voltage, an electric current continuously flows in a power source voltage, a load, and a reference voltage in this order. As a result, the reference voltage increases so as to be a first threshold voltage or more . The detecting section detects that the reference voltage is the first threshold voltage or more. When the output voltage from the amplifying circuit includes a negative DC voltage, an electric current continuously flows in the reference voltage, the load, a grounding potential in this order. As a result, the reference voltage reduces so as to be a second threshold voltage or less. The detecting section detects that the reference voltage is the second threshold voltage or less.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: July 24, 2012
    Assignee: Onkyo Corporation
    Inventors: Yoshinori Nakanishi, Kei Asao
  • Patent number: 8228117
    Abstract: A switching audio amplifier circuit drives a switching audio amplifier stage using a digital PWM signal from an audio source. A PWM duty ratio modifier modifies an edge timing of the digital PWM signal to produce a modified digital PWM signal. A mode switch switches between the digital PWM signal and the modified digital PWM signal in a way that masks audible noise such as clicks and pops at power-up and power-down of the switching audio amplifier. An integrating error amplifier compares a difference between the digital PWM signal and an amplified PWM signal and integrates the difference to control the edge timing modified by the PWM duty ratio modifier. A mode controller can apply an offset signal to the integrating error amplifier and can control the switching of the mode switch.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: July 24, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Pallab Midya, William J Roeckner
  • Patent number: 8228123
    Abstract: The invention relates to an integrated Doherty amplifier with an input network connecting the input to the main stage and to the peak stage, and with an output network connecting the main stage and the peak stage to the output. The output network has a shunt capacitor to signal-ground in parallel to a parasitic capacitance of the main stage, and has a shunt inductor between the main stage and signal ground. The shunt configuration enables to use the MMIC Doherty amplifier in a wide frequency range. At least some of the inductors of the input network and/or output network are implemented using bond wires. Their orientations and locations provide minimal mutual electromagnetic coupling between the wires and the return RF current paths.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: July 24, 2012
    Assignee: NXP B.V.
    Inventor: Igor Blednov
  • Patent number: 8228120
    Abstract: Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: July 24, 2012
    Assignee: Intersil Americas Inc.
    Inventors: Peter J. Mole, Philip V. Golden
  • Patent number: 8222959
    Abstract: There is provided an amplification control circuit that can adjust the amount of current being supplied to an amplifier according to a reference signal set beforehand. An amplification control circuit according to an aspect of the invention may include: a power supply section supplying a DC power set beforehand to at least one amplifier according to a reference signal set beforehand; a current control section detecting a current being supplied from the power supply section according to a ratio set beforehand and controlling the amount of current being supplied to the at least one amplifier from the power supply section; and a current adjustment section adjusting a level of the current being controlled by the current control section in order to increase or decrease the amount of current being supplied to the at least one amplifier from the power supply section.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: July 17, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Dae Seok Jang
  • Patent number: 8222958
    Abstract: The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: July 17, 2012
    Assignees: Teledyne Scientific & Imaging, LLC, The Regents of the University of California
    Inventors: Zachary M. Griffith, Miguel E. Urteaga, Mark J. W. Rodwell
  • Patent number: 8222956
    Abstract: An amplifying device and a signal processing method based on an amplifying device are provided, capable of reducing performance requirements of modules and reducing design difficulty of the modules. The amplifying device includes at least one amplifying module, including two receiving paths, in which a first receiving path is configured to attenuate and amplify an input signal after the input signal is pre-amplified, and a second receiving path is configured to amplify the input signal when the input signal is not pre-amplified. The signal processing method based on the amplifying device is further provided. The amplifying device and the signal processing method may be applied in a communication network system.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: July 17, 2012
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Xinrong Hu, Yuan Wei, Fan Yang, Linghai Zeng, Chen Wang, Ling Liu
  • Patent number: 8217719
    Abstract: A variable gain amplifier having an input node, a variable current source including a control input coupled to the input node, first and second branches coupled in parallel between a first supply terminal and the variable current source, the first and second branches defining a differential pair arranged to be controlled by first and second differential gain signals and having first and second output terminals, one of the output terminals including an output node of the variable gain amplifier; and a potential divider having a middle node coupled to the first and second output terminals, wherein the middle node is also coupled to the input node by a capacitor.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: July 10, 2012
    Assignee: STMicroelectronics S.A.
    Inventors: Olivier Touzard, Véronique Tournier
  • Patent number: 8212613
    Abstract: A switching amplifying method or a switching amplifier for obtaining one or more than one linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Another aspect of the present invention provides a switching amplifier that is completely off when there is no input signal. Yet another aspect of the present invention provides a switching amplifier for obtaining a plurality of different linearly amplified replicas of the input signal, and adds more slave outputs easily and economically.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: July 3, 2012
    Inventor: Wen-Hsiung Hsieh
  • Patent number: 8212619
    Abstract: Disclosed are circuits, techniques and methods for buffering a high frequency signal for transmission over an integrated circuit. In one particular implementation, a plurality of amplification circuits are individually biased for amplifying a signal from a voltage controlled oscillator and/or digitally controlled oscillator to provide a local oscillator signal on a device.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: July 3, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Yiping Han, Rajagopalan Rangarajan