Abstract: An apparatus and a method for producing a mask, which was derived using two-dimensional design tools, for imparting circuit designs directly on a three-dimensional surface. The method for creating the mask includes the steps of creating a two dimensional design with at least one element, establishing a location coordinate for the element using a two-dimensional coordinate system, converting the location coordinate for the element into a spacial coordinate for the element using a three-dimensional spacial coordinate system, converting the spacial coordinate for the element into a positional coordinate, and generating the mask using the positional coordinate. The apparatus for implementing three-dimensional designs using a mask, which is generated from a two-dimensional design, includes a light source and an elliptical mirror. The elliptical mirror has two focal points so that the elliptical mirror can focus a beam of light onto the three-dimensional surface.

Abstract: An integrated circuit chip controls a bus and terminates at least one differential data line of the bus wherein the at least one differential data line includes a first bus line of the bus and a second bus line of the bus. The integrated circuit chip includes a package and a substrate. The package includes terminals that are configured to couple the package to the bus. A first terminal is configured to couple the package to the first bus line, and a second terminal is configured to couple the package to the second bus line. The substrate is supported by the package. Furthermore, the substrate includes a bus controller circuit coupled to the terminals and a terminating circuit coupled to the first terminal and the second terminal. The bus controller circuit is configured to control transfer of data on the bus, and the terminating circuit is configured to substantially match a characteristic impedance of the at least one differential data line.

Abstract: A design support system including a data reading unit for reading circuit data for simulation of a circuit to be designed and analyzing and structuring the circuit data to output structured data, a structured circuit data storing unit for storing the structured circuit data output from the input data reading unit, and a circuit data editing unit for extracting and editing arbitrary part of data to be edited from the structured circuit data stored in the structured circuit data storing unit to merge the editing contents with the contents of the structured circuit data stored in the structured circuit data storing unit.

Abstract: A method provides a more informative result to a user in connection with the search for documents in a database. In particular, the method provides augmented addresses, in the Internet environment augmented universal resource locators, which include an indication of a document attribute which may be of interest to the user. Such attributes may include an indication of the language of the document (e.g., English or Japanese) or the popularity of the document.

Abstract: According to the preferred embodiment, a method is provided for automatically coloring VLSI design elements for the purpose of assigning binary properties to the elements. The preferred method is particularly applicable for use generating phase shift mask designs from VLSI CAD datasets. The preferred method uses net coloring to automatically generate a data set of colored elements. The preferred method is not dependent on the order in which the elements are operated upon. The preferred method has the additional advantage of being able to automatically detect conflicts that prevent the VLSI design from being optimally colored. The preferred method is equally applicable to hierarchical VLSI databases with nested components and traditional flat databases. When applied the hierarchical databases, the preferred method provides element coloring with minimal data flattening required.

Abstract: A method and apparatus to estimate properties of an integrated circuit device utilizes reduced resources. The representation of an integrated circuit is sampled using the statistical techniques of survey sampling. An average value of a property is determined from these samples and used to determine the property of the integrated circuit as a whole. Thus a property of an integrated circuit is determined from an analysis of a fraction of the integrated circuit representation. Error bounds associated with the property can be optionally determined from the estimated variance of the sampled property measurements. The method is realized using a general purpose computer. The invention has application to the estimation of integrated circuit manufacturability, yield and other properties.

Abstract: A computer-based method and system is disclosed that automates the design and layout of digital multiplier circuits. The preferred method utilizes an automatic design generator having a user interface which receives design requirements for a digital multiplier circuit design. A digital multiplier design generator receives the design requirements for the digital multiplier and retrieves relevant component implementations from a component library. Stored digital multiplier benchmarks are then retrieved from a benchmark memory and applied to corresponding digital multipliers to determine which of the various implementations optimally satisfies the user design requirements. Once the optimal digital multiplier implementation is selected, the digital multiplier design generator produces a logic design including a netlist and a physical design including design directives which are then used to place and route the digital multiplier as a finished layout.

Abstract: A method and system for improved monitoring of document changes in a search engine by an indexing program. Once an indexing or other such monitoring program is halted, upon restart the monitoring program needs to update its own files and its indexes to reflect document changes that occurred while halted. A file system such as the Windows NT file system persistently logs document change information on disk in a monotonically increasing, uniquely-numbered persistent record, which further identifies the file that has changed. The method and system utilize the logged change information to efficiently maintain the indexes, and to rapidly update the indexes after a shutdown and subsequent restart.

Abstract: A method, apparatus, and article of manufacture for a computer implemented storage mechanism for persistent objects in a database management system. A statement is executed in a computer. The statement is performed by the computer to manipulate data in a database stored on a data storage device connected to the computer. It is determined that an object is to be stored in an inline buffer. When the object can be entirely stored in the inline buffer, the object is stored in the inline buffer. When the object cannot be entirely stored in the inline buffer, a selected portion of the object is stored in the inline buffer and the remaining portion of the object is stored as a large object.

Abstract: WFMS execute a multitude of process models consisting of a network of potentially distributed activities. Within this structure is the implementation of events within WFMS like any other process activity. Thus events are implemented as event-activities, a special type of an activity within said WFMS. Such an event-activity can manage an event occurring internal or external to the WFMS.

Abstract: A system and method is disclosed for converting a polygon-based layout in an integrated circuit to an object-based layout. In one aspect of the invention, a user-definable element set allows a user to program element types that are to be recognized. A candidate element type is chosen for recognition. A seed layer corresponding to the current element type is derived from the polygon-based view. The seed layer includes seed shapes. At least one of the seed shapes is analyzed to obtain its defining attributes. The attributes are used to configure a candidate element, which is an element type from the user-definable element set. The geometries of the candidate element are compared to corresponding geometries in a support view. If the geometries of the layers of the candidate element are entirely contained within the geometries on the respective layers of the support view, then the candidate element is considered recognized. The candidate element is then added to a recognized view.

Abstract: A computer implemented method for generating virtual files to provide more flexibility and efficiency in the sharing of data within a physical information file. In a computer system, a large physical file contains many separate data portions that need to be shared. In one case, the data portions can correspond to video and audio information of multi-media scenes. An application can need to jump within the physical file from scene to scene when composing user interactive multi-media applications, such as storybook applications. The present invention provides a mechanism allowing a user to define a virtual file containing certain data portions of the physical file. The user inputs an offset value representing a byte offset from the start of the data portion in the physical file and also the size of the data portion is input. The offset value, the size and the file name of the virtual file is recorded into an index file.

Abstract: The inventive system and method uses two relationships to update the distance vector after the loop strip-mining optimization has been performed by the compiler. The invention applies the original distance vector for the un-stripmined loop and the strip size from the strip-mining optimization to the relationships, and outputs either one or two distance vectors, depending upon whether the distance is a multiple of the strip size. The invention allows subsequent optimization to occur after strip-mining, and eliminates the need of having to normalize the stripmined loop to recompute the subscripts. The invention also eliminates the need to re-analyze the dependencies of the loop.

Abstract: In response to a command by a local computer system, a copy of a remote document is downloaded onto a remote update network device from an origin network device. A predetermined time after the remote document copy is downloaded, the update network device interfaces with the origin network device to compare the remote document with the remote document copy. If the remote document has been modified since it was copied onto the update network device, the remote document copy is updated to reflect the modifications. When the local computer system reconnects to the network, the updated remote document copy may be downloaded into the memory of the local computer system if the remote document copy on the update network device is different than a local copy of the remote document stored in the local computer system.

Abstract: A method for discovering association rules in a database that employs item constraints for extracting desired data relationships from a data base, thereby reducing the execution time of the rule discovery process and increasing the quality of the information returned. Such constraints allow users to specify the subset of rules in which the users are interested. Given a set of transactions D and constraints represented by a boolean expression .beta., the invention integrates the constraints into a selected rule discovery method rather than implementing the constraints as a post-processing step. The invention quickly discovers association rules that satisfy .beta. and have support and confidence levels greater than or equal to user-specified minimum support and minimum confidence levels, and may be implemented even when a taxonomy is present.

Abstract: The present invention pertains to an apparatus and process for storing information object collections in a database. Examples of such object collections are nested tables and variable length arrays. In an embodiment, the invention provides mechanisms and methods for storing nested tables in either a base table of a database, or an index-organized table. In one embodiment, mechanisms and methods are provided for storing variable length arrays into a table column, as a large object ("LOB"), or as an index-organized table. The invention also provides methods and mechanisms for accessing data from these storage mediums.

Abstract: There is provided a method for designing a cell array layout of a non-volatile memory device which facilitates a contact hole process and contributes to the reduction of chip size, by modifying a layout of active contact holes. In the method, the distance between active regions are uniformly maintained in all cells by forming a second active line over a active contact region. Therefore, variations, caused by microloading effects when patterning active regions, of the width of active regions in some cell strings can be prevented. Operational failure of a cell caused by variations in the coupling ratio can be prevented, as well.

Abstract: In a semiconductor integrated circuit comprising: a logic circuit which performs prescribed logical operations; first power supply lines (fundamental power lines) which supply source power to the logic circuit; and second power supply lines which are provided, on the logic circuit, in a wiring level different from that for the first power supply lines and also which are interconnected with the first power supply lines through contact holes at the intersections therebetween, the number and the positions of the contact holes can be determined so as to minimize the voltage drop value at the logic circuit. As a result, the voltage drop can be relaxed, thus assuring stable operations of the circuit.

Abstract: The invented method addresses two important issues concerning don't cares in formal system or circuit synthesis verification. First, it is shown how to represent explicit don't cares in linear space in a flattened hierarchy. Many circuits need this information for verification, but the classical calculation can be exponential. Second, three interpretations of verification on incompletely specified circuits are explored and it is shown how the invented method makes it easy to test each interpretation. The invented method involves transforming each cell within an original circuit that implements an incompletely specified function into set of plural cells that implement the upper and lower bound of the interval of the function. The method thus constructs networks for the endpoints of the intervals and, rather than constructing traditional miters, connects the outputs of the interval circuits with the logic appropriate for the property, e.g. equality or consistency, that is to be verified.

Abstract: A method and apparatus are presented for performing intrusive testing in order to verify proper operation of a microprocessor "feature". The method includes providing a microprocessor model which includes a representation of the feature to be tested. The feature operates in one of several different operating modes as determined by the states of one or more control signals. Intruder logic, configured to restrict operation of the feature to a single desired operating mode, is introduced into the microprocessor model. The microprocessor model executes a testing program which requires operation of the feature and produces a result. The result produced by the microprocessor model is compared to an expected result. Any difference between the result produced by the microprocessor model and the expected result may be due to an error in feature hardware or the portion of the feature control circuitry associated with the selected operating mode. The microprocessor model may be a software implementation (i.e.