Abstract: A system comprises a first processing block configured to receive, from a first local resource, a formatted transaction in a format that is not recognizable by a remote endpoint; determine a first transaction category, from among a plurality of transaction categories, of the formatted transaction based on content of the formatted transaction; perform one or operations on the formatted transaction based on the first transaction category to form a reformatted transaction in a format that is recognizable by the remote endpoint; and place the reformatted transaction in a queue for transmission to the remote endpoint.

Abstract: An electronic unit comprises a microcontroller with a control input, a control output, and a signal input; and an interface circuit with a connection terminal, a control output, a control input, and a signal output. Both the microcontroller and the interface circuit each have a first operating mode and a second operating mode. The microcontroller is designed to cause the interface circuit to operate in its first operating mode. The interface circuit is designed to convert an input signal into a derivation signal representing a derivation of the input signal over time and to generate a control signal from the derivation signal. The microcontroller is designed to cause the interface circuit to operate in its second operating mode and to receive and convert a digital input signal and to output an output signal to the microcontroller.

Abstract: In various examples, a timer component that generates an event when an interrupt request has not yet been cleared within at least a predetermined amount of time.

Abstract: A system and method for efficiently measuring on-die power supply voltage are described. In various implementations, an integrated circuit includes at least one or more processors and on-chip memory. The on-chip memory has a higher security level than off-chip memory. One of the one or more processors is designated as a security processor. During the processing of the multiple boot steps of a bootup operation, the security processor initializes a message queue in on-chip memory. The security processor also loads multiple modules from off-chip memory into the on-chip memory. The processor executes the multiple loaded modules in an order based on using the message queue to implement inter-module communication among the plurality of boot modules. The security processor transfers requested data between modules using messages from the modules and data storage of the message queue. The modules are completed without reloading any modules from off-chip memory.

Abstract: Methods, apparatus, and articles of manufacture to dynamically configure overclocking frequency have been disclosed. An example apparatus include a clock rate adjuster to cause a processor core to operate at a first overclocked clock rate; a comparator to compare a sensed temperature corresponding to the processor core to a threshold; and the clock rate adjuster to, when the sensed temperature satisfies the threshold, decrease a clock rate of the processor core from the first overclocked clock rate by a user-defined amount, the decreased clock rate being above a normal operating clock rate of the processor core.

Abstract: A method and apparatus for starting up a digital currency data processing device, and a digital currency data processing device. The digital currency data processing device includes a hash board including a plurality of hash chip groups. The method includes: transmitting a startup signal to a refrigerating part of a data processing device before turning on a power supply; turning on the power supply; and controlling respective hash chips in each hash chip group to gradually and synchronously turn on cores. The above arrangement improves voltage balance of a hash board, and also ensures the accuracy of a clock signal.

Abstract: A method, apparatus, and computer program product provide for dynamically reprogrammable topologically unique integrated circuit identification. In an example embodiment, an integrated circuit may be arranged among multiple integrated circuits. The integrated circuit may be configured to derive a topologically unique identifier by performing input measurements of stimuli provided by a host circuit. The integrated circuit may be topologically indistinguishable from at least one other integrated circuit of the multiple integrated circuits from a perspective of the host circuit.

Abstract: First and second clock signals are generated based on signal transitions within first and second streams of symbols, respectively, received within an integrated circuit component, the first and second clock signals having a time-varying phase offset with respect to one another. A first control circuit, operating in a first timing domain established by the first clock signal, generates first control information based on the first stream of symbols and forwards the first control information, via a domain crossing circuit that bridges the time-varying phase offset, to a second control circuit operating in a second timing domain. The second control circuit generates a third stream of symbols based on the first control information and on the second stream of symbols, and a transmit circuit outputs the third stream of symbols from the integrated circuit component synchronously with respect to the second clock signal.

Abstract: Systems, methods, circuits, and devices for data protection are provided. In one example, a data processing device incudes a Physical Unclonable Function (PUF) source that is configured to generate PUF values, a bus, a plurality of bus access components that are configured to access the bus, and a masking information generation circuit. The masking information generation circuit is configured to generate masking information for at least one pair of bus access components using at least one PUF value and to transmit said information to the bus access components. The pair is configured in such a way that one bus access component masks the data according to the masking information generated for the pair before the data is sent over the bus and the other bus access component de-masks the data received over the bus according to the masking information generated for the pair.

Abstract: A memory controller includes a command queue having an input for receiving memory access commands for a memory channel, and a number of entries for holding a predetermined number of memory access commands, and an arbiter that selects memory commands from the command queue for dispatch to one of a persistent memory and a DRAM memory coupled to the memory channel. The arbiter includes a first-tier sub-arbiter circuit coupled to the command queue for selecting candidate commands from among DRAM commands and persistent memory commands, and a second-tier sub-arbiter circuit coupled to the first-tier sub-arbiter circuit for receiving the candidate commands and selecting at least one command from among the candidate commands.

Abstract: A control device includes a determination means that determines, when a request is received in which a power amount that is requested to be supplied, and an energy source or a type of the energy source of the power amount are specified, whether or not a supply of electric power that satisfies the energy source or the type of the energy source and the power amount that are specified in the request is possible by referring to a table that manages a stored power amount stored in a storage battery for each energy source or for each type of the energy source, and a control means that causes the power amount specified in the request to be discharged from the storage battery when it is determined by the determination means that the supply of electric power is possible.

Abstract: A remote controller enabled to control an external device includes a communication interface to communicate with the external device, an energy harvester to obtain an electrical energy, a power supplier to receive supply of the electrical energy from the energy harvester, and a processor configured to, based on a supply voltage of the power supplier being greater than or equal to a first threshold value and less than a second threshold value, control the communication interface to release communication connection established to communicate with the external device, and supply the electrical energy obtained by the energy harvester to the power supplier.

Abstract: Methods and apparatus are described for detecting anomalies in a clock signal. Example methods include sensing a clock signal that exhibits alternating phases during normal operation; responsive to sensing the start of a first phase, generating a pulse; and if the pulse terminates before sensing the end of the first phase, asserting a clock stopped detection signal. Example clock anomaly detection apparatus includes a clock signal input for coupling to a clock signal that, during normal operation, oscillates between first and second clock states. An anomaly detection output is asserted if the clock signal remains in the first clock state longer than a first phase expected duration or remains in the second clock state longer than a second phase expected duration.

Abstract: An electronic device control method includes obtaining position information of a specific object in a detection area, determining a movement direction of the specific object based on the position information, setting the electronic device to a first operating state in response to the specific object moving out of the detection area from a first direction, or setting the electronic device to a second operating state in response to the specific object moving out of the detection area from a second direction, the first operating state being different from the second operating state when the first direction is different form the second direction.

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

Abstract: A virtualized transaction terminal platform is provided. A transaction terminal is configured as a thin-client terminal. A virtualized transaction terminal (Virtual Machine (VM)) is instantiated remotely on a cloud or a server over a network connection. Peripherals connected to the thin-client terminal are mapped to virtual peripheral device drivers on the cloud or the server. Physical peripherals connected to the thin-client terminal are mapped inside the VM to the corresponding virtual peripheral device drivers. As transactions are initiated and physical peripherals are operated at the thin-client terminal, the transactions are processed by the VM and inputs/outputs from the physical peripherals are forwarded for processing by the corresponding virtual peripheral device drivers. A remote desktop (RD) agent on the thin-client terminal keeps states of the VM and virtual peripheral device drivers in synchronization with a peripheral display of the thin-client terminal.

Abstract: Embodiments are directed to a power grid distribution for a deterministic processor. The deterministic processor includes a plurality of functional slices, a plurality of data transport lanes for transporting data across the functional slices along a first spatial dimension, and a plurality of instruction control units (ICUs). An instruction in each subset of the ICUs includes a functional slice specific operation code and is transported to a corresponding functional slice along a second spatial dimension orthogonal to the first spatial dimension. A power supply grid of metal traces is spread across the first and second spatial dimensions for supplying power to the functional slices and the ICUs. At least a portion of the metal traces are routed as discontinuous stubs along the first spatial dimension or the second spatial dimension.

Abstract: The device described herein, which provides an interface between a plurality of master devices and a slave device, includes: a first timer configured to begin timing when a first access request is received from a first master device via a bus, and to be reset when a semaphore is allocated to the first master device; a second timer configured to begin timing when a second access request is received from a second master device via the bus, and to be reset when a semaphore is allocated to the second master device; and a controller configured to provide a first message to the first master device via the bus when a first expiration interval is measured by the first timer.

Abstract: Disclosed are an action recognition device and an action recognition method for recognizing actions of multiple objects in real time. The action recognition device includes a camera for capturing an image, a target queue storing therein data about at least one target, a reasoner configured to perform action reasoning, and a computing device electrically connected to the camera, the target queue and the reasoner, wherein the computing device may update the target queue based on an object tracking result on the image, extract a target from the target queue, request the reasoner to perform action reasoning on the extracted target, and output an action recognition result based on an action reasoning result provided from the reasoner.

Abstract: Methods, systems, and computer readable media can be operable to facilitate a testing of an unknown USB supply that is connected to a CPE (customer premise equipment) device to determine a current draw capacity of the USB supply. The CPE device may test the USB supply to determine whether the USB supply is capable of supplying a predetermined current. If the determination is made that the USB supply is not able to supply the predetermined current, an end-user may be instructed to plug an alternative PSU (power supply unit) into the CPE device, wherein the alternative PSU is capable of supplying the predetermined current to the CPE device. The CPE device may output an indication that an alternative PSU should be used via a graphics output to a display device through an HDMI (high-definition multimedia interface) connection or via an LED indication using one or more LEDs at the CPE device.