Patents Examined by Paul Yanchus, III
  • Patent number: 9563435
    Abstract: An information processing system includes an operation part that receives an operation performed by a user; and a body part that operates based on a request from the operation part. The operation part includes a power control part that, when receiving a power turning off instruction from the body part, reboots the operation part and causes the operation part to stand by in a power saving state in which some of operations are stopped, and, when receiving a start up notification from the body part, causes the operation part to return from the power saving state.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: February 7, 2017
    Assignee: RICOH COMPANY, LTD.
    Inventors: Keisuke Iwasa, Tadashi Nagata, Yoh Masuyama
  • Patent number: 9558007
    Abstract: In certain aspects, a system for out-of-band configuring BIOS setting data (BIOSSD) includes a host computer and a service processor (SP). The SP stores a BIOSSD collection and a human interface data (HID) collection. The HID collection includes questions for data of the BIOSSD collection and corresponding options for each question. When a remote management computer sends to the SP an information request, the SP retrieves the HID collection and transmits the questions and the corresponding options to the remote management computer. In response to a command indicating a selected corresponding option, the SP changes corresponding data of the BIOSSD collection according to the command. When the BIOS executed at the host computer issues a BIOSSD update request to the SP, the SP transmits a copy of the BIOSSD collection to the BIOS chip of the host computer to replace the BIOSSD collection stored in the BIOS chip.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: January 31, 2017
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventors: Sanjoy Maity, Baskar Parthiban, Satheesh Thomas, Purandhar Nallagatla, Harikrishna Doppalapudi, Ramakoti Reddy Bhimanadhuni
  • Patent number: 9557791
    Abstract: A computer device and a method for converting a working mode of a universal serial bus (USB) connector of the computer device. The computer device comprises a USB connector, a power interruption unit, a first switch unit, a south bridge chip, a reading unit, a control unit, and a charging control unit. The USB connector is linked to an external USB device. When a fast charging instruction is received, the power interruption unit interrupts the power supply of the USB connector; the first switch unit performs switching, so that the USB connector works in a fast charging mode. When the control unit receives a common charging instruction, the power interruption unit interrupts the power supply of the USB connector; the first switch unit performs switching, so that the USB connector works in a common charging mode, and data transmission can be performed.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: January 31, 2017
    Assignees: ASUS TECHNOLOGY (SUZHOU) CO., LTD., ASUSTEK COMPUTER INC.
    Inventors: Chang-Yu Hsieh, Pai-ching Huang, Li Chien Wu
  • Patent number: 9557803
    Abstract: A device for connecting a user station to a CAN bus, the user station in the active state being able to exchange messages with other user stations via the CAN bus using the device, according to the standard ISO 11898; the user station in the at-rest state being able to be activated using the device, in response to the reception of a wake-up information; the wake-up information configured as a CAN message according to the standard ISO 11898; in the device, a suitable first arrangement selectively evaluating the wake-up information received, so that the wake-up process is initiated only in response to the presence of wake-up information that is specified or specifiable for the respective user station which is characterized in that a storage arrangement is provided in the device in order, in case the wake-up process is initiated, which store the wake-up information evaluated for this entirely or partially.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: January 31, 2017
    Assignee: Robert Bosch GmbH
    Inventors: Tobias Lorenz, Karsten Wehefritz
  • Patent number: 9552040
    Abstract: A method and apparatus for enabling low power idle (LPI) signaling for Ethernet transceivers operating in legacy modes are disclosed that allow a high speed transceiver to retain energy efficient Ethernet (EEE) functionality even when the transceiver is operating in a slower speed mode. In some embodiments, an Ethernet device may enter an LPI mode upon receiving a regular LPI signal when its media independent interface (MII) is operating at a first transmission rate, and may enter the LPI mode upon receiving a modified LPI signal when the MII is operating at a first speed operating at a second transmission rate that is slower than the first transmission rate.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: January 24, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Hongchun Yu
  • Patent number: 9541937
    Abstract: An in-vehicle communication system capable of performing power supply control of the system according to the user's preference while simplifying the configuration of a control device for controlling a device based on information to be relayed. A control part of a GW device extracts information required for power supply control of loads from CAN messages received by first to third communication parts, specifies vehicle state based on the extracted information, determines power supply states in which the loads preliminarily stored into a power supply state table are to be, by associating the states with the specified vehicle state, and then transmits control information for providing an instruction of the determined power supply state to the power supply control device. The power supply state table in the storage part is rewritable, and a part of the power supply state table may be updated according to the preference of a vehicle's user.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: January 10, 2017
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Satoshi Horihata
  • Patent number: 9541980
    Abstract: An operation management device that comprises: a memory configured to store, for a plurality of nodes that each operate on one computer out of a plurality of computers included in a computer system and for a plurality of nodes capable of moving between the plurality of computers, operation suspension sequence data of the plurality of nodes, and data of operation suspension times needed for operation suspension of each of the plurality of nodes; and a processor configured to execute a procedure, the procedure comprising: from a timing earlier than suspending operation of the computer system and a timing earlier than a total sum of the operation suspension times of the plurality of nodes or greater, suspending operation of the plurality of nodes in an operation suspension sequence indicated by the operation suspension sequence data.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: January 10, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Satsuki Katano, Naohiro Tamura
  • Patent number: 9525595
    Abstract: Automated booting of a client for a subscriber is provided for clients that are for use in interactive user sessions that involve multimedia. A subscribe message is sent from the client to a proxy server. The proxy server authenticates the subscribe message, and sends the subscribe message to the configuration server. A notify message is sent to the client from the configuration server. The notify message is sent through the proxy server, and contains a location of a profile for the client. The profile is downloaded to the clients. This arrangement allows the persistence of profiles in a centralized place.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: December 20, 2016
    Assignee: Comcast Cable Communications, LLC
    Inventors: Manoj K. Chaudhari, Richard M. Woundy
  • Patent number: 9513927
    Abstract: Certain aspects direct to a computing device, which include a processor, a random access memory (RAM) having a frame buffer, a video controller configured to read video data from the frame buffer, and a non-volatile memory. The non-volatile memory stores an operating system, a media player, and first video data. The processor is configured to load the boot program to the RAM and execute the boot program. The boot program is configured to, when executed at the processor, boot the operating system in a first process or thread of the boot program, and load the media player and execute the media player in a second process or thread separate from a first process or thread. The media player is configured to, when executed by the processor, read the first video data from the non-volatile memory, and write second video data representing the first video data to the frame buffer.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: December 6, 2016
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventor: Clas Gerhard Sivertsen
  • Patent number: 9515552
    Abstract: A voltage regulator with an on/off control on the control terminal of the power transistor of the voltage regulator. The power transistor of the voltage regulator drives the conversion from a first voltage to a second voltage. The voltage regulator provides a power-saving switch at the control terminal of the power transistor, and includes a power-saving control circuit controlling the power-saving switch. When the power-saving switch is turned on, the control signal for the power transistor is conveyed into the control terminal of the power transistor. When the power-saving switch is turned off, the connection between the control signal for the power transistor and the control terminal of the power transistor broken.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: December 6, 2016
    Assignee: Nuvoton Technology Corporation
    Inventors: Ming-Che Hung, Ciao-Ling Lu
  • Patent number: 9515491
    Abstract: An approach to provide power from power supply devices to power consuming devices based on using priority levels for each of the power consuming and supply devices. The approach includes the steps of receiving information of a power consuming device from an energy management, including criticality information obtained from a universal appliance service system. The approach further includes receiving power supply information of one or more power supply devices associated with an electric grid, and receiving a power request from the power consuming device. The approach further includes determining that the power consuming device receives power from the power supply device, based on the criticality information and the power supply information.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gopal Kumar Bhageria, Kevin A. Klein, Jean-Gael Fabien Reboul
  • Patent number: 9501069
    Abstract: Embodiments relate to controlling a temperature of a solid state memory device using queue depth management by monitoring an operating temperature of each of a plurality of solid state drives of the solid state memory device. Based on a determination that the operating temperature of one of the plurality of solid state drives exceeds local device threshold values, the method includes receiving an indication that one or more local measures have been taken by the solid state memory device. Based on a determination that the operating temperature of one of the plurality of solid state drives exceeds a secondary global threshold value, the method includes reducing a queue length for the solid state memory device.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: November 22, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Craig A. Bickelman, Edward W. Chencinski, Seth R. Greenspan, M. Dean Sciacca, Xiaojin Wei
  • Patent number: 9495172
    Abstract: A computer system with a plurality of processors having a hardware-assisted virtualization and a memory, the computer system including a first processor group of the processors having hardware-assisted virtualization set disabled, and a second processor group of the processors and having hardware-assisted virtualization set enabled, the method having: booting a first OS by assigning the first processor group to the first OS; booting a virtual machine monitor to boot a virtual machine by assigning the second processor group to the virtual machine monitor; performed by the virtual machine monitor, booting a second OS by assigning a certain area of the memory to the second OS; and performed by the virtual machine monitor, setting a data path through which the first OS and second OS communicate with each other, the data path being set in the memory.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: November 15, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Toshiomi Moriki, Takayuki Imada, Naoya Hattori
  • Patent number: 9494989
    Abstract: Circuits, methods, and apparatus that provide for the powering of active components in connector inserts at each end of a cable may in various ways. For example, where a host is coupled to a device that is not self-powered, the host may provide power for circuitry at each end of the cable. In various embodiments of the present invention, the device may request higher voltage from the host, such that more power can be delivered. In these cases, the device may regulate the voltage received from the host to a lower voltage, and then provide the lower voltage to circuitry at one or both ends of the cable. Where the host is connected to a device that is self-powered, the host and the self-powered device may power their respective connector insert circuits.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: November 15, 2016
    Assignee: Apple Inc.
    Inventors: Paul A. Baker, William O. Ferry, James Orr
  • Patent number: 9494998
    Abstract: In an embodiment, a processor includes a plurality of cores to independently execute instructions, at least one graphics engine to independently execute graphics instructions, and a power controller including an alignment logic to cause at least one workload to be executed on a first core to be rescheduled to a different time to enable the plurality of cores to be active during an active time window and to be in a low power state during an idle time window. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: November 15, 2016
    Assignee: Intel Corporation
    Inventors: Inder M. Sodhi, Barnes Cooper, Paul S. Diefenbaugh, Faraz A. Siddiqi, Michael Calyer, Andrew D. Henroid, Ruchika Singh
  • Patent number: 9483067
    Abstract: Intelligent powered device (PD) control system including a switch system, state detector (SD), intelligent control device (ICD), and a PD. The switch system includes one or more conventional electrical switches. Each switch includes an interface to receive selection of a switch system state change between conductive and non-conductive states. The switch system includes a conductor pair(s) indicative of switch system state based on the selection. The SD signals the detected state to the ICD. The switch system output is in electrical connection with the detector such that, in the conductive state a loopback is formed in the switch system and SD, and in the non-conductive state no loopback is formed. The ICD receive the message from the state detector and transmits a fixture control command based on the message. The PD receives the command from the ICD via the data communications network, and controls its state based on the command.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: November 1, 2016
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Christopher Martin Lonvick, Charles Duffy, Luis Orlando Suau, Donald Schriner, Matthew A. Laherty
  • Patent number: 9477284
    Abstract: A device determines a first received power via a first input feed of a circuit board, and determines a second received power via a second input feed of the circuit board. The device further determines whether the first input feed and the second input feed are receiving power based on the first received power and the second received power. The device opens a switch, of the circuit board, when the first input feed and the second input feed are receiving power.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: October 25, 2016
    Assignee: Juniper Networks Inc.
    Inventors: Michael Braylovskiy, Jaspal Gill, David Owen
  • Patent number: 9464898
    Abstract: An inertial force sensor includes the following elements: a sensor element for converting an inertial force into an electrical signal; a sensor signal processor connected to the sensor element, for outputting an inertial force value; and a power controller for controlling electric power supply to the sensor signal processor, based on the inertial force value. When the inertial force value is maintained for a predetermined time period within a predetermined range in which a reference value is the middle value of the range, the power controller reduces the electric power supply to the sensor signal processor and updates the reference value to the inertial force value obtained after a lapse of the predetermined time period.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: October 11, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Isao Hattori, Takeshi Uemura
  • Patent number: 9465396
    Abstract: Aspects of the disclosure provide an integrated circuit (IC). The IC includes an input interface and a controller. The input interface is configured to receive an input signal providing information for controlling a supply voltage based on a performance characteristic of another IC. The controller is configured to generate an output signal for controlling the supply voltage based on a combination of the input signal and a performance characteristic of the IC.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: October 11, 2016
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventors: Michael Moshe, Reuven Ecker, Ido Bourstein
  • Patent number: 9465771
    Abstract: A server on a chip that can be a component of a node card. The server on a chip can include a node central processing unit subsystem, a peripheral subsystem, a system interconnect subsystem, and a management subsystem. The central processing unit subsystem can include a plurality of processing cores each running an independent instance of an operating system. The peripheral subsystem includes a plurality of interfaces for various configurations of storage media. The system interconnect subsystem provides for intra-node and inter-node packet connectivity. The management subsystem provides for various system and power management functionalities within the subsystems of the server on a chip.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: October 11, 2016
    Assignee: III HOLDINGS 2, LLC
    Inventors: Mark Bradley Davis, David James Borland, Arnold Thomas Schnell