Patents Examined by Pavel Ivanov
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Patent number: 9190894Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: June 10, 2015Date of Patent: November 17, 2015Assignee: Ideal Power Inc.Inventors: William C. Alexander, Richard A. Blanchard
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Patent number: 9184294Abstract: Techniques are disclosed for incorporating high mobility strained channels into fin-based transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein a stress material is cladded onto the channel area of the fin. In one example embodiment, silicon germanium (SiGe) is cladded onto silicon fins to provide a desired stress, although other fin and cladding materials can be used. The techniques are compatible with typical process flows, and the cladding deposition can occur at a plurality of locations within the process flow. In some cases, the built-in stress from the cladding layer may be enhanced with a source/drain stressor that compresses both the fin and cladding layers in the channel. In some cases, an optional capping layer can be provided to improve the gate dielectric/semiconductor interface. In one such embodiment, silicon is provided over a SiGe cladding layer to improve the gate dielectric/semiconductor interface.Type: GrantFiled: September 24, 2014Date of Patent: November 10, 2015Assignee: Intel CorporationInventors: Stephen M. Cea, Anand S. Murthy, Glenn A. Glass, Daniel B. Aubertine, Tahir Ghani, Jack T. Kavalieros, Roza Kotlyar
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Patent number: 9153782Abstract: To provide a method of efficiently manufacturing an organic light-emitting element with excellent light-emitting characteristics by application, the method includes: preparing ink and filling an inkjet device having an ink ejection nozzle with ink; preparing a substrate having a base layer including a first electrode; and positioning the inkjet device above the substrate, and causing the inkjet device to eject a drop of the ink onto the base layer, wherein, in the preparation of the ink, a value Z denoting a reciprocal of the Ohnesorge number Oh determined by density ? (g/dm3), surface tension ? (mN/m), and viscosity ? (mPa·s) of the ink and a diameter r (mm) of the ink ejection nozzle satisfies Formula 1, in the ejection of the drop of the ink, speed V (m/s) of the ejected drop satisfies Formula 2, and the value Z and the speed V (m/s) satisfy Formula 3.Type: GrantFiled: January 19, 2011Date of Patent: October 6, 2015Assignee: JOLED INC.Inventors: Hirotaka Nanno, Shinichiro Ishino, Tomoki Masuda, Yuko Kawanami, Noriyuki Matsusue
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Patent number: 9117665Abstract: In accordance with an embodiment, a nonvolatile semiconductor memory device includes a substrate including a semiconductor layer including an active region, a first insulating film on the active region, a charge storage layer on the first insulating film, an element isolation insulating film defining the active region, a second insulating film, and a control electrode on the second insulating film. The top surface of the element isolation insulating film is placed at a height between the top surface and the bottom surface of the charge storage layer, thereby forming a step constituted of the charge storage layer and the element isolation insulating film. The second insulating film covers the step and the charge storage layer. The second insulating film includes a first silicon oxide film and a first silicon nitride film on the first silicon oxide film. Nitrogen concentration in the first silicon nitride film is non-uniform.Type: GrantFiled: August 31, 2012Date of Patent: August 25, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Masayuki Tanaka
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Patent number: 9117892Abstract: There is provided a high-performance compound semiconductor epitaxial wafer that has an improved linearity of the voltage-current characteristic, a producing method thereof, and a judging method thereof. Provided is a semiconductor wafer including a compound semiconductor that produces a two-dimensional carrier gas, a carrier supply semiconductor that supplies a carrier to the compound semiconductor, and a mobility lowering semiconductor that is disposed between the compound semiconductor and the carrier supply semiconductor and that has a mobility lowering factor that makes the mobility of the carrier in the mobility lowering semiconductor lower than the mobility of the carrier in the compound semiconductor.Type: GrantFiled: October 5, 2011Date of Patent: August 25, 2015Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventor: Tsuyoshi Nakano
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Patent number: 9112035Abstract: A semiconductor substrate includes a substrate, an insulating layer, and a semiconductor layer. The insulating layer is over and in contact with the substrate. The insulating layer includes at least one of an amorphous metal oxide and an amorphous metal nitride. The semiconductor layer is over and in contact with the insulating layer. The semiconductor layer is formed by crystal growth.Type: GrantFiled: March 2, 2012Date of Patent: August 18, 2015Assignees: SUMITOMO CHEMICAL COMPANY, LIMITED, THE UNIVERSITY OF TOKYO, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGYInventors: Hisashi Yamada, Masahiko Hata, Masafumi Yokoyama, Mitsuru Takenaka, Shinichi Takagi, Tetsuji Yasuda, Hideki Takagi, Yuji Urabe
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Patent number: 9087872Abstract: A structure comprising at least one DTI-type insulating trench in a substrate, the trench being at the periphery of at least one active area of the substrate forming a pixel, the insulating trench including a cavity filled with a dielectric material, the internal walls of the cavity being covered with a layer made of a boron-doped material.Type: GrantFiled: January 30, 2014Date of Patent: July 21, 2015Assignee: STMicroelectronics (Crolles 2) SASInventors: Laurent Favennec, Arnaud Tournier, François Roy
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Patent number: 9076838Abstract: An IGBT includes a mesa section that extends between two cell trench structures from a first surface of a semiconductor portion to a layer section of the semiconductor portion. A source region, which is electrically connected to an emitter electrode, is formed in the mesa section. A doped region, which is separated from the source region by a body region of a complementary conductivity type, includes a first portion with a first mean net impurity concentration and a second portion with a second mean net impurity concentration exceeding at least ten times the first mean net impurity concentration. In the mesa section the first portion extends from the body region to the layer section. The second portions of the doped region virtually narrow the mesa sections in a normal on-state of the IGBT.Type: GrantFiled: September 13, 2013Date of Patent: July 7, 2015Assignee: Infineon Technologies AGInventors: Johannes Georg Laven, Alexander Philippou, Hans-Joachim Schulze, Christian Jaeger, Roman Baburske, Antonio Vellei
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Patent number: 9076922Abstract: In various embodiments, a method for fitting contact wires to a surface of a photovoltaic cell is provided. The method may include: feeding the contact wires to a contact wire positioning and placement device, wherein the contact wire positioning and placement device comprises a plurality of nozzles or eyes, wherein at least one contact wire is in each case passed through a respective nozzle or eye, for positioning and placement thereof onto the surface of the photovoltaic cell; positioning and placing the contact wires on the surface of the photovoltaic cell by means of the contact wire positioning and placement device; and attaching the contact wires to the surface of the photovoltaic cell.Type: GrantFiled: April 15, 2011Date of Patent: July 7, 2015Assignee: SolarWorld Innovations GmbHInventors: Martin Kutzer, Olaf Storbeck, Harald Hahn, Andreas Krause, Christian Koch
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Patent number: 9070735Abstract: The invention generally relates to a lateral power semiconductor transistor for example in integrated circuits. In particular the invention relates to Lateral Insulated Gate Bipolar Transistors or other lateral bipolar devices such as PIN diodes. The invention also generally relates to a method of increasing switching speed of a lateral bipolar power semiconductor transistor. There is provided a lateral bipolar power semiconductor transistor comprising a first floating semiconductor region of the first conductivity type located laterally spaced to an anode/drain region and a second floating semiconductor region of the second conductivity type located laterally adjacent the first floating semiconductor region, and a floating electrode placed above and in direct contact to the first and second floating semiconductor regions.Type: GrantFiled: July 2, 2013Date of Patent: June 30, 2015Assignee: Cambridge Microelectronics Ltd.Inventors: Vasantha Pathirana, Nishad Udugampola, Tanya Trajkovic
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Patent number: 9070786Abstract: A hybrid transistor is produced to have a substrate with a first (e.g., P type) well region and a second (e.g., N type) well region with an NP or PN junction therebetween. A MOS portion of the hybrid transistor has an (e.g., N type) source region in the first well region and a gate conductor overlying and insulated from the well regions. A drain or anode (D/A) portion in the second well region collects current from the source region, and includes a bipolar transistor having an (e.g., N+) emitter region, a (e.g., P type) base region and a (e.g., N type) collector region laterally separated from the junction. Different LDMOS-like or IGBT-like properties are obtained depending on whether the current is extracted from the hybrid transistor via the bipolar transistor base or emitter or both. The bipolar transistor is desirably a vertical hetero-junction transistor.Type: GrantFiled: October 3, 2014Date of Patent: June 30, 2015Assignee: FREESCALE SEMICONDUCTOR INC.Inventor: Vishal P. Trivedi
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Patent number: 9059710Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: October 15, 2014Date of Patent: June 16, 2015Assignee: Ideal Power Inc.Inventors: Richard A. Blanchard, William C. Alexander
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Patent number: 9054706Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: October 15, 2014Date of Patent: June 9, 2015Assignee: Ideal Power Inc.Inventors: Richard A. Blanchard, William C. Alexander
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Patent number: 9054707Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: October 15, 2014Date of Patent: June 9, 2015Assignee: Ideal Power Inc.Inventors: Richard A. Blanchard, William C. Alexander
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Patent number: 9041005Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.Type: GrantFiled: April 25, 2014Date of Patent: May 26, 2015Assignee: Micron Technology, Inc.Inventors: Scott E. Sills, Lifang Xu, Scott D. Schellhammer, Thomas Gehrke, Zaiyuan Ren, Anton J. De Villiers
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Patent number: 9041017Abstract: An organic light-emitting display device includes a first substrate and a second substrate; an organic light-emitting device disposed between the first and second substrates and includes a pixel electrode separately formed in each pixel, a common electrode, and an organic light-emitting layer disposed between the pixel electrode and the common electrode; and an electrode unit and at least one wiring unit that are disposed between the first substrate and the second substrate, the electrode unit including at least one thin-film transistor for transmitting a light-emitting signal to the pixel electrode and at least one capacitor, wherein an optical property modification layer obtained by modifying an optical property of at least one of the electrode unit and the wiring unit is formed on a surface of the at least one of the electrode unit and the wiring unit.Type: GrantFiled: March 5, 2012Date of Patent: May 26, 2015Assignee: Samsung Mobile Display Co., Ltd.Inventors: Len Kaplan, Valeriy Prushinskiy, Se-Ho Cheong, Won-Sik Hyun, Byoung-Seong Jeong, Jang-Seok Ma
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Patent number: 9040948Abstract: A nanoscale switching device comprises a first electrode of a nanoscale width; a second electrode of a nanoscale width; an active region disposed between the first and second electrodes, the active region containing a switching material; an area within the active region that constrains current flow between the first electrode and the second electrode to a central portion of the active region; and an interlayer dielectric layer formed of a dielectric material and disposed between the first and second electrodes outside the active region. A nanoscale crossbar array and method of forming the nanoscale switching device are also disclosed.Type: GrantFiled: September 16, 2010Date of Patent: May 26, 2015Assignee: Hewlett-Packard Development Company, L.P.Inventors: Gilberto Ribeiro, Janice H Nickel, Jianhua Yang
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Patent number: 9035350Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: September 8, 2014Date of Patent: May 19, 2015Assignee: Ideal Power Inc.Inventors: Richard A. Blanchard, William C. Alexander
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Patent number: 9029909Abstract: Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low.Type: GrantFiled: June 24, 2014Date of Patent: May 12, 2015Assignee: Ideal Power Inc.Inventors: Richard A. Blanchard, William C. Alexander
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Patent number: 9024364Abstract: A semiconductor device in one embodiment includes a semiconductor substrate, a fin disposed on a surface of the semiconductor substrate, an insulator including a gate insulator disposed on a side surface of the fin, and a gate electrode disposed on the insulator that is disposed on side surfaces of the fin and an upper surface of the fin. The device further includes a plurality of epitaxial stripe shaped layers disposed horizontally on the side surface of the fin at different heights, and an interlayer dielectric disposed on the semiconductor substrate to cover the fin and applying a stress to the fin and the epitaxial layers. Any two adjacent epitaxial layers along the fin height direction determine a gap and the gaps between adjacent layers increase or decrease with increasing distance from the substrate.Type: GrantFiled: August 30, 2012Date of Patent: May 5, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Kimitoshi Okano