Patents Examined by Phuc T. Dang
  • Patent number: 10937833
    Abstract: Disclosed is a variable resistance memory device including a first conductive line extending in a first direction parallel to a top surface of the substrate, memory cells spaced apart from each other in the first direction on a side of the first conductive line and connected to the first conductive line, and second conductive lines respectively connected to the memory cells. Each second conductive line is spaced apart in a second direction from the first conductive line. The second direction is parallel to the top surface of the substrate and intersects the first direction. The second conductive lines extend in a third direction perpendicular to the top surface of the substrate and are spaced apart from each other in the first direction. Each memory cell includes a variable resistance element and a select element that are positioned at a same level horizontally arranged in the second direction.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hui-Jung Kim, Kiseok Lee, Keunnam Kim, Yoosang Hwang
  • Patent number: 10935214
    Abstract: A light-emitting device includes pixels each including subpixels. Each subpixel includes light-emitting elements that emit respective pieces of light of colors different from each other, and a light-shielding film having openings at respective positions where the openings are opposed to the respective light-emitting elements at predetermined intervals. The openings have respective widths different from each other. The widths of the respective openings in a first direction and a second direction are sized to allow the light-shielding film to block a portion of the pieces of light emitted from the respective light-emitting elements and thereby to cause a 45-degree luminance viewing angle to be different between the first and second directions, and are sized to cause color differences (?u?v?) at a 45-degree chromaticity viewing angle (u?v?) in the first and second directions to be 0.020 or less. The 45-degree luminance viewing angle is expressed in a unit of cd/m2.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 2, 2021
    Assignee: JOLED INC.
    Inventor: Toshihiro Fukuda
  • Patent number: 10930869
    Abstract: A flexible substrate and a manufacture method thereof, and a flexible organic light-emitting diode display substrate. The flexible substrate comprises a first flexible layer and a second flexible layer stacked with each other and a hydrophobic layer on at least one side of at least one of the first flexible layer and the second flexible layer.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: February 23, 2021
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhongfei Dong, Yan Hu, Hongguang Yuan, Yue Wei, Jianxiong Huang, Guodong Liu, Yimin Dong, Yuan Chen
  • Patent number: 10930829
    Abstract: A method of producing side-emitting components includes providing a plurality of semiconductor chips on an auxiliary carrier, wherein the semiconductor chips on the auxiliary carrier are spaced apart from each other and each have a side surface provided with a transparent protective layer; covering the semiconductor chips with a radiation-reflecting molding compound so that in a plan view of the auxiliary carrier, the semiconductor chips are completely covered by the molding compound; and singulating the molding compound and the semiconductor chips into a plurality of components so that the components each include a semiconductor chip, wherein the components are singulated at the associated transparent protective layer, as a result of which the components each have a radiation exit surface exposed by the molding compound and formed by a surface of the remaining or exposed transparent protective layer.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: February 23, 2021
    Assignee: OSRAM OLED GmbH
    Inventor: Martin Brandl
  • Patent number: 10930551
    Abstract: Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a first metal feature in a dielectric layer and a capping layer over the first metal feature, selectively depositing a blocking layer over the capping layer, depositing an etch stop layer (ESL) over the workpiece, removing the blocking layer, and depositing a second metal feature over the workpiece such that the first metal feature is electrically coupled to the second metal feature. The blocking layer prevents the ESL from being deposited over the capping layer.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: February 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hsiang-Wei Liu, Tai-I Yang, Chia-Tien Wu, Hai-Ching Chen, Shau-Lin Shue
  • Patent number: 10923443
    Abstract: A substrate for an electronic device may include a first layer, a second layer, and may include a third layer. The first layer may include a capacitive material, and the capacitive material may be segmented into a first section, and a second section. Each of the first section and the second section may include a first surface and a second surface. The second layer may include a first conductor. The third layer may include a second conductor. The first surface of the second section of capacitive material may be directly coupled to the first conductor. The second surface of the second section of the capacitive material may be directly coupled to the second conductor. A first filler region may include a dielectric material and the first filler region may be located in a first gap between the first section of capacitive material and the second section of capacitive material.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 16, 2021
    Assignee: Intel Corporation
    Inventors: Brandon C Marin, Shivasubramanian Balasubramanian, Rahul Jain, Praneeth Akkinepally, Jeremy D Ecton
  • Patent number: 10923230
    Abstract: Method of predicting a response of a subject to food is disclosed. The method comprises: selecting a food to which a response of the subject is unknown; accessing a first database having data describing the subject but not a response of the subject to the selected food; accessing a second database having data pertaining to responses of other subjects to foods, the responses of the other subjects including responses of at least one other subject to the selected food or a food similar to said selected food; and analyzing the databases based on the selected food to estimate the response of the subject to the selected food.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: February 16, 2021
    Assignee: Yeda Research and Development Co. Ltd.
    Inventors: Eran Segal, Eran Elinav
  • Patent number: 10923511
    Abstract: An array substrate and a display device having thereof, the array substrate having a display region and a bending region surrounding the display region, wherein the array substrate includes a first substrate layer, a first buffer layer, a second substrate layer, at least one opening, and at least one metal trace extending over the display region and the bending region, wherein at least a part of the at least one metal trace covers a surface inside the at least one opening; an organic layer disposed in the at least one opening and encasing the at least one metal trace located inside the at least one opening.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: February 16, 2021
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Junyan Hu
  • Patent number: 10916641
    Abstract: The present application provides a thin film transistor, a method of manufacturing a thin film transistor, and a manufacturing system. The thin film transistor includes a substrate, a buffer layer, an active layer, and a gate insulating layer. A side area of the active layer is doped and modified, so that a surface of the side area is formed as a high resistance area, and then the gate insulating layer is formed by a chemical deposition process, thereby to avoid a weak channel current produced by unintentional electrically conduction of a boundary of the active layer due to a thinner thickness of the gate insulating layer when operating, thereby increasing electrical reliability of the thin film transistor.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: February 9, 2021
    Inventors: Xiaohui Nie, Jiawei Zhang
  • Patent number: 10916617
    Abstract: A display device including: a substrate; a light emitting element on the substrate; a pixel circuit between the substrate and the light emitting element, wherein the pixel circuit is electrically connected to the light emitting element, and includes a plurality of transistors; and a conductive pattern including an electrode portion and a wiring portion for supplying a voltage to the electrode portion, wherein the electrode portion overlaps an active pattern of at least one transistor among the plurality of transistors, wherein the conductive pattern is disposed between the substrate and the active pattern, and wherein a thickness of the wiring portion is greater than a thickness of the electrode portion.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: February 9, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myounggeun Cha, Sanggun Choi, Jiyeong Shin, Yong Su Lee
  • Patent number: 10916613
    Abstract: An array substrate and an OLED display device are provided. A trace system of the array substrate is designed in a structure with three layers of metal. By providing one layer of inorganic insulation film and one layer of organic insulation film between two layers of metal, a coupling effect between two layers of trace can be reduced. By exposing all or part of an organic insulation film in a region, which will form a second electrode plate of a storage capacitor, a storage capacitor with larger capacitance can be formed. By forming a third metal layer as a mesh structure, it is possible to reduce IR drop without increasing mask and improve display uniformity of the display device.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: February 9, 2021
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Pinquan Xu, Wei Wang
  • Patent number: 10910554
    Abstract: A spin-current magnetization rotational element includes a spin orbit torque wiring extending in a first direction and a first ferromagnetic layer disposed in a second direction intersecting the first direction of the spin orbit torque wiring, the spin orbit torque wiring having a first surface positioned on the side where the first ferromagnetic layer is disposed, and a second surface opposite to the first surface, and the spin orbit torque wiring has a second region on the first surface outside a first region in which the first ferromagnetic layer is disposed, the second region being recessed from the first region to the second surface side.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: February 2, 2021
    Assignee: TDK CORPORATION
    Inventors: Tomoyuki Sasaki, Yohei Shiokawa
  • Patent number: 10910327
    Abstract: A package for an electronic device may include a first layer. The first layer may include a first dielectric material. The first layer may have a planar first surface. The first layer may have a variable thickness. A second layer may be coupled to the first layer. The second layer may include a second dielectric material and may have a planar second surface. The second layer may have a variable thickness. A seam may be located at an interface between the first layer and the second layer, and the seam may have an undulating profile. The package may include at least one electrical trace, for example located in the first layer or the second layer.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Yonggang Li, Brandon C Marin, Vahidreza Parichehreh, Jeremy D Ecton
  • Patent number: 10910291
    Abstract: A method of creating thermal boundaries in a substrate is provided. The method includes forming the substrate with first and second sections to be in direct thermal communication with first and second thermal elements, respectively, machining, in the substrate, first and second cavities for defining a third section of the substrate between the first and second sections and disposing a material having a characteristic thermal conductivity that is substantially less than that of the ceramic in the first and second cavities.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 2, 2021
    Assignee: RAYTHEON COMPANY
    Inventor: Thomas P. Sprafke
  • Patent number: 10910366
    Abstract: A three-dimensional stacked integrated circuit (3D SIC) for implementing an artificial neural network (ANN) having a memory die having an array of memory partitions. Each partition of the array of memory partitions is configured to store parameters of a set of neurons. The 3D SIC also has a processing logic die having an array of processing logic partitions. Each partition of the array of processing logic partitions is configured to: receive input data, and process the input data according to the set of neurons to generate output data.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: February 2, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Tony M. Brewer
  • Patent number: 10903294
    Abstract: A display device includes a display part including a plurality of pixels arranged on a substrate, a plurality of dams in a first peripheral part adjacent to the display part, the plurality of dams being extended in a longitudinal direction of the first peripheral part and arranged in a direction crossing the longitudinal direction, the plurality of dams including a stack of a first organic insulating layer and a second organic insulating layer, and a blocking part disposed between the plurality of dams and corresponding to a removed portion of the first and second organic insulating layers.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: January 26, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ki Ho Bang, Nayun Kwak, Eunhye Kim, Sae bom Ahn, Seong Ryoung Lee, Sanghyun Jun, Wonsuk Choi
  • Patent number: 10903219
    Abstract: Flash memory technology is disclosed. In one example, a flash memory cell can include a charge storage structure, a control gate laterally separated from the charge storage structure, and at least four dielectric layers disposed between the control gate and the charge storage structure. Associated systems and methods are also disclosed.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: January 26, 2021
    Assignee: Intel Corporation
    Inventors: Haitao Liu, Guangyu Huang, Krishna K. Parat, Shrotri B. Kunal, Srikant Jayanti
  • Patent number: 10903073
    Abstract: A method of manufacturing a semiconductor device includes forming a first epitaxial layer on a first substrate. The first substrate includes a first semiconductor material having a first lattice constant and the first epitaxial layer includes a second semiconductor material having a second lattice constant different from the first lattice constant. The method also includes disposing a graphene layer on the first epitaxial layer and forming a second epitaxial layer comprising the second semiconductor material on the graphene layer. This method can increase the substrate reusability, increase the release rate of functional layers, and realize precise control of release thickness.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: January 26, 2021
    Assignee: Massachusetts Institute of Technology
    Inventors: Jeehwan Kim, Kyusang Lee
  • Patent number: 10903298
    Abstract: A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer: a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection line, and the pixel electrode.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: January 26, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seungkyu Lee, Taehoon Kwon, Byungsun Kim
  • Patent number: 10903281
    Abstract: Discussed are embodiments of an organic light emitting display device, which includes a plurality of pixels, each including at least one red sub pixel, a plurality of green sub pixels, and at least one blue sub pixel, wherein red sub pixels and blue sub pixels of adjacent pixels are aligned in a first direction and a second direction, wherein green sub pixels of the adjacent pixels are aligned in the first direction and are also aligned in the second direction, wherein the plurality of green sub pixels is disposed between the at least one red sub pixel and the at least one blue sub pixel of each pixel, and wherein the plurality of green sub pixels is offset from the at least one red sub pixel and the at least one blue sub pixel in the first direction and the second direction in the each pixel.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: January 26, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: EuiHyun Chung, Yongmin Jeong