Abstract: An array substrate and a display panel are provided. The array substrate includes a substrate, a planarization layer, a connection layer, and an anode layer. The planarization layer is disposed on a side of the substrate and is provided with a first via hole. The connection layer includes a connecting portion. The connecting portion is disposed in the first via hole and extends to a surface of the planarization layer. The anode layer is disposed on a surface of the connecting portion away from the planarization layer. In the array substrate, the connecting portion is disposed between the planarization layer and the anode layer, which can prevent pixels of the display panel from generating black dots.

Abstract: A photoelectric device includes a first electrode, a second electrode, a photoelectric conversion layer between the first electrode and the second electrode, and a charge transport layer between the first electrode and the photoelectric conversion layer. The photoelectric conversion layer is configured to absorb light in a wavelength spectrum and converting the absorbed light into an electrical signal. The charge transport layer includes a first charge transport material and a second charge transport material which collectively define a heterojunction.

Abstract: A display device includes: a first active pattern above a substrate; a first gate electrode above the first active pattern; a second active pattern above the first gate electrode; a second gate electrode above the second active pattern; and a first gate line between the first gate electrode and the second active pattern and extending in a first direction, wherein the second gate electrode is electrically connected to the first gate line through a contact portion penetrating an insulating layer between the second gate electrode and the first gate line, wherein, in a plan view, a width of the second gate electrode surrounding the contact portion is 1.5 micrometers (?m) or greater.

Abstract: The display substrate includes: a substrate, an auxiliary cathode layer, a first insulating layer, an anode layer, a second insulating layer, and a cathode layer that are sequentially stacked on the substrate in a direction away from the substrate; the anode layer includes a plurality of anode patterns spaced apart from each other, and an anode spacing area is formed between adjacent anode patterns; an orthographic projection of the auxiliary cathode layer on the substrate and an orthographic projection of the cathode layer on the substrate have an auxiliary overlapping area, and the auxiliary cathode layer is electrically connected to the cathode layer through a connection via hole in the auxiliary overlapping area; an orthographic projection of the connection via hole on the substrate is located inside the orthographic projection of the anode spacing area on the substrate.

Abstract: Exemplary methods of OLED device processing are described. The methods may include forming an anode on a substrate. Forming the anode may include forming a first metal oxide material on the substrate, forming a metal layer over the first metal oxide material, forming a protective barrier over the metal layer, and forming a second metal oxide material over the amorphous protection material. The protective barrier may be an amorphous protection material overlying the metal layer.

Abstract: A device for producing electricity. In one embodiment, the device comprises a doped germanium or a doped GaAs substrate and a plurality of stacked material layers (some of which are doped) above the substrate. These stacked material layers, which capture beta particles and generate electrical current, may include, in various embodiments, GaAs, InAlP, InGaP, InAlGaP, AlGaAs, and other semiconductor materials. A radioisotope source generates beta particles that impinge the stack, create electron-hole pairs, and thereby generate electrical current. In another embodiment the device comprises a plurality of epi-liftoff layers and a backing support material. The devices can be connected in series or parallel.

Abstract: A display substrate includes: a base substrate; a light-emitting unit in each pixel region and including a first electrode, an organic light-emitting layer, and a second electrode sequentially disposed in a direction away from the base substrate; an auxiliary conductive layer between the light-emitting unit and the base substrate; a pixel circuit in each pixel region and including a driving transistor. The auxiliary conductive layer is on a side of the pixel circuit away from the base substrate, the second electrode has a portion extending out of the pixel region and coupling to the auxiliary conductive layer through a via hole not overlapping the pixel region, the auxiliary conductive layer is insulated and spaced apart from the first electrode and has a mesh or chain shape, and a material of the auxiliary conductive layer is the same as a material of the first and second electrodes of the driving transistor.

Abstract: Provided is a display panel, including a display pixel unit located in a display region, the display pixel unit including a threshold compensation transistor, the threshold compensation transistor including a first channel and a second channel being connected by a conductive connection portion; a dummy pixel unit located in a dummy region; a first signal line located in the dummy region and configured to provide a constant voltage; and a first conductive block connected to the first signal line. The display pixel unit includes a first display pixel unit, the first display pixel unit is a display pixel unit adjacent to the dummy pixel unit in a row direction, and in a plan view of the display panel, the first conductive block at least partially overlaps the conductive connection portion of the threshold compensation transistor of the first display pixel unit. A display device is further provided.

Abstract: An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

Abstract: A display panel includes a substrate including a first area including a transmission area, a second area, and a third area, the second area and the third area being adjacent to the first area; a first pixel group and a second pixel group each disposed in the first area, the transmission area being disposed between the first pixel group and the second pixel group; first connection lines extending in a first direction and electrically connected to first pixels of the first pixel group; second connection lines extending in the first direction and electrically connected to second pixels of the second pixel group; and third connection lines extending in a second direction and disposed in the third area, the third connection lines being electrically connected to the first connection lines and the second connection lines.

Abstract: A display device includes an organic light emitting diode, a first transistor driving the organic light emitting diode, a second transistor transmitting a data signal to the first transistor, a third transistor transmitting a first power voltage to the first transistor, wherein a semiconductor pattern of the first transistor is disposed over a semiconductor pattern of the second transistor, a semiconductor pattern of the third transistor is disposed over the semiconductor pattern of the first transistor, a lower transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the second transistor, and an upper transistor insulating film is disposed between the semiconductor pattern of the first transistor and the semiconductor pattern of the third transistor.

Abstract: A display panel includes a first display region, a second display region, a third display region, a plurality of first pixel circuits, a plurality of second pixel circuits, a plurality of third pixel circuits, a plurality of first data lines, and a plurality of second data lines. The second display region at least partially surrounds the first display region, the third display region at least partially surrounds the second display region and the first display region, and a light transmittance of the first display region is greater than a light transmittance of the third display region. The plurality of first pixel circuits and the plurality of second pixel circuits are in the second display region, and the plurality of third pixel circuits is in the third display region. The plurality of first data lines are connected to the plurality of first pixel circuits and the plurality of third pixel circuits.

Abstract: Provided is a display apparatus including: a substrate in which a display element is arranged; a first thin film transistor arranged in the display area and including a first semiconductor layer including silicon and a first control electrode insulated from the first semiconductor layer; a first interlayer insulating layer covering the first control electrode; a second thin film transistor arranged on the first interlayer insulating layer and including a second semiconductor layer including an oxide semiconductor and a second control electrode insulated from the second semiconductor layer; a second interlayer insulating layer covering the second control electrode; a node connection line arranged on the second interlayer insulating layer and connected to the first control electrode via a first contact hole; a first planarization layer covering the node connection line; and a shielding electrode arranged on the first planarization layer to overlap the node connection line.

Abstract: A display device includes a substrate including a display area including pixels, and a light transmissive area including a portion in the display area, and signal lines disposed in the display area and electrically connected with the pixels, where the signal lines include a first signal line on a first side, a second signal line on a second side and arranged with the first signal line in a first direction, and a third signal line on a third side, and the third signal line is arranged with the first signal line and the second signal line in a second direction, the first and second signal lines are insulated from each other in the display area, and a length of the third signal line is longer than a length of the second signal line in the first direction.

Abstract: A light emitting display device includes a substrate, a pixel area having an emission area and a non-emission area on the substrate, a light emitting diode disposed in the pixel area, and a pixel driving circuit electrically connected with the light emitting diode and having a driving thin film transistor disposed in the emission area, wherein light emitted from the light emitting diode can be emitted to the outside of the substrate by passing through the substrate.

Abstract: Embodiments relate to forming an elastomeric interface layer (elayer) with a flap over multiple light emitting diode (LED) dies by forming materials across multiple LED dies and removing the materials between the LED dies. The formed flap of the elayer provides a large surface area for adhesion between each LED and a pick-up surface. For example, the flap may have a surface area that is larger than the light emitting surface of the LED die, or larger than the surface area of an elastomeric interface layer without the flap. As such, the elayer allows each LED to be picked up by a pick-up surface and placed onto a display substrate including control circuits for sub-pixels of an electronic display. In some embodiments, the LED dies are micro-LED (?LED) dies.

Abstract: A display panel includes: a substrate having a main display area, an auxiliary display area, and a peripheral area, the auxiliary display area having a circuit area and a component area; main display elements arranged in the main display area and main pixel circuits respectively connected to the main display elements; first display elements arranged in the component area; second display elements arranged in the circuit area; and auxiliary pixel circuits arranged in the circuit area, wherein the circuit area is arranged between the main display area and the component area, the auxiliary pixel circuits include: first pixel circuits connected to the first display elements, respectively; and second pixel circuits connected to the second display elements, respectively, and at least some of the second display elements overlap the first pixel circuits.

Abstract: A laser annealing method for a semiconductor device, includes: a first step of adding an impurity to a semiconductor substrate; and a second step of irradiating a region to which the impurity is added with a pulsed laser beam a plurality of times to anneal the semiconductor substrate. In the second step, a first region of a portion of the region to which the impurity is added is irradiated with the pulsed laser beam, and after a predetermined time interval, a second region adjacent to the first region is irradiated with the pulsed laser beam. The predetermined time interval is larger than a pulse interval of the pulsed laser beam.

Abstract: A display device includes a display panel including a plurality of pixels. At least one of the pixel includes a light emitting diode, a first transistor connected between a power line receiving a power source voltage and an anode of the light emitting diode, a second transistor connected between a data line and a first reference node, a first capacitor connected between the power line and the first reference node, a second capacitor connected between the first reference node and a second reference node, a third transistor connected between the first refence node and a reference voltage line receiving a reference voltage, a fourth transistor connected between an initialization voltage line receiving an initialization voltage and a drain of the first transistor, and a fifth transistor connected between the drain of the first transistor and the anode of the light emitting diode.

Abstract: The present disclosure relates to an organic light emitting display device and a method for manufacturing the same. In the organic light emitting display device according to the present disclosure, a bank which exposes an auxiliary electrode connected to a cathode electrode of an organic light emitting device is composed of multiple layers, and particularly, since the lowest layer of the bank, which is adjacent to the auxiliary electrode, includes an undercut, the cathode electrode and the auxiliary electrode are directly connected so that it is possible to prevent burnt due to a short-circuit between the cathode electrode and Ag included in the auxiliary electrode.