Abstract: A method of forming interconnects is provided. The method includes forming a plurality of mandrels on an interlayer dielectric (ILD) layer. The method further includes forming sidewall spacers on opposite sides of the each mandrel, wherein a portion of the ILD layer is exposed between adjacent sidewall spacers on adjacent mandrels, and removing the exposed portions of the ILD layer to form a first set of trenches between adjacent sidewall spacers. The method further includes forming a first set of interconnects in the first set of trenches, and removing the mandrels to expose portions of the ILD layer between the sidewall spacers. The method further includes removing the exposed portions of the ILD layer to form a second set of trenches between the sidewall spacers, and forming a second set of interconnects in the second set of trenches.

Abstract: A display device including: a panel including pixels, a pixel including; an LED; a capacitor between a first voltage line and a node; a first transistor between the first voltage line and a first electrode of the LED; a second transistor between a data line and a source of the first transistor; a third transistor between the node and a drain of the first transistor; a fourth transistor between the node and a second voltage line; a fifth transistor between the first voltage line and the source of the first transistor; a sixth transistor between the first electrode and the drain of the first transistor; and a seventh transistor between the second voltage line and the first electrode, the third and fourth transistor including: an active area including metal oxide; first and second gates above the active area; and a pattern below the active area.

Abstract: A display device includes a substrate including a pixel region and a peripheral region. A plurality of pixels is disposed in the pixel region of the substrate. Each of the plurality of pixels includes a light emitting element. Data lines and scan lines are connected to each of the plurality of pixels. A power line is configured to supply power to the plurality of pixels. The power line includes a plurality of first conductive lines and a plurality of second conductive lines intersecting the plurality of first conductive lines. The plurality of second conductive lines is arranged in a region between adjacent light emitting elements of the plurality of pixels. At least some of the plurality of second conductive lines extend in a direction oblique to a direction of extension of the data lines or the scan lines.

Abstract: A packaged radio-frequency device is disclosed, including a packaging substrate configured to receive one or more components, the packaging substrate including a first side and a second side. A shielded package may be implemented on the first side of the packaging substrate, the shielded package including a first circuit and a first overmold structure, the shielded package configured to provide radio-frequency shielding for at least a portion of the first circuit. A set of through-mold connections may be implemented on the second side of the packaging substrate, the set of through-mold connections defining a mounting volume on the second side of the packaging substrate. The device may include a component implemented within the mounting volume and a second overmold structure substantially encapsulating one or more of the component or the set of through-mold connections.

Abstract: A display apparatus includes: a plurality of pixel circuits at a display area, the display area having a non-quadrangular shape; a first signal line extending on the display area in a first direction, and electrically connected to a first pixel circuit from among the plurality of pixel circuits; a first voltage line extending on the display area in the first direction; a first load compensation capacitor adjacent to an end portion of the first signal line and an end portion of the first voltage line; a test circuit outside the display area; an output line electrically connected to the test circuit; and a connection portion configured to electrically connect the output line, the first signal line, and an electrode of the first load compensation capacitor to each other.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: A display panel includes: a substrate including an opening area, a display area, and a non-display area, the display area surrounding the opening area, and the non-display area being between the opening area and the display area; a plurality of display elements at the display area of the substrate, each of the display elements including a pixel electrode, an emission layer on the pixel electrode, and an opposite electrode on the emission layer; a thin-film encapsulation layer covering the plurality of display elements; a dam at the non-display area, and protruding from a top surface of a first insulating layer; and a recess between the opening area and the dam, and recessed in a depth direction of the first insulating layer. A lateral wall of the dam meets a first lateral wall from among lateral walls of the recess, the first lateral wall being adjacent to the display area.

Abstract: A display device includes a substrate. A display element is disposed over the substrate. A first inorganic encapsulation layer is disposed on the display element. An organic encapsulation layer is disposed on the first inorganic encapsulation layer. An auxiliary layer is disposed between the first inorganic encapsulation layer and the organic encapsulation layer. The auxiliary layer has a thickness less than about 100 nm, and includes an inorganic insulating material. A second inorganic encapsulation layer is disposed on the organic encapsulation layer.

Abstract: A display substrate and a manufacturing method and a display device are provided. The display substrate includes: a first electrode pattern, a connecting electrode pattern, a second electrode, and a light-emitting functional layer. The first electrode pattern is located in a display region and includes a plurality of first electrodes spaced apart from each other. The connecting electrode pattern is located in a peripheral region and includes a plurality of connecting electrodes. The second electrode is connected with the connecting electrode pattern, the second electrode and the first electrode pattern being spaced apart from each other. The light-emitting functional layer is located between the first electrode pattern and the second electrode, the connecting electrode pattern surrounds the first electrode pattern, and at least two of the plurality of connecting electrodes are each of a block shape and are spaced apart from each other.

Abstract: A three-dimensional stacked integrated circuit (3D SIC) having a non-volatile memory die, a volatile memory die, a logic die, and a thermal management component. The non-volatile memory die, the volatile memory die, the logic die, and the thermal management component are stacked. The thermal management component can be stacked in between the non-volatile memory die and the logic die, stacked in between the volatile memory die and the logic die, or both.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a first transistor, a second transistor and a storage capacitor. The display substrate further includes an extension portion protruding from the gate electrode of the first transistor, and the extension portion is extended from the gate electrode of the first transistor in the second direction; the extension portion is at least partially overlapped with the first electrode of the second transistor in a direction perpendicular to the base substrate and is electrically connected with the first electrode of the second transistor; in the first direction, the extension portion has a second side closest to the second capacitor electrode, and the second side is recessed in a direction away from the second capacitor electrode.

Abstract: An electroluminescent display device includes a substrate, a first electrode on the substrate, a connection pattern on the substrate and formed of a same material as the first electrode, a bank covering edges of the first electrode and the connection pattern and including a hydrophobic bank, a light-emitting layer on the first electrode, a second electrode on the light-emitting layer, the bank, and the connection pattern, and a conductive bank between the second electrode and the connection pattern, wherein the second electrode is in contact with a side surface of the conductive bank.

Abstract: A display apparatus includes a substrate including a display area having a plurality of pixel circuits that are spaced apart from each other. An inorganic material layer is arranged in the display area and includes a groove between adjacent pixel circuits of the plurality of pixel circuits. An organic filler is disposed in the groove. The inorganic material layer includes at least one insulating material layer and an etch stop layer. The etch stop layer includes a semiconductor material or a conductive material. The etch stop layer is provided on a bottom surface or a portion of a side wall of the groove.

Abstract: A semiconductor structure includes a conductive feature disposed over a semiconductor substrate, a via disposed in a first interlayer dielectric (ILD) layer over the conductive feature, and a metal-containing etch-stop layer (ESL) disposed on the via, where the metal-containing ESL includes a first metal and is resistant to etching by a fluorine-containing etchant. The semiconductor structure further includes a conductive line disposed over the metal-containing ESL, where the conductive line includes a second metal different from the first metal and is etchable by the fluorine-containing etchant, and where the via is configured to interconnect the conductive line to the conductive feature. Furthermore, the semiconductor structure includes a second ILD layer disposed over the first ILD layer.

Abstract: Exemplary embodiments for an exemplary dual transmission gate and various exemplary integrated circuit layouts for the exemplary dual transmission gate are disclosed. These exemplary integrated circuit layouts represent double-height, also referred to as double rule, integrated circuit layouts. These double rule integrated circuit layouts include a first group of rows from among multiple rows of an electronic device design real estate and a second group of rows from among the multiple rows of the electronic device design real estate to accommodate a first metal layer of a semiconductor stack. The first group of rows can include a first pair of complementary metal-oxide-semiconductor field-effect (CMOS) transistors, such as a first p-type metal-oxide-semiconductor field-effect (PMOS) transistor and a first n-type metal-oxide-semiconductor field-effect (NMOS) transistor, and the second group of rows can include a second pair of CMOS transistors, such as a second PMOS transistor and a second NMOS transistor.

Abstract: Provided are a display substrate and a display apparatus. The display substrate includes a base substrate, and an auxiliary cathode structure located on a side of the base substrate, the auxiliary cathode structure including a first conductive layer, an intermediate support layer, and a second conductive layer. In an implementation, a side of the intermediate support layer close to the first conductive layer includes any one or more of first protrusions and first grooves, and a side of the first conductive layer close to the intermediate support layer includes any one or more of second grooves engaged with the first protrusions and second protrusions engaged with the first grooves which are correspondingly disposed.

Abstract: A display device can include a substrate having a light emitting area and a non-light emitting area; an anode electrode disposed in the light emitting area; a metal layer disposed in the non-light emitting area and connected to a first driving power; an auxiliary electrode disposed on the metal layer and including at least one electrode hole exposing the metal layer; a bank disposed on an edge region of the anode electrode and an edge region of the auxiliary electrode; a light emitting layer disposed on a region of the anode electrode exposed by the bank; an electron transport layer disposed on the light emitting layer and the auxiliary electrode; and a cathode electrode disposed on the electron transport layer, in which the electron transport layer is in direct contact with the metal layer through the at least one electrode hole.

Abstract: A display device includes: a substrate; a buffer layer on the substrate; a first active pattern and a second active pattern on the buffer layer and spaced apart from each other; a first gate insulation layer on the first active pattern and the second active pattern; a first gate electrode and a second gate electrode on the first gate insulation layer, the first gate electrode and the second gate electrode respectively overlapping the first active pattern and the second active pattern; a second gate insulation layer on the first gate electrode and the second gate electrode; and a capacitor electrode on the second gate insulation layer, the capacitor electrode overlapping the first gate electrode, wherein a permittivity of the first gate insulation layer is greater than a permittivity of the buffer layer.

Abstract: A disclosed light emitting display apparatus includes a substrate; a pixel driving layer on the substrate and including a driving transistor; a cover layer covering the pixel driving layer; a plurality of light emitting elements, including a first light emitting element and a second light emitting element each having a first electrode on the cover layer and being adjacent to each other; a bank disposed on the cover layer and between the first electrode of the first light emitting element and the first electrode of the second light emitting element; and a capacitor overlapping with the bank. The capacitor may include a first metal layer connected with a first terminal of the driving transistor via the first electrode of one of the first and second light emitting elements, and a second metal layer connected with a gate of the driving transistor.

Abstract: A display device is provided. A display device includes a non-display area where no image is displayed, and a display area where images are displayed, and including a first area and a second area having different light transmittances, and a first pixel and a second pixel, wherein a transistor and an anode electrode of the first pixel are in the first area, wherein an anode electrode of the second pixel is in the second area, and a transistor of the second pixel is outside the second area, wherein the anode electrode and the transistor of the second pixel are electrically connected by a connection line, and wherein at least a part of the connection line is in at least one of the first area and the second area, and is covered by an anti-reflection layer.