Patents Examined by Phuc T. Dang
  • Patent number: 11844244
    Abstract: A display device includes: a substrate; first banks spaced apart from each other on the substrate; a first electrode and a second electrode covering the first banks and spaced apart from each other; a light-emitting element between the first electrode and the second electrode; a first contact electrode connected to the first electrode and contacting one end of the light-emitting element; and a second contact electrode connected to the second electrode and contacting another end of the light-emitting element. The first contact electrode includes a first material, the second contact electrode includes a second material, and physical properties of the first material and the second material are different from each other.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: December 12, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min Suk Ko, Tae Wook Kang, Kab Jong Seo, Bo Geon Jeon
  • Patent number: 11844263
    Abstract: A display panel is provided in the present disclosure. The display panel includes a first display region and a second display region, and a first substrate including a first base substrate. The first display region includes: a plurality of organic light-emitting elements on the first base substrate, a first sub-display region and a second sub-display region. The first sub-display region includes a plurality of first sub-light-transmitting holes. The plurality of first sub-light-transmitting holes do not overlap the plurality of organic light-emitting elements along a direction perpendicular to a plane of the first base substrate, and the plurality of first sub-light-transmitting holes are non-rectangular. The second sub-display region includes a plurality of second sub-light-transmitting holes.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: December 12, 2023
    Assignee: WUHAN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Yujiao Liang, Yangzhao Ma
  • Patent number: 11844246
    Abstract: According to one embodiment, a display device comprises a first lower electrode, a rib including a first pixel aperture, a partition including a lower portion on the rib and an upper portion protruding from a side surface of the lower portion, a first upper electrode, and a first organic layer between the first lower electrode and the first upper electrode. The lower portion includes a bottom layer and a stem layer on the bottom layer. The bottom layer is formed of a material which has a smaller etching rate to a mixed acid containing phosphoric acid, nitric acid, and acetic acid than the stem layer and which is conductive.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: December 12, 2023
    Assignee: JAPAN DISPLAY INC.
    Inventors: Shinichi Kawamura, Nobuo Imai, Hiroshi Ogawa
  • Patent number: 11839108
    Abstract: A transparent display device includes a substrate on which a pixel including first, second, and third emission areas and first and second transparent areas arranged along a first direction is defined, a light-emitting diode disposed in each of the first, second, and third emission areas and including a first electrode, a light-emitting layer, and a second electrode, and an auxiliary electrode extending in a second direction perpendicular to the first direction and electrically connected to the second electrode. The first emission area and the auxiliary electrode are disposed between the first transparent area and the second transparent area, and the second transparent area includes a first portion between the first emission area and the second emission area. Further, the first transparent area has a higher transmittance than the second transparent area.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: December 5, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jun-Ho Youn, Heume-Il Baek, In-Sun Yoo, Sang-Bin Lee
  • Patent number: 11839124
    Abstract: Embodiments of the disclosed subject matter provide a full-color pixel arrangement for a device, the full-color pixel arrangement including a plurality of sub-pixels, each having an emissive region of a first color, where the full-color pixel arrangement comprises emissive regions having exactly one emissive color that is a red-shifted color of a deep blue sub-pixel of the plurality of sub-pixels. Embodiments of the disclosed subject matter may also provide a full-color pixel arrangement for a device, the full-color pixel arrangement including a plurality of sub-pixels, each having an emissive region of a first color, where the full-color pixel arrangement comprises emissive regions having exactly one emissive color, and where the plurality of sub-pixels comprise a light blue sub-pixel, a deep blue sub-pixel, a red sub-pixel, and a green sub-pixel.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: December 5, 2023
    Assignee: Universal Display Corporation
    Inventors: Michael Hack, Michael Stuart Weaver, Nicholas J. Thompson, Julia J. Brown
  • Patent number: 11839134
    Abstract: A display device is provided. The display device includes a first substrate, a first detection electrode on the first substrate, a first bank including an opening that exposes the first detection electrode, a photosensitive layer on the first detection electrode, a second detection electrode on the photosensitive layer, a first electrode on the second detection electrode, a second bank including an opening that exposes the first electrode, a light emitting layer on the first electrode, a second electrode on the light emitting layer, a first optical system between the second detection electrode and the first electrode, and a second optical system on the second electrode, wherein the first optical system and the second optical system overlap the photosensitive layer in a thickness direction of the display device.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: December 5, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Suk Kim, Yu Na Kim, Soo Jung Lee, Keum Dong Jung, Go Eun Cha
  • Patent number: 11839090
    Abstract: Various embodiments of the present application are directed towards an integrated chip comprising memory cells separated by a void-free dielectric structure. In some embodiments, a pair of memory cell structures is formed on a via dielectric layer, where the memory cell structures are separated by an inter-cell area. An inter-cell filler layer is formed covering the memory cell structures and the via dielectric layer, and further filling the inter-cell area. The inter-cell filler layer is recessed until a top surface of the inter-cell filler layer is below a top surface of the pair of memory cell structures and the inter-cell area is partially cleared. An interconnect dielectric layer is formed covering the memory cell structures and the inter-cell filler layer, and further filling a cleared portion of the inter-cell area.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: December 5, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsia-Wei Chen, Wen-Ting Chu, Yu-Wen Liao
  • Patent number: 11830765
    Abstract: In some embodiments, the present disclosure relates to a method that includes forming a shallow trench isolation (STI) structure that extends into a substrate. A masking layer is formed over the substrate and includes an opening overlying the STI structure. A first removal process removes portions of the STI structure underlying the opening of the STI structure. A second removal process laterally removes portions of the substrate below the STI structure. A third removal process removes portions of the substrate that directly underlie the opening of the masking layer. An insulator liner layer is formed within inner surfaces of the substrate as defined by the first, second, and third removal processes. Further, a fourth removal process removes portions of the insulator liner layer covering a lower surface of the substrate. A semiconductor material is then formed over the SOI substrate and on the insulator liner layer.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Hung-Ling Shih
  • Patent number: 11825695
    Abstract: A pixel is discussed, which is disposed in a pixel area defined by a gate line, a data line and a pixel power line, and includes a light emission portion and a pixel circuit, wherein the pixel circuit can include a protrusion electrode protruded from the gate line along a length direction of the data line, and first and second thin film transistors disposed in parallel between the light emission portion and the gate line, using the protrusion electrode as a gate electrode.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: November 21, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Soyoung Lee, Hun Jang, Daeyoung Seo
  • Patent number: 11825705
    Abstract: A display panel includes: a substrate including a first area, a second area, and a third area located between the first area and the second area; a display layer including a display element located in the second area; a first metal layer located in the third area; an organic insulating layer located on the first metal layer and including at least one contact portion; and a second metal layer located on the organic insulating layer and contacting the first metal layer through the at least one contact portion, in which the second metal layer has a first hole, and the organic insulating layer has a second hole or a first recess corresponding to the first hole, and a residual layer located in the second hole or the first recess and including a part of at least one organic layer overlaps the first metal layer.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: November 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jeongho Lee, Minju Kim, Wonho Kim, Keunsoo Lee, Kyungchan Chae
  • Patent number: 11825693
    Abstract: A transparent display device includes a substrate on which a pixel including an emission area and a first transparent area is defined, and a light-emitting diode provided in the emission area and including a first electrode, a light-emitting layer, and a second electrode. The transparent display device further includes an anti-deposition layer provided in the first transparent area. The height of the light-emitting layer at an edge area of the emission area is higher than the height of the light-emitting layer at a center area of the emission area. Further, the second electrode is disposed over the entire surface excluding the first transparent area, and the height of the anti-deposition layer at an edge area of the first transparent area is higher than the height of the anti-deposition layer at a center area of the first transparent area.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: November 21, 2023
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Jun-Ho Youn, Heume-Il Baek
  • Patent number: 11817452
    Abstract: A method disclosed includes the following operations as below: forming at least one capacitor between multiple interposing conductors and multiple gates; and forming multiple interposing connectors connected to the interposing conductors. One of the interposing conductors is interposed between two adjacent gates of the gates. In a plain view, the interposing connectors are separate from the gates.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Hui Chen, Hao-Chieh Chan, Wei-Chih Chen
  • Patent number: 11818928
    Abstract: A display apparatus having a display panel that includes a first pad portion is provided. A flexible printed circuit board is configured to attach to the display panel. The flexible printed circuit board includes a second pad portion that is configured to electrically connect to the first pad portion. The first pad portion includes a plurality of first signal pads, a first test pad, and a first alignment pad having a first shape. The second pad portion comprises a second alignment pad having a second shape. The second alignment pad includes a first portion and a second portion that are spaced apart from each other. The first shape and the second shape are configured to form a predetermined alignment mark when the flexible printed circuit board is attached to the display panel at a predetermined position.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: November 14, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Huntae Kim, Sungun Park, Dongyoub Lee, Jiwon Han
  • Patent number: 11812645
    Abstract: A display panel and a display device are provided. The display panel includes a substrate; a driving circuit layer, disposed on the substrate and including a reset signal line and a first power signal line; a light-emitting element layer, including organic light-emitting elements, wherein each organic light-emitting element includes a first electrode, a light-emitting layer, and a second electrode, and the light-emitting layer includes a first common layer, a light-emitting material layer and a second common layer; and a compensation capacitor, disposed between at least two adjacent organic light-emitting elements and including a first plate and a second plate insulated from each other, wherein the first plate is disposed on a side of the first common layer facing the substrate and in contact with the first common layer and electrically connected with the reset signal line, and the second plate is electrically connected with the first power signal line.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: November 7, 2023
    Assignee: XIAMEN TIANMA MICRO ELECTRONICS CO., LTD.
    Inventors: Zhengchuan Zhang, Huangyao Wu, Hao Dai, Hai Liu
  • Patent number: 11805682
    Abstract: An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a power line and a voltage equalizing line which are electrically connected, the power line extends in a first direction which is substantially parallel to a direction in which the first data line extends, and the voltage equalizing line extends in a second direction. A method of manufacturing the display substrate and a display device are also provided.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: October 31, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yipeng Chen, Li Wang, Lujiang Huangfu
  • Patent number: 11805675
    Abstract: A display panel and a display device are provided. The display panel includes a substrate an array layer on the substrate; a display layer located on a side of the array layer away from the substrate, wherein the display layer includes a plurality of light-emitting devices; an optical layer located on a side of the display layer away from the array layer, wherein the optical layer includes a first optical structure, and the first optical structure is arranged corresponding to intervals between the plurality of light-emitting devices; and a first light-shielding member located on a side of the optical layer facing the substrate, wherein the first light-shielding member forms a light pass opening, and the light pass opening and the first optical structure overlap each other.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: October 31, 2023
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Yaodong Wu, Yang Zeng, Shucheng Ge, Yu Cai
  • Patent number: 11800751
    Abstract: A display panel includes: a substrate including a main display area, a component area, and a peripheral area; an auxiliary display element in the component area; an auxiliary pixel circuit in the peripheral area and comprising an auxiliary thin-film transistor and an auxiliary storage capacitor; a transparent connection line connecting the auxiliary display element to the auxiliary pixel circuit; and a first organic insulating layer and a second organic insulating layer that are stacked between the substrate and the auxiliary display element in the component area, wherein the first organic insulating layer is between the transparent connection line and the auxiliary display element, and a refractive index of the first organic insulating layer is between a refractive index of the transparent connection line and a refractive index of the second organic insulating layer.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: October 24, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Juhoon Kang, Gunhee Kim, Hyunho Kim, Hyungkeun Park, Donghwan Shim, Taehoon Yang, Joohee Jeon, Sunyoung Jung, Chungsock Choi
  • Patent number: 11798951
    Abstract: A display unit of the present disclosure includes a plurality of pixel circuits each including a light-emitting element, a drive transistor that has a drain and a source and supplies a current to the light-emitting element, and a control transistor connected to the drain or the source of the drive transistor. One channel portion is formed for two control transistors in respective adjacent two of the pixel circuits.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: October 24, 2023
    Assignee: Sony Group Corporation
    Inventors: Naoya Kasahara, Michihiro Kanno
  • Patent number: 11800749
    Abstract: Provided are a display panel and a display device. The display panel includes a base substrate; a first transistor and a second transistor, where the first transistor and the second transistor are formed on the base substrate, the first transistor includes a first active layer, a first gate, a first source, and a first drain, the first active layer contains silicon, the second transistor includes a second active layer, a second gate, a second source, and a second drain; and a first insulating layer and a second insulating layer, where the first insulating layer is located on a side of the second active layer facing away from the base substrate and between the second gate and the second active layer, the second insulating layer is located on a side of the second active layer facing towards the base substrate.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: October 24, 2023
    Assignee: Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Shui He, Ping An, Yaqi Kuang
  • Patent number: 11791340
    Abstract: Systems, methods, and apparatus for an improved body tie construction are described. The improved body tie construction is configured to have a lower resistance body tie exists when the transistor is “off” (Vg approximately 0 volts). When the transistor is “on” (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie. Space efficient Body tie constructions adapted for cascode configurations are also described.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: October 17, 2023
    Assignee: pSemi Corporation
    Inventor: Simon Edward Willard