Patents Examined by Phuong Phu
  • Patent number: 11184208
    Abstract: A communication method, including: receiving a reference signal, where the reference signal is used for channel measurement; sending CSI, where the CSI is used to indicate one or more measured values, and the measured values are used to determine a precoding matrix, or the measured values are a precoding matrix. The measured value is related to a first group of base vectors and a second group of base vectors, or the measured value is related to a Kronecker product of the first group of base vectors and the second group of base vectors; the first group of base vectors includes an inverse discrete Fourier transform OFT vector or a Kronecker product of two IDFT vectors, and the second group of base vectors include a discrete Fourier transform DFT vector.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: November 23, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Haibao Ren, Huiying Zhu, Yuanjie Li
  • Patent number: 11184057
    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). An apparatus of a terminal in a wireless communication system is provided. The apparatus includes at least one transceiver and at least one processor operatively coupled to the at least one transceiver. The at least one processor is configured to control the transceiver to communicate through a cell determined based on information regarding a strength of a received signal for a first cell and a path diversity (PD) for the first cell. The PD comprises information regarding paths associated with the first cell.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: November 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doyoung Jung, Sangkyou Ryou, Junhee Jeong, Ingil Baek
  • Patent number: 11184202
    Abstract: A digital transmission system includes a transmitter configured to transmit an orthogonal frequency division multiplexing (OFDM) signal along a signal path, a receiver for receiving the OFDM signal from the transmitter and extracting OFDM symbols from the received OFDM signal, and a diagnostic unit configured to (i) demodulate the received OFDM signal to create an ideal signal, (ii) compare the received OFDM signal with the ideal signal to calculate an error signal, (iii) cross-correlate the error signal with the ideal signal, and (iv) determine a level nonlinear distortion from one of the transmitter and the signal path based on the correlation of the error signal with the ideal signal.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: November 23, 2021
    Assignee: Cable Television Laboratories, Inc.
    Inventor: Thomas H. Williams
  • Patent number: 11184075
    Abstract: The present disclosure relates to a communication technique for combining a 5G communication system with IoT technology to support a higher data transmission rate than a 4G system, and a system thereof. The present disclosure can be applied to 5G communication and IoT related technology-based intelligent services (for example, smart homes, smart buildings, smart cities, smart cars or connected cars, health care, digital education, retail business, security and safety related services, etc.). In addition, the present disclosure relates to a method and an apparatus for setting a reference signal in a 5G or NR system.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 23, 2021
    Inventors: Hoondong Noh, Youngwoo Kwak, Cheolkyu Shin
  • Patent number: 11177812
    Abstract: When digital input data disappear temporarily, within a counting period of the counter and pulse generator, an output voltage of the voltage generator rises, a threshold detector compares the output voltage of the voltage generator with a plurality of threshold values to generate a plurality of comparison results, and a logic gate unit generates a control signal according to the comparison results, to a charge pump, so that the charge pump controls the voltage-controlled oscillator to accelerate or decelerate.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: November 16, 2021
    Assignee: GRACE CONNECTION MICROELECTRONICS LIMITED
    Inventors: Pei Wei Chen, Fang-Ren Liao, Po Huang Huang
  • Patent number: 11177818
    Abstract: Aspects of this disclosure relate to a very low intermediate frequency (VLIF) receiver with multi-decade contiguous radio frequency (RF) band coverage. Non-quadrature local oscillator (LO) signals drive mixers. The non-quadrature signals can be generated from low noise digital dividers having non-traditional division ratios. The non-traditional division ratios can be prime number ratios such as 5 and 7. The systematic non-quadrature nature of the LO/mixer can be subsequently corrected by a deterministic I-Q coupling network prior to complex signal processing.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: November 16, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventor: Niall Kevin Kearney
  • Patent number: 11159303
    Abstract: A list distribution station of a communication station includes processing circuitry to record, in a memory, a grand master list containing a station code of a grand master and a station code of a communication station synchronized with the grand master, and receive a priority notification frame which contains, as a sender station code, a station code of a present grand master in the communication system. The processing circuitry is further included to decide, when notified of the station code of the present grand master, whether or not to update the grand master list based on the notified station code of the present grand master and the grand master list, and upon having decided to update the grand master list, to update the station code of the present grand master station on the grand master list with the notified station code of the present grand master station.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: October 26, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Daisuke Osagawa
  • Patent number: 11153064
    Abstract: A clock and data recovery (CDR) device includes a data sampler configured to output a data signal by sampling an input signal according to a first clock signal; an edge sampler configured to output an edge signal by sampling the input signal according to a second clock signal, the second clock signal having substantially the same frequency as the first clock signal and having substantially an opposite phase to the first clock signal; an error detection circuit configured to identify a plurality of patterns based on the data signal and the edged signal and generate an error signal according to occurrence frequencies of the identified plurality of patterns; and an oscillation control circuit configured to generate a first oscillation control signal to control an oscillator generating the first and second clock signal according to the error signal.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: October 19, 2021
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Kwanseo Park, Deog-Kyoon Jeong
  • Patent number: 11139878
    Abstract: Embodiments of the present disclosure describe methods and apparatuses for group based beam reporting and channel state information reference signal configuration in new radio systems.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: October 5, 2021
    Assignee: Apple Inc.
    Inventors: Guotong Wang, Yushu Zhang, Alexei Davydov
  • Patent number: 11139948
    Abstract: The present invention relates to a system for performing phase detection and synchronization in an AMI communication network using a relay communication, and a method thereof. According to an embodiment of the present invention, a system for performing phase detection and synchronization in an AMI communication network using a relay communication includes an AMI server for collecting a ‘reference zero-crossing detection (ZCD) time difference by phase’ of input/output terminals of a main transformer installed in a substation; and a data concentration unit (DCU) comparing the ‘reference ZCD time difference by phase’ transmitted from the AMI server with a ‘ZCD time difference by phase’ collected by itself, and matching the same to have a time difference close to an error range.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: October 5, 2021
    Assignee: KOREA ELECTRIC POWER CORPORATION
    Inventors: Byung-Seok Park, No-Gil Myoung, Byung-Kab Jo, Jong-Mock Baek, Han-Jin Cho, Jung-Ho Lee, Jun-Su Shim
  • Patent number: 11133921
    Abstract: A data synchronizer including an input stage, a driver stage, and a keeper stage. The input stage latches input data to a data node in response to a first clock signal transition. The driver stage has an input coupled to the data node and has an output coupled to a gain node. The keeper stage latches data asserted on the gain node back to the input stage to maintain data on the data node in response to a second transition of the clock signal. The driver stage has an increased drive strength and a reduced loading capacitance to increase the gain-bandwidth product of the latch loop to reduce metastability. A flip-flop may be configured with input and output latches each including driver stages having increased drive strength and reduced loading capacitance to increase the gain-bandwidth product of each of the latch loops to reduce metastability.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: September 28, 2021
    Assignee: Silicon Laboratories Inc.
    Inventors: Linxiao Shen, Thomas Saroshan David
  • Patent number: 11125817
    Abstract: A test system can use first and different second driver stages to provide test signals to a device under test (DUT). A compound stage can receive signals from the driver stages and provide a voltage output signal to the DUT, such as via a gain circuit. The compound stage can include a buffer circuit configured to provide a first portion of the voltage output signal based on a first output signal from the first driver stage, and the compound stage can include a transimpedance circuit configured to provide a second portion of the voltage output signal based on a second output signal from the second driver stage. In an example, the gain circuit can receive a superposition signal comprising the first and second portions of the voltage output signal and, in response, provide a test signal to the DUT.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: September 21, 2021
    Assignee: Analog Devices, Inc.
    Inventor: Christopher C. McQuilkin
  • Patent number: 11126219
    Abstract: A receiver apparatus comprises circuitry configured for storing a first sequence of values. At the receiver apparatus, a communications signal is received which conveys a second sequence of values, the second sequence of values being related to the first sequence of values. According to some examples, the second sequence of values is identical to the first sequence of values. At the receiver apparatus, P results are calculated from a cross-correlation of the first sequence of values with at least a portion of a representation of the communications signal, where P is a positive integer. According to some examples, P?2. An estimate of a phase offset of a continuous clock is calculated as a function of the P results. According to some examples, the function is a non-linear function. The estimate of the clock phase offset may be used to achieve clock recovery at the receiver apparatus.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: September 21, 2021
    Assignee: CIENA CORPORATION
    Inventors: Shahab Oveis Gharan, Kim B. Roberts
  • Patent number: 11128509
    Abstract: An apparatus and method for transmitting broadcast signal to which channel bonding is applied are disclosed. The apparatus according to the present invention includes an input formatting unit configured to generate baseband packets corresponding to a plurality of packet types using data corresponding to a physical layer pipe; a stream partitioner configured to partition the baseband packets into a plurality of partitioned streams corresponding to the plurality of packet types; BICM units configured to perform error correction encoding, interleaving and modulation corresponding to the plurality of partitioned streams, respectively; and waveform generators configured to generate RF transmission signals corresponding to the plurality of partitioned streams, respectively.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: September 21, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Nam-Ho Hur, Heung-Mook Kim
  • Patent number: 11128306
    Abstract: A clock generation circuit includes a switched capacitor circuit for providing a discrete amount of charge to a resonator for sustaining energization of the resonator at specific portions of the clock cycle.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: September 21, 2021
    Assignee: NXP USA, INC.
    Inventors: Stefano Pietri, Juan Camilo Monsalve, Ricardo Pureza Coimbra, James Robert Feddeler
  • Patent number: 11121743
    Abstract: An apparatus is configured to be employed within a base station. The apparatus comprises baseband circuitry which includes a radio frequency (RF) interface and one or more processors. The one or more processors are configured to arrange phase tracking reference signal (PT-RS) resource elements (REs) and data REs as an arrangement for a transmission based on one or more diversity factors. The one or more diversity factors include a time domain and a frequency domain. The one or more processors are also configured to provide the transmission having the PT-RS REs to the RF interface for transmission to a user equipment (UE) device.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: September 14, 2021
    Assignee: Apple Inc.
    Inventors: Yushu Zhang, Alexei Davydov, Wook Bong Lee, Gang Xiong, Xinyue Zheng
  • Patent number: 11115178
    Abstract: A clock and data recovery device includes a phase detector circuitry, an analog modulation circuitry, a serial-to-parallel converter circuit, a digital modulation circuitry, and an oscillator circuit. The phase detector circuitry detects a data signal according to first and second clock signals to generate an up signal and a down signal. The analog modulation circuitry generates a first adjustment signal according to the up signal and the down signal. The serial-to-parallel converter circuit generates a first control signal according to the up signal, and to generate a second control signal according to the down signal. The digital modulation circuitry generates a digital code according to the first and the second control signals, and to generate a second adjustment signal according to the digital code. The oscillator circuit generates the first and the second clock signals according to the first adjustment signal and the second adjustment signal.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 7, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Jia-Ning Lou
  • Patent number: 11115034
    Abstract: The present invention provides a signal detection circuit, wherein the signal detection circuit includes a sampling circuit and a determination circuit. In the operations of the signal detection circuit, the sampling circuit uses a plurality of clock signals to sample an input signal to generate a sampling result, wherein the plurality of clock signals have different phases, and frequencies of the plurality of clock signals are lower than a frequency of the input signal. The determination circuit refers to the sampling result to determine if the input signal comprises valid data, so as to determine if the input signal comes from outside a chip, wherein the chip includes the signal detection circuit.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: September 7, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventor: Bing-Hung Chen
  • Patent number: 11115256
    Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to the wireless protocol in the RF wireless domain. A computing device may be trained to generate coefficient data based on the operations of a wireless transceiver such that mixing input data using the coefficient data generates an approximation of the output data, as if it were processed by the wireless transceiver. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: September 7, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy Chritz, Tamara Schmitz, Fa-Long Luo, Jaime Cummins
  • Patent number: 11115245
    Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: September 7, 2021
    Assignee: Sony Corporation
    Inventor: Takanori Saeki