Abstract: The present application relates to a method for making silicon epitaxy of a FDSOI device, which includes the following steps: providing a semiconductor structure; sequentially forming a first etch stop layer and an etch reaction layer on a surface of the semiconductor structure; performing an etching operation to the etch reaction layer to form a sidewall structure respectively; filling a second etch stop layer in a space between the sidewall structures at the position of the trench; etching the sidewall structures and the first etch stop layer under the sidewall structures to form a groove structure; removing the second etch stop layer and the remaining first etch stop layer; enabling a silicon substrate at the positions of the trench and the groove structure to epitaxially grow upwards to form epitaxial silicon, the epitaxial silicon being in flush with a top silicon layer.

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a first protruding structure and a second protruding structure over a substrate, and forming a first insulation material layer on the first protruding structure and the second protruding structure. The method includes performing a pre-treatment process on the first insulation material layer to form a first treated insulation material layer, and forming a second insulation material layer on the first treated insulation material layer. The method includes performing a first insulation material conversion process on the first treated insulation material layer and the second insulation material layer. The first protruding structure and the second protruding structure are bent toward opposite directions during the first insulation material conversion process.

Abstract: Methods for forming a Si-containing film on a substrate comprise heating the substrate to a temperature higher than S50° C., exposing the substrate to a vapor including a Si-containing film forming composition containing a Si-containing precursor having the formula: SiR1yR24-x-y(NH—SiR?3)x, wherein x=2, 3, 4; y=0, 1, 2, R1 and R2 each are independently selected from H, a halogen (Cl, Br, I), an C1-C4 alkyl, an isocyanate, a C1-C4 alkoxide, or an —NR3R4 group in which R3 and R4 each are independently selected from H, a C1-C4 alkyl, provided that if R3?H, R4>C1; each R? is independently selected from H, a halogen (Cl, Br, I), or a C1-C4 alkyl, and depositing the Si-containing precursor onto the substrate to form the Si-containing film on the substrate through an ALD process. The Si-containing precursor may be selected from SiH2(NH—Si(CH3)3)2, SiHCl(NH—Si(CH3)3)2, SiCl2(NH—Si(CH3)3)2, SiH(NH—Si(CH3)3)3, SiCl(NH—Si(CH3)3)3, or Si(NH—Si(CH3)3)4.

Abstract: Various back end of line (BEOL) layer formation techniques described herein enable reduced contact resistance, reduced surface roughness, and/or increased semiconductor device performance for BEOL layers such as interconnects and/or metallization layers.

Abstract: The present disclosure provides methods and compositions for surface functionalization of solid substrates. The compositions include functionalized silanes and nucleic acid constructs which may react to immobilize the nucleic acid constructs on the surface on the solid substrate. The disclosure also provides methods for immobilization of silanes and nucleic acid constructs on the surface of the substrate.

Abstract: The present disclosure provides a semiconductor device structure with fine patterns and a method for forming the semiconductor device structure, which can prevent the collapse of the fine patterns. The semiconductor device structure includes a first target structure and a second target structure disposed over a semiconductor substrate. The semiconductor device structure also includes a first spacer element disposed over the first target structure, wherein a topmost point of the first spacer element is between a central line of the first target structure and a central line of the second target structure in a cross-sectional view.

Abstract: A method for manufacturing a semiconductor substrate. The method provides a single-crystal diamond base layer. The method then forms a beryllium oxide (BeO) layer over the single-crystal diamond base layer. The method then forms a gallium nitride (GaN) layer over the BeO layer. In some embodiments, the method forms surfactants over the single-crystal diamond base layer and the BeO layer.

Abstract: A thin film transistor includes an active layer over a substrate, a gate electrode over the active layer, a gate line connected with the gate electrode, and a gate insulation film between the active layer and the gate electrode. The active layer includes a channel region overlapping the gate electrode, and a drain region and a source region on respective sides of the channel region. A length of a straight line connecting the drain region and the source region by a shortest distance may be greater than a width of the gate line parallel to the straight line.

Abstract: A method of scanning a substrate includes immobilizing a substrate on a substrate holder within a processing chamber and performing a pass of a parallel raster pattern by synchronously driving a first rotary drive and a second rotary drive to move the substrate relative to a processing apparatus focused on a localized spot on the substrate, the first rotary drive being coupled to a proximal end of a pendulum arm and the second rotary drive being mounted at a distal end of the pendulum arm and to the substrate holder. Driving the first rotary drive during the pass includes moving the pendulum arm in a first arc motion for a first portion of the pass while the localized spot is on the substrate, and then moving the pendulum arm in an opposite second arc motion for a second portion of the pass while the localized spot is on the substrate.

Abstract: The present invention discloses an optical detection apparatus for defining a detection surface on a carrier unit for a wafer in a semiconductor manufacturing process so as to obtain a corresponding detection image, wherein a vertical movement path for another device to move is defined above the carrier unit. The optical detection apparatus includes a support, and an imaging device disposed on the support and configured to be non-interfering with the movement path. The imaging device includes a lens group, an image capturing portion and a moving base. With the moving base, the photosensitive element of the image capturing portion is allowed to move horizontally relative to the lens group, and the imaging position can be adjusted, preventing image deformation or a reduced resolution easily caused by capturing at an oblique angle. Thus, the optical detection apparatus resolves complications of additionally mounting an optical detection apparatus in an optical detection environment within a narrow space.

Abstract: A 3D flash memory module chip includes a memory chip and a control chip. The memory chip includes a plurality of tiles and a plurality of heaters. The tiles each include a plurality of 3D flash memory structures. The heaters are disposed around the 3D flash memory structures of each of the tiles. The control chip is bonded with the memory chip to drive at least one of the heaters.

Abstract: A method for manufacturing a gallium oxide film where a mist generated by atomizing a raw-material solution or by forming a raw-material solution into droplets is conveyed using a carrier gas, the mist is heated, and the mist is subjected to a thermal reaction on the substrate to form a film, whereas the raw-material solution, a raw-material solution containing at least a chloride ion and a gallium ion is used, and the mist is heated for 0.002 seconds or more and 6 seconds or less. This provides a method for manufacturing a ?-gallium oxide film at low cost with excellent film forming speed.

Abstract: A semiconductor device includes a resistor having a resistor body including polysilicon, with fluorine in the polysilicon. The resistor body has a laterally alternating distribution of silicon grain sizes. The semiconductor device further includes an MOS transistor having a gate including polysilicon with fluorine. The fluorine in the gate has a higher average concentration than the fluorine in the resistor body. The semiconductor device may be formed by forming a gate/resistor layer including polysilicon. A fluorine implant mask is formed over the gate/resistor layer, exposing the gate/resistor layer in an area for the gate and over implant segments in an area for the resistor body. The implant segments do not cover the entire area for the resistor body. Fluorine is implanted into the gate/resistor layer where exposed by the fluorine implant mask. The gate/resistor layer is patterned to form the gate and the resistor body.

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and an inert gas to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the inert gas. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The processing region may be maintained free of helium delivery during the deposition method.

Abstract: In a method of cutting a fine pattern, a line structure is formed on a substrate. The line structure extends in a first direction, and includes a pattern and a first mask. The pattern and the first mask include different materials. A sacrificial layer is formed on the substrate to cover the line structure. The sacrificial layer is partially etched to form a first opening partially overlapping the line structure in a vertical direction. A portion of the first mask, an upper portion of the pattern and/or a portion of the sacrificial layer under the first opening are partially etched using an etching gas having no etching selectivity among the pattern, the first mask and the sacrificial layer. A lower portion of the pattern under the upper portion thereof is removed to divide the pattern into a plurality of pieces spaced apart from each other in the first direction.

Abstract: The present disclosure provides a semiconductor device structure with fine patterns and a method for forming the semiconductor device structure, which prevents the collapse of the fine patterns. The semiconductor device structure includes a first target structure and a second target structure disposed over a semiconductor substrate. The semiconductor device structure also includes a first spacer element disposed over the first target structure, wherein a topmost point of the first spacer element is between a central line of the first target structure and a central line of the second target structure in a cross-sectional view.

Abstract: A structure is manufactured by forming a mask that has an opening pattern on a surface of a substrate, etching the surface of the substrate with the mask to form a recessed portion corresponding to the opening pattern of the mask, forming a thin film including aluminum on a bottom surface of the recessed portion in a state where the mask remains, treating the thin film including aluminum with hot water to change the thin film into a fine recessed and projected layer including alumina hydrate smaller than the recessed portion, etching the bottom surface of the recessed portion, on which the fine recessed and projected layer is formed, in a state where the mask remains to form a fine recessed and projected structure on the bottom surface of the recessed portion, and thereafter removing the mask and the fine recessed and projected structure, which remains after the etching step.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.

Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.

Abstract: Plasma processing apparatus for processing a workpiece are provided. In one example embodiment, a plasma processing apparatus for processing a workpiece includes a processing chamber, a plasma chamber separated from the processing, and an inductively coupled plasma source configured to generate a plasma in the plasma chamber. The apparatus includes a pedestal disposed within the processing chamber configured to support a workpiece. The apparatus includes an insert disposed in the plasma chamber movable to one or more vertical positions within the plasma chamber. Methods for processing of workpieces are also provided.