Abstract: A method of decoupling a step for modulating a defect density from a step for modulating a junction depth. A semiconductor substrate (30) having a portion doped with a dopant (34) is heated to a pre-oxidation anneal temperature in a pre-oxidation anneal step (23). After the pre-oxidation anneal step (23), the semiconductor substrate (30) undergoes an oxidation step (25) which serves as a step for modulating the defect density. Subsequent to the oxidation step (25), the semiconductor substrate (30) undergoes a drive-in step (27) which serves as a step for modulating the junction depth. Then, the temperature of the semiconductor substrate (30) is lowered to allow further processing of the semiconductor substrate (30).

Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.

Abstract: Very shallow electrical junctions may be formed in an oxide free surface of a semiconductor by introducing an inert or reducing gas into a vacuum processing chamber, heating the semiconductor to between 750.degree. C. and 1100.degree. C., introducing a dilute solution of a dopant gas into the chamber, and exposing the semiconductor to the gases for about 0.5 to about 100 minutes, preferably between 10 and 30 minutes. A relatively wide range of surface dopant concentrations may be achieved thereby with dopant concentration controlled independent of junction depth. Non-oxide free semiconductor surfaces may be made oxide free by first heating the semiconductor surface in the presence of the reducing gas. This technique provides uniform surface dopant concentrations and is suitable for the formation of junctions in deep trenches and other features having high aspect ratios.

Abstract: The invention is predicated upon the discovery by applicants that exposure of a Ge surface to arsenic produces a drastic change in the step structure of the Ge surface. Subsequent exposure to Ga and growth of GaAs produces three-dimensional growth and a high threading dislocation density at the GaAs/Ge interface. However exposure of the Ge surface to Ga does not substantially change the Ge step structure, and subsequent growth of GaAs is two-dimensional with little increase in threading dislocation density. Thus a high quality semiconductor heterostructure of gallium arsenide on germanium can be made by exposing a germanium surface in an environment substantially free of arsenic, depositing a layer of gallium on the surface and then growing a layer of gallium arsenide. The improved method can be employed to make a variety of optoelectronic devices such as light-emitting diodes.

Abstract: A silicon oxide layer is formed on a silicon substrate, and an opening whose wall is sloped inward is formed in the silicon oxide layer. A seed crystalline silicon layer is formed from the opening. The seed crystalline layer is selectively oxidized while leaving the seed crystalline layer required for crystal growth. An oxide formed at this time closes the opening. Consequently, the seed crystalline layer is insulated from the silicon substrate. The seed crystalline layer is epitaxially grown, to obtain a silicon growth layer on a field oxide layer. The growth layer is insulated from the silicon substrate, and is uniform in surface direction. Accordingly, there is no parasitic capacitance due to a p-n junction between the silicon substrate and the growth layer, thereby to make it possible to perform a high-speed operation.

Abstract: A method and apparatus for producing photoluminescence emissions (68) from thin CaF.sub.2 films grown on either silicon or silicon/aluminum substrate shows narrow emission linewidth and high emission intensities for CaF.sub.2 with thickness as low as 0.2 .mu.m. The preferred embodiment is doped with a rare-earth such as Nd.

Abstract: A method for manufacturing a III-V Group compound or a II-VI Group compound semiconductor element by VPE, comprising the step of annealing a grown compound at 400.degree. C. or higher, or irradiating electron beam the grown compound at 600.degree. C. or higher.

Abstract: Ternary II-VI semiconductor films (16) are formed on a silicon substrate (12) by first depositing a monolayer of arsenic (14) or other Group V metal on a cleaned surface of the substrate. The ternary II-VI semiconductor film is then formed over the arsenic monolayer, either directly thereon or on top of an intermediate II-VI semiconductor buffer layer (18). The use of an arsenic passivating layer facilitates the epitaxial deposition of technologically important II-VI semiconductors such as ZnTe, CdTe, and HgCdTe on silicon substrates of arbitrary crystallographic orientation.

Abstract: A crystal of a compound semiconductor is deposited on a substrate using a metal organic vapor phase epitaxy within a reaction enclosure having a vertical flow of deposition gas supplied through a gas injector within the deposition enclosure. The deposition gas is supplied in a plurality of divided flow paths in which the flow rates are individually controlled. The injector comprises a plurality of gas jet ports which receive respective, plural flow paths and which are disposed in a two-dimensional array having dimensions corresponding to the two-dimensional main surface dimensions of the substrate thereby to supply a uniform flow of deposition gas over the entire two-dimensional main surface of the substrate. The method and apparatus have special application in the deposition of quaternary III-V compound semiconductor.

Abstract: An apparatus for zone melting a thin semiconductor film comprises an first laser for heating the thin semiconductor film, at least one additional laser for heating an insulating substrate, a first temperature detecting device for detecting the temperature of a melted portion of the thin semiconductor film, and a second temperature detecting device for detecting the temperature of a solidified portion of the thin semiconductor film. The apparatus further comprises a first controller for controlling an output of the first laser so as to maintain the temperature of the melted portion in a first predetermined temperature range, and a second controller for controlling an output of the additional laser so as to maintain the temperature of the solidified portion in a second predetermined temperature range.

Abstract: A group II-VI epitaxial layer grown on a (111) silicon substrate has a lattice mismatch which is minimized, as between the group II-VI epitaxial layer and the silicon substrate. The grown group II-VI epitaxial layer also has a (111) plane at the interface with the substrate, and a 30.degree. in-plane rotation slip is formed at the interface between the (111) silicon substrate and the group II-VI epitaxial layer. The above structure is produced by a metal organic chemical vapor deposition method (MOCVD), in which a mol ratio of a group VI gas source supply to a group II gas source supply is kept greater than 15 during the growth. The (111) silicon substrate is preferably mis-oriented toward the <110> direction of the silicon substrate. When a HgCdTe layer is grown on the epitaxial layer, the product thus formed has utility as a monolithic infrared detector in which a plurality of detector elements are formed in the HgCdTe layer and a signal processing circuit is formed in the silicon substrate.

Abstract: A method of manufacturing an optoelectronic semiconductor device whereby a surface (1) of a semiconductor (2) built up from a number of layers of semiconductor material (4, 5, 6, 7) grown epitaxially on a semiconductor substrate (3), with a top layer (4) of GaAs adjoining the surface (1) and a subjacent layer (5) comprising InP, in particular made of (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y P with 0.5<x<0.8 and 0.4<y<0.6, is provided with an etching mask (8), after which the top layer (4) and the subjacent layer (5) are locally etched in a plasma generated in a gas mixture comprising SiCl.sub.4 and Ar. According to the invention, CH.sub.4 is added to the gas mixture in which the plasma is generated. This measure leads to the creation of a smooth surface during etching of both layers, and in particular during etching of the layer comprising InP. The walls (10) of the ridge (9) formed in the layers are also smooth and steep.

Abstract: Applicants have discovered a method of reproducibly fabricating SEED devices having an enhanced contrast ratio by adjusting the thickness of a cap layer in relation to the reflector stacks to form a Fabry-Perot cavity. Specifically, after growth of the reflector stack and the quantum wells, the optical thickness of the region above reflector stacks is measured without breaking vacuum, and based on such measurement a cap layer is grown of sufficient thickness to form a Fabry-Perot cavity for light of desired wavelength. The result is a device with enhanced contrast between the "on" and "off" states sufficiently so that the state can be directly read without differential processing.

Abstract: In a method of manufacturing a semiconductor laser according to the present invention, an n-type (Al.sub.y Ga.sub.1-y).sub.0.5 In.sub.0.5 P (0.5.ltoreq.y.ltoreq.1) cladding layer, an (Al.sub.z Ga.sub.1-z).sub.0.5 In.sub.0.5 P (0.ltoreq.z.ltoreq.0.3) active layer, a p-type (Al.sub.y Ga.sub.1-y).sub.0.5 In.sub.0.5 P cladding layer, and a p-type Ga.sub.0.5 In.sub.0.5 P layer are sequentially crystal-grown on a semiconductor substrate by metal organic-vapor phase epitaxy at a crystal growth rate of not less than 2.5 .mu.m/h to form a multi-layered structure. A stripe structure is formed on the multi-layered structure, and the stripe structure is sandwiched by an n-type GaAs current blocking layer on both sides. A p-type GaAs contact layer is flatly grown on the stripe structure and the n-type GaAs current blocking layer.

Abstract: A high quality dielectric layer, typically silicon dioxide, is formed on a multi-layer deposited semiconductor structure, typically polysilicon or amorphous silicon. The multi-layer structure is formed by varying the silicon deposition rate so as to obtain a low stress deposited silicon structure. The low stress allows for a higher quality dielectric to be formed on the exposed top surface. One application is for thin film transistor gate oxides. Other applications included capacitor dielectrics and the tunnel oxide on the floating gate of EEPROMs.

Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming a germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.

Abstract: Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.

Abstract: A compound semiconductor crystal growing method includes the steps of (a) setting a substrate having a substrate surface in a reaction chamber, and (b) supplying a material gas of a compound semiconductor which is to be grown in the form of a crystal on the substrate surface within the reaction chamber and a control gas to the reaction chamber under a predetermined condition, and controlling the supply of the control gas to control an adsorption rate of the material gas on the substrate surface. The control gas makes competitive adsorption with the material gas on the substrate surface but makes no chemical reaction such that no continual accumulation on the substrate surface occurs under the predetermined condition. The competitive adsorption is defined as a phenomenon in which the material gas and the control gas compete and become adsorped on the substrate surface.

Abstract: A method of forming a semiconductor-on-insulator device comprises the steps of forming a first alignment mark on a semiconductor substrate at a first reference position, forming a diffusion region in the semiconductor substrate at a position defined with respect to the first alignment mark according to a predetermined relationship, providing an insulator layer on the semiconductor substrate to expose a part of an upper major surface of the semiconductor substrate, providing a semiconductor layer on the insulator layer in contact with the exposed upper major surface of the semiconductor substrate, recrystallizing the semiconductor layer by heating up to a temperature above a melting point of the semiconductor layer and cooling down subsequently below the melting point, starting from a part of the semiconductor layer in contact with the exposed upper major surface of the semiconductor substrate and moving laterally along the semiconductor layer, to form a single crystal semiconductor layer having an upper major

Abstract: An epitaxial growth method of a single crystal of III-V compound semiconductor on the surface of a semiconductor substrate by supplying a molecular beam of a group III source material and a molecular beam of a group V source material onto the surface of the substrate in a chamber held in vacuum. With this method, the molecular beams comprises a molecular beam of a first group III source material composed of an organic metal compound of a group III element not having a halogen, a molecular beam of a second group III source material having a halogen chemically bonded to atoms of the group III element, and a molecular beam of a group V source material making a compound semiconductor with the group III element of the first group III material. By setting a substrate temperature at, for example, about 500.degree. C. a single crystal of III-V compound semiconductor can be satisfactorily selectively grown.