Patents Examined by Robert Beausoleil
  • Patent number: 6470462
    Abstract: A redundant system (20) comprises a first unit (21), a second unit (22), and a synchronization server (24). The first unit (21) and a second unit (22) each include plural state machines (SMs) for performing tasks. At least some of the state machines provided at the first unit simultaneously perform same tasks as at least corresponding ones of some of the state machines provided at the second unit. When a state machine of the second unit needs to be resynchronized, the synchronization server (24) receives a resynchronization request (2-1) from the resync requesting state machine of the second unit and thereupon provides an out-of-synchronization indication (2-2) to a corresponding state machine of the first unit. In response to the out-of-synchronization indication (2-2) from the synchronization server, the corresponding state machine of the first unit generates a resynchronization request (2-3) at an time deemed appropriate by the corresponding state machine.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: October 22, 2002
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Marcus Karlsson, Patrik Rynbäck
  • Patent number: 6470464
    Abstract: A system and method of monitoring and analyzing the performance of a computer system and its components in a data processing network and for proposing changes to the network to improve the performance. The system involves identifying undesirable conditions (sometimes called bottlenecks) in the system, determining which bottlenecks are the most severe in affecting the performance of the system and in proposing changes to the components of the system to improve performance of the network. The present invention uses historical data and forecasting techniques to predict bottlenecks which have not occurred yet but which can be expected, so that further bottlenecks can be projected, along with a prediction interval to indicate the confidence of the prediction. The further projections and the prediction interval are provided in a graph which is available to the user over the Internet, if desired, using HTML and hot links.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Randal Lee Bertram, Frederick Scott Hunter Krauss, Gregory J. McKnight
  • Patent number: 6467054
    Abstract: A storage device capable of performing diagnostics tests on itself to render an opinion of its health to a host computer is disclosed. Test commands are received over an industry-standard interface. The tests may be run in off-line or captive modes. Off-line tests are subject to interruption from the host computer whereas captive tests are not. Unless a command is received that instructs the storage device to stop testing or power-down, the storage device suspends the test, executes the host command and resumes testing. Power management is disabled while the tests are run to prevent the storage device from inadvertently powering down. A number of specific tests may be performed, including a general quick test and a comprehensive test. Failures detected during the tests are logged in a non-volatile memory of the storage device and include an indication of which component failed and at which point in the test that component failed.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: October 15, 2002
    Assignee: Compaq Computer Corporation
    Inventor: Thomas R. Lenny
  • Patent number: 6467049
    Abstract: A high reliability computer system includes a first and a second processing engine (PE), circuitry for switching control of the system from the first PE operating as a primary PE to the second PE upon detection of a failure of the first PE, at least one shared resource associated with both the first and second PEs, at least one dedicated resource associated with the first PE and at least one dedicated resource associated with the second PE, a database associated with and accessible by one of the first and second PEs and a configuration engine. The database contains initialization information for the one PE, including a first class of instructions affecting the shared resource and a second class of instructions affecting the dedicated resource of the one PE. The second class of instructions includes setting an enable password or a surrogate therefor for the one PE. The configuration engine is associated with the one PE and is operable in one of a first mode and a second mode.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: October 15, 2002
    Assignee: Cisco Technology, Inc.
    Inventors: Kristen Marie Robins, Ronnie B. Kon
  • Patent number: 6463553
    Abstract: A method of filtering debugging data in a computer system including at least one central processing unit and a memory unit coupled to the at least one central processing unit.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: October 8, 2002
    Assignee: STMicroelectronics, Ltd.
    Inventor: David Alan Edwards
  • Patent number: 6463551
    Abstract: A debug circuit (2) and a microcomputer incorporating the debug circuit (2). The debug circuit (2) is capable of receiving a trace event from a functional block A as long as a CPU (5) does not generate any trace event, and capable of receiving the trace event from the functional block A in synchronization with a standard clock signal CLK used in the CPU (5) when the reception of the trace event from the functional block A is permitted.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: October 8, 2002
    Assignees: International Business Machines Corporation, Mitsubishi Electric System LSI Design Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Teruaki Kanzaki, Sakae Itoh, Tatsuya Sakai, Hiroshi Uchiike
  • Patent number: 6463573
    Abstract: There is provided a system for dynamically resynchronizing a storage system made up of a plurality of mirrored logical volumes respectively divided into a plurality of mirrored logical data partitions in the event of a system failure. Immediately after the correction of the problem causing the failure, meals start to resynchronize the plurality of logical volumes but without waiting for the resynchronization to be completed; means access data from a data partition in one of said logical volumes. Then there are means for determining whether the portion of the logical volume containing the accessed partition has already been resynchronized, together with means responsive to these determining means for replacing the corresponding data in the other mirrored partitions in the logical volume with the accessed data, in the event that the portion of the logical volume has not been resynchronized.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: October 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: John Maddalozzo, Jr., Gerald Francis McBrearty, Johnny Meng-Han Shieh
  • Patent number: 6460145
    Abstract: There are provided a storage device for outputting-data in such a manner that whether or not error correction has been made can be discriminated, and a data processing system in which a storage device furnishes data to a data processing device in such a manner that whether or not the area management information has been corrected for errors can be discriminated and in which the data processing device discriminates whether or not the area management information has been corrected for errors in order to perform predetermined data processing. There is also provided a data processing method for the storage device and for the data processing system.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: October 1, 2002
    Assignee: Sony Corporation
    Inventors: Akira Sassa, Takumi Okaue, Mitsuhiro Hirabayashi
  • Patent number: 6457142
    Abstract: A fault monitoring, performance monitoring and fault tolerance apparatus and method for target target application programs is realized in an application supervisor by employing a supervisor agent, modified application programming interfaces (APIs), a generic application wrapper and a shell script that operate interactively to detect and automatically resolve reliability and performance problems occurring in executing the target application program. This is realized, in accordance with the invention, without the need to access, modify or have knowledge of the source code of the target application program to be supervised. In a specific embodiment of the invention, Java™ programming language target application programs are supervised. This is realized by employing the supervisor agent that attaches to a Java virtual machine through two virtual machine native interfaces. One interface is the Java Virtual Machine Profiler Interface (JVMPI) and the other is the Java Native Interface (JNI).
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: September 24, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Reinhard P. Klemm, Navjot Singh
  • Patent number: 6453428
    Abstract: The present invention provides a method and system for assigning data chunks to column parity sets in a dual-drive fault tolerant storage disk drive system having N disk drives, where N is a prime number. Each of the N disk drives are organized into N chunks such that the N disk drives are configured as one or more N×N array of chunks. The array has chunks arranged in N rows from row 1 to row N and in N columns from column 1 to column N. Each row includes a plurality of data chunks for storing data, a column parity chunk for storing a column parity set, and a row parity chunk for storing a row parity set. These data chunks are assigned in a predetermined order. The data chunks in each row are assigned to the row parity set. Each column parity set is associated with a set of data chunks in the array, wherein row m is associated with column parity set Qm where m is an integer that ranges from 1 to N.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: September 17, 2002
    Assignee: Adaptec, Inc.
    Inventor: Dale J. Stephenson
  • Patent number: 6449731
    Abstract: A method to manage storage of an object in a computer system having a first and a second storage management process (wherein the stored object has a data portion, a metadata portion and a fault tolerance data portion) includes receiving a memory access request from a client process, routing the memory access request to the first storage management process, determining the first storage management process has failed, routing the memory access request to the second storage management process (having access to the fault tolerance data portion), receiving a result from the second storage management process, and returning at least a portion of the result to the client process. The second storage management process may reconstruct at least a portion of the metadata portion, modify the fault tolerance data portion in accordance with the memory access request, and store the modified fault tolerance information.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: September 10, 2002
    Assignee: Tricord Systems, Inc.
    Inventor: Alexander H. Frey, Jr.
  • Patent number: 6449737
    Abstract: A disc reproducing apparatus reproduces information as a digital signal from a disc, having an interface for sending and receiving a reproduction signal and a command to/from a host computer, comprising a processor unit for controlling the operation of the disc reproducing apparatus, a first signal transfer path, connected to the inter-face, for transferring a command signal corresponding to a command received from the host computer to the processor unit, an operating unit, disposed in the disc reproducing apparatus, for generating an operation signal corresponding to a user's operation, and a second signal transfer path, connected to the operating unit, for transferring an operation signal corresponding to the user's operation of the operating unit to the processor unit, wherein the processor unit determines whether or not to validate the execution of the command of the command signal transferred from the host computer through the first signal transfer path corresponding to the operation signal tra
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: September 10, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroaki Tanaka, Takuji Yoshida
  • Patent number: 6446220
    Abstract: Disclosed is a system for updating data. A first processing unit, such as an adaptor, receives a data update to a data block in a first storage device, such as a hard disk drive. Parity data for the data block is maintained in a second storage device. A parity group is comprised of the data block and the parity data. After determining that the first processing unit does not control access to the parity group including the data block to update, the first processing unit sends a message to a second processing unit, such as another adaptor, controlling access to the parity group requesting control of access to the parity group. The first processing unit determines new parity data from the data update, the data at the data block in the first storage device, and the parity data in the second storage device. The first processing unit then writes the data update to the data block in the first storage device and the new parity data to the second storage device.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar Moothedath Menon
  • Patent number: 6446223
    Abstract: A storage system having a plurality of rewritable removable media and a method for controlling that system are disclosed. The storage system has a controller that updates medium update count management information every time contents of any medium are updated. When the update count for a medium is judged to have exceeded a predetermined threshold value, the controller starts a spare medium copy process whereby the contents of the medium with its update count found higher than was predetermined are copied to a spare medium. After the copying, the spare medium is transported to a cabinet for storage therein in place of the original medium whose contents have been copied, and the original medium is ejected from an outlet port. When a spare medium loading process is started from a service terminal, a spare medium put through an inlet port is loaded into the cabinet to replenish the spare medium inventory.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: September 3, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Morishita, Akira Yamamoto
  • Patent number: 6446221
    Abstract: Apparatus for processing data is provided, said apparatus comprising: a main processor 4 responsive to main processor instructions within a stream of instructions input to said main processor 4 to perform main processor operations; a coprocessor 6 coupled to said main processor 4 via a coprocessor interface CP and responsive to coprocessor instructions MCR, MRC within said stream of instructions to perform coprocessor operations; wherein said coprocessor 6 is a debug coprocessor operable to at least partially control generation of diagnostic data for debugging said apparatus for processing data and said coprocessor instructions are debug coprocessor instructions that control operation of said debug coprocessor. Using a debug mechanism in the form of a debug coprocessor reduces the impact of the debug mechanism upon normal operation.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: September 3, 2002
    Assignee: ARM Limited
    Inventors: David Vivian Jaggar, William Adam Hohl
  • Patent number: 6442710
    Abstract: A PC interval timer test method used in a personal computer to test the abnormality of the interval timer of a PC (personal computer) by: calculating the difference between the periodic interrupt frequency of the PC's CMOS Real Time Clock (R.T.C.) and the interval timer interrupt frequency within the same time period, and then judging the result by comparing the value of the difference thus obtained with the set maximum allowable value of error of the CMOS R.T.C.'s periodic interrupt frequency. The maximum frequency of the CMOS R.T.C. can be as high as 8192 Hz, so that the test error can be as minor as below 1/8192.
    Type: Grant
    Filed: August 10, 1999
    Date of Patent: August 27, 2002
    Assignee: Inventec Corporation
    Inventors: Vam Chang, Kuang-Shin Lin, Kingboard Ma, Xian-Hong Shen
  • Patent number: 6442709
    Abstract: The present invention relates to a method for testing the operability of a Peer to Peer Remote Copy (PPRC) data storage system in disaster situations. A PPRC data storage system includes a host processor, a primary storage subsystem and a secondary storage subsystem where the secondary storage subsystem is coupled to the primary storage subsystem for mirroring of data therebetween. A command is sent from the host processor directing the primary storage subsystem to simulate a disaster. Upon detection of the disaster, the host establishes direct communication with the secondary storage subsystem, and validates the integrity of the system by comparing data from the secondary storage subsystem to data from the primary storage subsystem.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: August 27, 2002
    Assignee: International Business Machines Corporation
    Inventors: David Grant Beal, Scott Adam States, Christopher James West
  • Patent number: 6442711
    Abstract: A higher reliable storage array system. A plurality of data storage devices store data; a spare storage device replaces one of the plurality of data storage devices; and a control unit controls an I/O operation of the plurality of data storage devices and the spare storage device. The control unit includes means for storing a history of self recovered errors of each one of the plurality of data storage devices, means for calculating an error rate of each of the plurality of data storage devices on the basis of the history of errors, means for judging a necessity to execute a preventive maintenance of each one of the plurality of data storage devices from the error rate, and means for executing the preventive maintenance.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: August 27, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kyouichi Sasamoto, Morishige Kinjo
  • Patent number: 6442707
    Abstract: In a processor a reorder buffer maintains a load/store (LS) fault address register (LSFAR). When the processor's load/store unit reports most LS exceptions, the reorder buffer redirects the microcode unit of the processor to execute a fault handler indicated by an address stored in the LSFAR. The LSFAR may be mapped into the register space of the processor. It may be written by a microcode routine with the address of a specific fault handler at the beginning of a microcode routine or at any time during a microcode routine. As the reorder buffer retires instructions it checks for writes to the LSFAR. If one exists, the reorder buffer loads the result data of that write into the LSFAR. In a preferred embodiment the reorder buffer retires instructions in program order and the LSFAR is not updated speculatively. Also, in a preferred embodiment, when a microcode routine exits, the LSFAR is automatically returned to a default value which indicates a generic fault handling routine.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: August 27, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin J. McGrath, Michael T. Clark, Scott A. White
  • Patent number: 6442706
    Abstract: A computer network remote data mirroring system writes update data both to a local data device and to a local, chronologically sequenced journal storage area, or writelog device. A primary mirror daemon on a local computer system monitors the writelog device for data updates and feeds the data over a network in the same order in which it is stored to a receiving remote mirror daemon on a remote computer system, which in turn commits the data updates to a mirror device. A graphical user interface enables a user to create and configure throttles. Throttles are user-defined tests and actions evaluated by the primary mirror daemon to regulate network bandwidth, CPU, and writelog device utilization during data update mirroring. Network bandwidth throttling enables a predetermined portion of the network bandwidth to be assigned to remote data mirroring based on user-selected criteria.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: August 27, 2002
    Assignee: Legato Systems, Inc.
    Inventors: Steven B. Wahl, Michael W. Losh