Patents Examined by Robert G Bachner
  • Patent number: 11552105
    Abstract: The invention provides a pixel structure, an array substrate, and a display device. The pixel structure includes: scanning lines and data lines; at least one pixel electrode configured in each of pixel areas; at least one shading electrode line connecting to a common voltage, the shading electrode line being configured to be above the data line to shade the data line; a first TFT being configured between the scanning line and the pixel electrode, and the first TFT connecting to the pixel electrode; at least one shading electrode connection line extending along a direction of the scanning line, and the shading electrode connection line electrically connecting to two adjacent shading electrode lines; and the shading electrode connection line being wound to form a mesh pattern, and a semiconductor layer of the first TFT is configured to be opposite to a hollow area of the mesh pattern.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: January 10, 2023
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Chengliang Ye
  • Patent number: 11545420
    Abstract: In some examples, a direct current (DC)-DC power converter package comprises a controller, a conductive member, and a first field effect transistor (FET) coupled to the controller and having a first source and a first drain, the first FET coupled to a first portion of the conductive member. The package also comprises a second FET coupled to the controller and having a second source and a second drain, the second FET coupled to a second portion of the conductive member, the first and second portions of the conductive member being non-overlapping in a horizontal plane. The first and second FETs are non-overlapping.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: January 3, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Yiqi Tang, Liang Wan, William Todd Harrison, Manu Joseph Prakuzhy, Rajen Manicon Murugan
  • Patent number: 11544641
    Abstract: The invention provides a graphical user interface implemented on a computer including an information area for displaying to a user at the computer inspection status information in connection with one or more components of a linear asset infrastructure. The graphical user interface also includes a control component operable by the user at the computer to cause the graphical user interface to display additional information on the one or more components of the linear asset infrastructure.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: January 3, 2023
    Assignee: Canadian National Railway Company
    Inventors: Dwight Tays, David Lilley, Brian Abbott
  • Patent number: 11538920
    Abstract: A method for increasing an oxide thickness at trench corner of an UMOSFET is provided, comprising providing an N-type substrate, and forming an N-type drift region, N-type and P-type heavily doped regions and P-type body therein. A trench is defined through lithography, and a pad oxide is formed along the trench through oxidation or deposition process. An oxidation barrier is formed upon the pad oxide. A thermal oxidation process is employed, so a corner oxide is effectively formed at the trench corner. After removing the pad oxide and oxidation barrier, various back-end processes are carried out to complete the transistor structure. The invention is aimed to increase oxide thickness near the trench bottom, and can be applied to high voltage devices, such as SiC. The conventional electric field crowding effect occurring at the trench corner is greatly solved, thus increasing breakdown voltages thereof.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 27, 2022
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Bing-Yue Tsui, Fang-Hsin Lu, Yi-Ting Shih
  • Patent number: 11532773
    Abstract: Semiconductor light emitting device includes: substrate including main and back surfaces, first and second side surfaces, and bottom and top surfaces, wherein main surface includes first to fourth sides; first main surface electrode on main surface and including first base portion contacting the sides of the main surface, and die pad connected to first base portion; second main surface electrode disposed on the main surface and including second base portion contacting first and third sides of the main surface, and wire pad connected to second base portion; semiconductor light emitting element including first electrode pad and mounted on die pad; wire connecting first electrode pad and wire pad; first insulating film covering portion between first base portion and die pad; second insulating film covering portion between second base portion and wire pad and having end portions contacting main surface; and light-transmitting sealing resin.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: December 20, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Tomoichiro Toyama
  • Patent number: 11532514
    Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a conductive feature over a semiconductor substrate and forming a dielectric layer over the conductive feature. The method also includes forming an opening in the dielectric layer to expose the conductive feature. The method further includes forming a conductive material to overfill the opening. In addition, the method includes thinning the conductive material using a chemical mechanical polishing process. A slurry used in the chemical mechanical polishing process includes an iron-containing oxidizer that oxidizes a portion of the conductive material.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Chieh Wu, Kuo-Hsiu Wei, Kei-Wei Chen, Tang-Kuei Chang, Chia Hsuan Lee, Jian-Ci Lin
  • Patent number: 11527438
    Abstract: A manufacturing method of a contact structure includes the following steps. A substrate is provided, and the substrate includes a first region and a second region. A dielectric layer is formed on the substrate. A photoresist layer is formed on the dielectric layer. An exposure process is performed. The exposure process includes first exposure steps and second exposure steps. Each of the first exposure steps is performed to a part of the first region of the substrate. Each of the second exposure steps is performed to a part of the second region of the substrate. Each of the second exposure steps is performed with a first overlay shift by a first predetermined distance. A develop process is performed for forming openings in the photoresist layer.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: December 13, 2022
    Assignee: United Semiconductor (Xiamen) Co., Ltd.
    Inventors: Xiongwu He, Weiguo Xu, Yuan-Chi Pai, Wen Yi Tan
  • Patent number: 11527421
    Abstract: A high-pressure processing system for processing a layer on a substrate includes a first chamber, a support to hold the substrate in the first chamber, a second chamber adjacent the first chamber, a foreline to remove gas from the second chamber, a vacuum processing system configured to lower a pressure within the second chamber to near vacuum, a valve assembly between the first chamber and the second chamber to isolate the pressure within the first chamber from the pressure within the second chamber, a gas delivery system configured to increase the pressure within the first chamber to at least 10 atmospheres while the first chamber is isolated from the second chamber, an exhaust system comprising an exhaust line to remove gas from the first chamber, and a common housing surrounding both the first gas delivery module and the second gas delivery module.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: December 13, 2022
    Assignee: Micromaterials, LLC
    Inventors: Qiwei Liang, Srinivas D. Nemani, Sean S. Kang, Adib Khan, Ellie Y. Yieh
  • Patent number: 11527418
    Abstract: An integrated circuit package and a method of forming the same are provided. A method includes forming a conductive column over a carrier. An integrated circuit die is attached to the carrier, the integrated circuit die being disposed adjacent the conductive column. An encapsulant is formed around the conductive column and the integrated circuit die. The carrier is removed to expose a first surface of the conductive column and a second surface of the encapsulant. A polymer material is formed over the first surface and the second surface. The polymer material is cured to form an annular-shaped structure. An inner edge of the annular-shaped structure overlaps the first surface in a plan view. An outer edge of the annular-shaped structure overlaps the second surface in the plan view.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: December 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jing-Cheng Lin, Li-Hui Cheng, Po-Hao Tsai
  • Patent number: 11520953
    Abstract: Etch in a thermal etch reaction is predicted using a machine learning model. Chemical characteristics of an etch process and associated energies in one or more reaction pathways of a given thermal etch reaction are identified using a quantum mechanical simulation. Labels indicative of etch characteristics may be associated with the chemical characteristics and associated energies of the given thermal etch reaction. The machine learning model can be trained using chemical characteristics and associated energies as independent variables and labels as dependent variables across many different etch reactions of different types. When chemical characteristics and associated energies for a new thermal etch reaction are provided as inputs in the machine learning model, the machine learning model can accurately predict etch characteristics of the new thermal etch reaction as outputs.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: December 6, 2022
    Assignee: Lam Research Corporation
    Inventors: Thorsten Lill, Andreas Fischer, Ivan L. Berry, III, Nerissa Sue Draeger, Richard A. Gottscho
  • Patent number: 11521221
    Abstract: This disclosure involves predictive modeling with entity representations computed from neural network models simultaneously trained on multiple tasks. For example, a method includes a processing device performing operations including accessing input data for an entity and transforming the input data into a dense vector entity representation representing the entity. Transforming the input data includes applying, to the input data, a neural network including simultaneously trained propensity models. Each propensity model predicts a different task based on the input data. Transforming the input data also includes extracting the dense vector entity representation from a common layer of the neural network to which the propensity models are connected.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 6, 2022
    Assignee: ADOBE INC.
    Inventors: Shiv Kumar Saini, Vishwa Vinay, Vaibhav Nagar, Aishwarya Mittal
  • Patent number: 11508690
    Abstract: A laser compression bonding device and method for a semiconductor chip are proposed. The device includes a conveyor unit that transports a semiconductor chip and a substrate, and a bonding head that includes a bonding tool for applying a pressure to the chip and substrate, a laser beam generator for emitting a laser beam, a thermal imaging camera for measuring temperatures of the surfaces of semiconductor chip and substrate, and a compression unit for controlling a pressure applied by the bonding tool and a position thereof, wherein the compression unit includes a mount on which the bonding tool is detachably mounted, and a servo motor and a load cell that apply a pressure to the mount or control a position thereof. The servo motor is controlled with two values for pressure application and positioning.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: November 22, 2022
    Assignee: ML EQUIPMENT KOREA CO., LTD
    Inventors: Jae Shin Park, Kuang Eng Oh
  • Patent number: 11508626
    Abstract: Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a P-type semiconductor device above a substrate and including first and second semiconductor source or drain regions adjacent first and second sides of a first gate electrode. A first metal silicide layer is directly on the first and second semiconductor source or drain regions. An N-type semiconductor device includes third and fourth semiconductor source or drain regions adjacent first and second sides of a second gate electrode. A second metal silicide layer is directly on the third and fourth semiconductor source or drain regions, respectively. The first metal silicide layer comprises at least one metal species not included in the second metal silicide layer.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Jeffrey S. Leib, Srijit Mukherjee, Vinay Bhagwat, Michael L. Hattendorf, Christopher P. Auth
  • Patent number: 11504069
    Abstract: An apparatus for determining a non-apparent attribute of an object having a sensor portion with which the object makes contact and to which the object applies pressure. The apparatus has a computer in communication with the sensor portion that receives signals from the sensor portion corresponding to the contact and pressure applied to the sensor portion, and determines from the signals the non-apparent attribute. The apparatus has an output in communication with the computer that identifies the non-apparent attribute determined by the computer. A method for determining a non-apparent attribute of an object.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: November 22, 2022
    Assignee: Tactonic Technologies, LLC
    Inventors: Michael John Cole, Gerald Seidman
  • Patent number: 11501203
    Abstract: A non-transitory computer-readable recording medium stores therein a learning data selection program that causes a computer to execute a process including: extracting a first input data group relating to first input data in correspondence with designation of the first input data included in an input data group input to a machine learning model, the machine learning model classifying or determining transformed data that is transformed from input data; acquiring a first transformed data group of the machine learning model and a first output data group of the machine learning model, respectively, the first transformed data group being input to the machine learning model and corresponding to the first input data group, the first output data group corresponding to the first transformed data group; and selecting learning target data of an estimation model from the first input data group.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: November 15, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Keisuke Goto, Koji Maruhashi, Hiroya Inakoshi
  • Patent number: 11492764
    Abstract: The invention relates to a method of controlling a track maintenance machine, particularly a switch tamping- or universal tamping machine, which moves along a track and has working units, particularly a tamping unit and a lifting unit, which are adjustable relative to a machine frame, wherein position data of track objects, particularly sleepers, rails and optionally obstacles, are recorded by means of a sensor device in front of the working units in a working direction, and wherein operating positions of the working units are determined for a working operation at a track location. In this, prior to actuation of the working units, the determined operating positions of the working units are displayed by means of a display device, wherein, prior to carrying out the working operation, the operating positions of the working units can be changed by means of control elements.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: November 8, 2022
    Assignee: TRACK MACHINES CONNECTED GESELLSCHAFT M.B.H.
    Inventor: Martin Buerger
  • Patent number: 11476224
    Abstract: In a wiring member, an element connection portion, a plate connection portion, and an upper surface portion are at height positions different from one another. The element connection portion has a through hole, and the plate connection portion has a through hole and a chamfer. The upper surface portion which is not connected to another portion, has projections asymmetrically disposed on both side surfaces thereof. Owing to these features, the type, the orientation, and the front and the back of the wiring member can be easily distinguished. Accordingly, it is possible to prevent incorrect assembling of the wiring member in a semiconductor module.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: October 18, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kensuke Takeuchi, Takashi Nagao
  • Patent number: 11468341
    Abstract: Systems, methods, and non-transitory computer readable media are configured to determine an interaction between a first entity and a first item. A second entity can be determined. The first entity can have formed a connection with the second entity on a social networking system. A belief that the second entity will interact with the first item can then be generated.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: October 11, 2022
    Assignee: Meta Platforms, Inc.
    Inventors: Bradley Ray Green, Deepak Chinavle
  • Patent number: 11469131
    Abstract: A method for assembling heterogeneous components. The assembly process includes using a vacuum based pickup mechanism in conjunction with sub-nm precise more alignment techniques resulting in highly accurate, parallel assembly of feedstocks.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: October 11, 2022
    Assignee: Board of Regents, The University of Texas System
    Inventors: Sidlgata V. Sreenivasan, Paras Ajay, Aseem Sayal, Mark McDermott, Shrawan Singhal, Ovadia Abed, Lawrence Dunn, Vipul Goyal, Michael Cullinan
  • Patent number: 11452403
    Abstract: A grill device includes a support rack and a grill module. The grill module is formed with a feed inlet, includes upper and lower grill plates, is rotatably mounted on the support rack about an axis, and is rotatable between an inclined position, where the feed inlet and a gravity center of the grill module are respectively located at two sides of the axis, where the gravity center is lower than the axis, and where the upper grill plate covers and is locked on the lower grill plate by the support rack, and a hand-held position, where the upper grill plate is unlocked from the support rack and is rotatable relative to the lower grill plate so as to uncover the lower grill plate.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: September 27, 2022
    Assignee: TSANN KUEN (ZHANGZHOU) ENTERPRISE CO., LTD.
    Inventors: Yixin Zhan, Wenyu Chang, Chunyu Wu