Patents Examined by Roberts Culbert
  • Patent number: 10428271
    Abstract: Compositions useful for the selective removal of titanium nitride and/or photoresist etch residue materials relative to insulating materials from a microelectronic device having same thereon. The removal compositions contain at least one oxidant, one etchant, and one activator to enhance the etch rate of titanium nitride.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: October 1, 2019
    Assignee: Entegris, Inc.
    Inventors: Emanuel I. Cooper, Li-Min Chen, Steven Lippy, Chia-Jung Hsu, Sheng-hung Tu, Chieh Ju Wang
  • Patent number: 10128133
    Abstract: An etching tool that includes an interior chamber is provided. A plurality of type III-V semiconductor wafers is provided. A process cycle is performed for each one of the type III-V semiconductor wafers in the plurality. The process cycle includes performing a preliminary contamination control process. The process cycle further includes inserting one of the type III-V semiconductor wafers into the interior chamber. The process cycle further includes etching type III-V semiconductor material away from the type III-V semiconductor wafer that is present in the interior chamber. The process cycle further includes removing the type III-V semiconductor wafer that is present in the interior chamber. The preliminary contamination control process includes forming a carbon containing protective material that completely covers exposed surfaces of the interior chamber.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: November 13, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Haghofer, Clemens Ostermaier
  • Patent number: 10115572
    Abstract: Embodiments of the disclosure include methods for in-situ chamber cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber cleaning after a plasma process includes supplying a cleaning gas mixture including at least an oxygen containing gas and a hydrogen containing gas into the plasma processing chamber, controlling the processing pressure at less than 2 millitorr, applying a RF source power to the processing chamber to form a plasma from the cleaning gas mixture, and cleaning the processing chamber in the presence of the plasma.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: October 30, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Banqiu Wu, Xiaoyi Chen, David Knick
  • Patent number: 10083816
    Abstract: A shielded lid heater lid heater suitable for use with a plasma processing chamber, a plasma processing chamber having a shielded lid heater and a method for plasma processing are provided. The method and apparatus enhances positional control of plasma location within a plasma processing chamber, and may be utilized in etch, deposition, implant, and thermal processing systems, among other applications where the control of plasma location is desirable. In one embodiment, a process for tuning a plasma processing chamber is provided that include determining a position of a plasma within the processing chamber, selecting an inductance and/or position of an inductor coil coupled to a lid heater that shifts the plasma location from the determined position to a target position, and plasma processing a substrate with the inductor coil having the selected inductance and/or position.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: September 25, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Michael D. Willwerth, David Palagashvili, Valentin N. Todorow, Stephen Yuen
  • Patent number: 10077381
    Abstract: A polishing slurry composition is provided. The polishing slurry composition includes at least two types of abrasive particles among first abrasive particles, second abrasive particles, and third abrasive particles, and an oxidizer. A peak-to-valley roughness Rpv decreases when a contact area between the abrasive particles and a tungsten-containing film increases.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: September 18, 2018
    Assignee: KCTech Co., Ltd.
    Inventors: Dong Kyu Choi, Young Ho Yoon, Hyun Goo Kong, Jin Sook Hwang, Han Teo Park
  • Patent number: 10068764
    Abstract: Embodiments of the invention provide methods for selective film deposition using a surface pretreatment. According to one embodiment, the method includes providing a substrate containing a dielectric layer and a metal layer, exposing the substrate to a reactant gas containing a molecule that forms self-assembled monolayers (SAMs) on the substrate, and thereafter, selectively depositing a metal oxide film on a surface of the dielectric layer relative to a surface of the metal layer by exposing the substrate to a deposition gas.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: September 4, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Kandabara N. Tapily, Gerrit J. Leusink, Cory Wajda, Hoyoung Kang
  • Patent number: 10062839
    Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask, after patterning the mask, etching (a) through a first layer of electrically conductive material to form an electrically conductive electrode and (b) through a third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure. The process further includes providing insulating material on or over the sidewalls of the second synthetic antiferromagnetic structure and, thereafter, etching through (a) a second tunnel barrier layer to provide sidewalls thereof, (b) a second layer of ferromagnetic material to provide sidewalls thereof, (c) a first tunnel barrier layer to provide sidewalls thereof, and (d) a first layer of ferromagnetic material to provide sidewalls of the first synthetic antiferromagnetic structure.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: August 28, 2018
    Assignee: Everspin Technologies, Inc.
    Inventors: Sarin A. Deshpande, Sanjeev Aggarwal, Kerry Joseph Nagel
  • Patent number: 10056230
    Abstract: A power supply system includes a high frequency power supply which supplies a high frequency power; a DC power supply which supplies a first negative DC voltage or a second negative DC voltage having an absolute value larger than that of the first DC voltage; and a control unit which performs a power supply control process of repeating a supply and a stop of the supply of the high frequency power alternately; stopping supplies of the first and second DC voltages for a first period, which is a time period from a beginning of the supply of the high frequency power within a period during which the high frequency power is being supplied; supplying the first DC voltage for a second period except the first period within the period; and supplying the second DC voltage for a period during which the supply of the high frequency power is stopped.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: August 21, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Taichi Hirano, Junji Ishibashi, Keiki Ito, Kunihiro Sato
  • Patent number: 10053367
    Abstract: There is provided a method for preparing a graphene film for pellicle, and also a method for making a pellicle using such graphene film: wherein a film-like graphene deposited on a base material is coated with a protective film, from which the base material is chemically removed by an etching liquid and then the protective film is chemically removed by a solvent whose surFace tension is lower than that of the etching liquid; the pellicle frame may be attached to the film-like graphene before the protective film is completely removed or thereafter.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: August 21, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Yu Yanase
  • Patent number: 10041163
    Abstract: A method for applying a coating to a defect area of a reactor component includes forming a patch on the reactor component at the defect area using a plasma-spray coating process. The plasma-spray coating process includes grounding the reactor component and a power supply of a plasma gun to a common ground such that a potential difference exists between the reactor component and a cathode of the plasma gun, and concurrently directing an ion-etching stream and a coating stream towards the region of the reactor component using the plasma gun while maintaining a desired distance between the plasma gun and the region of the reactor component. The directing the ion-etching stream includes heating the region of the reactor component using a plasma stream exiting a spray nozzle of the plasma gun. The coating stream includes droplets of a coating material.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: August 7, 2018
    Assignee: GE-HITACHI NUCLEAR ENERGY AMERICAS LLC
    Inventors: Henry Peter Offer, David Jonathan Keck, Ronald Martin Horn
  • Patent number: 10043668
    Abstract: Methods for preparing a patterned directed self-assembly layer generally include providing a substrate having a block copolymer layer including a first phase-separated polymer defining a first pattern in the block copolymer layer and a second phase-separated polymer defining a second pattern in the block copolymer layer. The block polymer layer is exposed to a gas pulsing carbon monoxide polymer. The gas pulsing is configured to provide multiple cycles of an etching plasma and a deposition plasma to selectively remove the second pattern of the second phase-separated polymer while leaving behind the first pattern of the first phase-separated polymer on the substrate.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: August 7, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sebastian U. Engelmann, Ashish V. Jagtiani, Hiroyuki Miyazoe, Hsinyu Tsai
  • Patent number: 10043684
    Abstract: Systems and methods of etching a semiconductor substrate may include flowing an oxygen-containing precursor into a substrate processing region of a semiconductor processing chamber. The substrate processing region may house the semiconductor substrate, and the semiconductor substrate may include an exposed metal-containing material. The methods may include flowing a nitrogen-containing precursor into the substrate processing region. The methods may further include removing an amount of the metal-containing material.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: August 7, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Ranga Rao Arnepalli, Prerna Sonthalia Goradia, Robert Jan Visser, Nitin Ingle, Mikhail Korolik, Jayeeta Biswas, Saurabh Lodha
  • Patent number: 10029345
    Abstract: Described are materials and methods for processing (polishing or planarizing) a substrate that contains pattern dielectric material using a polishing composition (aka “slurry”) and an abrasive pad, e.g., CMP processing.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: July 24, 2018
    Assignee: Cabot Microelectronics Corporation
    Inventors: Viet Lam, Ji Cui
  • Patent number: 10032644
    Abstract: Chemical Mechanical Planarization (CMP) polishing compositions comprising composite particles, such as ceria coated silica particles, offer tunable polishing removal selectivity values between different films. Compositions enable high removal rates on interconnect metal and the silicon oxide dielectric while providing a polish stop on low-K dielectrics, a-Si and tungsten films. Chemical Mechanical Planarization (CMP) polishing compositions have shown excellent performance using soft polishing pad.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: July 24, 2018
    Assignee: VERSUM MATERIALS US, LLC
    Inventors: Xiaobo Shi, James Allen Schlueter, Mark Leonard O'Neill, Dnyanesh Chandrakant Tamboli
  • Patent number: 10030305
    Abstract: A method can include applying a mask to a CMC structure, and subjecting the structure having an applied mask to a process for repair. In one embodiment, the applying a mask to a CMC structure can include applying a mask to a feature of a CMC structure.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 24, 2018
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Jared Hogg Weaver, Gregory Scot Corman, Anteneh Kebbede, Daniel Gene Dunn, Jerome Geoffrey Magnant
  • Patent number: 10026591
    Abstract: An ion beam etching device includes a grid provided between a treatment chamber and a plasma generation chamber, and for forming an ion beam by drawing ions from the plasma generation chamber; a gas introduction unit for introducing discharge gas into the plasma generation chamber; an exhaust for exhausting the treatment chamber; a substrate holder; a control unit to receive a measurement result of an in-plane film thickness distribution before the substrate is processed; and an electromagnetic coil provided outside of the plasma generation chamber in a ceiling portion opposite to the grid of the plasma generation chamber. The electromagnetic coil includes an outer coil provided on an outer circumference of the ceiling portion and an inner coil provided on an inner circumference of the ceiling portion, and the control unit controls the currents applied to the outer coil and the inner coil in accordance with the measurement result.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: July 17, 2018
    Assignee: Canon Anelva Corporation
    Inventors: Yoshimitsu Kodaira, Yukito Nakagawa, Motozo Kurita
  • Patent number: 10008366
    Abstract: Embodiments of the present disclosure generally provide improved methods for processing substrates with improved process stability, increased mean wafers between clean, and/or improved within wafer uniformity. One embodiment provides a method for seasoning one or more chamber components in a process chamber. The method includes placing a dummy substrate in the process chamber, flowing a processing gas mixture to the process chamber to react with the dummy substrate and generate a byproduct on the dummy substrate, and annealing the dummy substrate to sublimate the byproduct while at least one purge conduit of the process chamber is closed.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Sang Won Kang, Nicholas Celeste, Dmitry Lubomirsky, Peter Hillman, Douglas Brenton Hayden, Dongqing Yang
  • Patent number: 10003017
    Abstract: According to one embodiment, an etching apparatus includes an etching chamber, a stage in the etching chamber, a plasma generator in the etching chamber, the plasma generator being opposite to the stage and irradiating an ion beam toward the stage, a supporter supporting the stage, the supporter having a rotational axis in a direction in which the ion beam is irradiated, a first driver changing a beam angle between a direction which is perpendicular to an upper surface of the stage and the direction in which the ion beam is irradiated, and a second driver which rotates the stage on the rotational axis.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: June 19, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yasuyuki Sonoda
  • Patent number: 10002772
    Abstract: A method is described for vapor phase etching of oxide material including at least one of hafnia (HfO2) and zirconia (ZrO2), in the absence of plasma exposure of the oxide material. The method involves contacting the oxide material with an etching medium including at least one of phosphorus chloride and tungsten chloride under conditions producing a removable fluid reaction product, and removing the removable fluid reaction product. The etching process may be controllably carried out by use of pressure swings, temperature swings, and/or modulation of partial pressure of Hf or Zr chloride in the reaction, e.g., to achieve precision etch removal in the manufacture of semiconductor devices such as 3D NAND, sub-20 nm DRAMs, and finFETs.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: June 19, 2018
    Assignee: Entegris, Inc.
    Inventor: Bryan C. Hendrix
  • Patent number: 9997366
    Abstract: A method for ion-assisted etching a stack of alternating silicon oxide and silicon nitride layers in an etch chamber is provided. An etch gas comprising a fluorine component, helium, and a fluorohydrocarbon or hydrocarbon is flowed into the etch chamber. The gas is formed into an in-situ plasma in the etch chamber. A bias of about 10 to about 100 volts is provided to accelerate helium ions to the stack and activate a surface of the stack to form an activated surface for ion-assisted etching, wherein the in-situ plasma etches the activated surface of the stack.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: June 12, 2018
    Assignee: Lam Research Corporation
    Inventors: Zhongkui Tan, Hua Xiang, Wenbing Hu, Qing Xu, Qian Fu