Abstract: An embodiment of the invention may include a method of forming, and the resulting semiconductor structure. The method may include removing a portion of an Mx+1 layer insulator above an Mx conductive layer located in an Mx layer insulator. The method may include depositing an Mx+1 conductive layer in the removed portion of the Mx+1 layer insulator. The method may include removing a portion of Mx+1 conductive layer to form a first portion of Mx+1 conductive layer. The method may include forming spacers above the first portion of Mx+1 conductive layer and in the removed portion of the Mx+1 layer insulator. The method may include forming a second Mx+1 conductive layer. The method may include forming a phase change material on the second Mx+1 conductive layer.

Abstract: A process for depositing a silicon carbon nitride film on a substrate can include a plurality of complete deposition cycles, each complete deposition cycle having a SiN sub-cycle and a SiCN sub-cycle. The SiN sub-cycle can include alternately and sequentially contacting the substrate with a silicon precursor and a SiN sub-cycle nitrogen precursor. The SiCN sub-cycle can include alternately and sequentially contacting the substrate with carbon-containing precursor and a SiCN sub-cycle nitrogen precursor. The SiN sub-cycle and the SiCN sub-cycle can include atomic layer deposition (ALD). The process for depositing the silicon carbon nitride film can include a plasma treatment. The plasma treatment can follow a completed plurality of complete deposition cycles.

Abstract: A method of manufacturing a semiconductor device includes: a solder ball forming step comprising forming a plurality of solder balls at intervals on (i) a surface of a package surrounding a recess, or (ii) a surface of the light-transmissive member facing the surface of the package surrounding the recess (i) the surface of a light-transmissive member, or (ii) the surface of the package, into contact with an upper surface of the solder balls, which are softened, such that an air passage communicating with the recess is formed between the solder balls; and a bonding step comprising reducing a pressure in the recess via the air passage, and thereafter, in a state in which a gas for sealing is injected, heating and pressing the light-transmissive member and the package, to melt the solder balls and bond the light-transmissive member and the package.

Abstract: Methods for fabricating semiconductor devices include forming a fin-type pattern protruding on a substrate, forming a gate electrode intersecting the fin-type pattern, forming a first recess adjacent to the gate electrode and within the fin-type pattern by using dry etching, forming a second recess by treating a surface of the first recess with a surface treatment process including a deposit process and an etch process, and forming an epitaxial pattern in the second recess.

Abstract: A method for performing a photolithography process is provided. The method includes forming a layer over a substrate, and exposing a portion of the layer to form an exposed region. The method also includes performing a baking process on the layer, so that voids are formed in the exposed region of the layer. The method further includes filling the void with a post treatment coating material, and the post treatment coating material is over the exposed region of the layer.

Abstract: An OLED packaging method and structure are disclosed. In the present invention, forming a ring-shaped organic layer on the edge of the inorganic barrier layer, and then forming a planar organic layer on the upper surface of the inorganic barrier layer surrounded by the ring-shaped organic layer. The planar organic layer and the ring-shaped organic layer are integrated together to form an organic buffering layer. The upper surface of the organic buffering layer is flat, and the region of the organic buffering layer corresponding to the edge position of the inorganic barrier layer does not have an upward projection, the film thickness and morphology of the inorganic barrier layer are not affected. The present invention can improve the barrier effect of inorganic barrier layer for water and oxygen. The upper surface of the organic buffering layer in the OLED packaging structure is flat and has a good encapsulation effect.

Abstract: Over a front surface of a silicon semiconductor wafer is deposited a high dielectric constant film with a silicon oxide film, serving as an interface layer, provided between the semiconductor wafer and the high dielectric constant film. After a chamber houses the semiconductor wafer, a chamber's pressure is reduced to be lower than atmospheric pressure. Subsequently, a gaseous mixture of ammonia and nitrogen gas is supplied into the chamber to return the pressure to ordinary pressure, and the front surface is irradiated with a flash light, thereby performing post deposition annealing (PDA) on the high dielectric constant film. Since the pressure is reduced once to be lower than atmospheric pressure and then returned to ordinary pressure, a chamber's oxygen concentration is lowered remarkably during the PDA. This restricts an increase in thickness of the silicon oxide film underlying the high dielectric constant film by oxygen taken in during the PDA.

Abstract: A flexible AMOLED substrate and a manufacturing method thereof are provided. The method includes: forming a flexible backing, which includes a display section and a bending section disposed on an outer circumference of the display section; forming a buffer layer on the flexible backing, removing a portion of the buffer layer that is disposed on the bending section and preserving a portion of the buffer layer that is disposed on the display section so that an inorganic insulation layer on the bending section has a reduced thickness to improve bending resistance of the bending section of the flexible AMOLED substrate and thus improving production yield. The flexible AMOLED substrate is manufactured with the above method, in which an inorganic insulation layer included in a bending section has a reduced thickness so that the bending section of the flexible AMOLED substrate shows better resistance against bending and provides high production yield.

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Abstract: A semiconductor device includes a first dielectric layer including a first contact hole, a second dielectric layer formed on the first dielectric layer, and including a second contact hole aligned with the first contact hole, and a reflowed copper layer formed in the first and second contact holes.

Abstract: A method for determining a suitable implanting energy of at least two atomic species in a donor substrate to create a weakened zone defining a monocrystalline semiconductor layer to be transferred onto a receiver substrate, comprises the following steps: (i) forming a dielectric layer on at least one of the donor substrate and the receiver substrate; (ii) co-implanting the species in the donor substrate; (iii) bonding the donor substrate on the receiver substrate; (iv) detaching the donor substrate along the weakened zone to transfer the monocrystalline semiconductor layer and recover the remainder of the donor substrate; (v) inspecting the peripheral crown of the remainder of the donor substrate, or of the receiver substrate on which the monocrystalline semiconductor layer was transferred at step (iv); (vi) if the crown exhibits zones transferred onto the receiver substrate, determining the fact that the implanting energy at step (ii) is too high; (vii) if said the crown does not exhibit zones transferred on

Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.

Abstract: In the method for stabilizing a spin element according to an aspect of the disclosure, the spin element includes a current-carrying part extending in a first direction, and an element part laminated on one surface of the current-carrying part and including a ferromagnetic material, in the case where the environmental temperature is a predetermined temperature, a pulse current having a current density of 1.0×107 A/cm2 or more and 1.0×109 A/cm2 or less and a pulse width within a predetermined range is applied at least a predetermined number of times in the first direction of the current-carrying part at intervals of a predetermined waiting time.

Abstract: A method for fabricating a radio-frequency device involves providing a substrate structure including a silicon handle wafer, an oxide layer formed on the silicon handle wafer, and an active silicon layer disposed on the oxide layer.

Abstract: A method of manufacturing a semiconductor device includes forming an amorphous silicon layer over a first isolation layer. The method further includes simultaneously forming a gate oxide layer of a transistor device and transforming the amorphous silicon layer into a polycrystalline silicon layer by a thermal oxidation process. Herein a cover oxide layer is formed on the polycrystalline silicon layer.

Abstract: The present disclosure describes optical element stack assemblies that include multiple substrates stacked one over another. At least one of the substrates includes an optical element, such as a DOE, on its surface. The stack assemblies can be fabricated, for example, in wafer-level processes.

Abstract: A patterning method that includes providing an amorphous semiconductor surface to be patterned, and terminating the amorphous semiconductor surface by forming silicon-hydrogen (Si—H) on the surface to be patterned. A photoresist is formed on the surface to be patterned. The photoresist is then lithographically patterned using an extreme ultra violet (EUV) method. A photoresist is then developed on the surface to be patterned using negative tone development (NTD).

Abstract: A semiconductor apparatus includes a first device cell and a second device cell. The first device cell includes a first active region including a first set of device fins, an insulator layer disposed over the first set of device fins, a first gate fin over the first set of fins, and a first edge fin disposed over a first edge of the first active region. The second device cell is adjacent the first device cell and includes a second active region including a second set of device fins, the insulator layer disposed over the second set of device fins, a second gate fin over the second set of device fins, and a second edge fin disposed over a second edge of the second active region. The first edge fin and the second edge fin are connected to a power rail, a ground rail, or to each other to define a capacitor between the first device cell and the second device cell.

Abstract: An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.

Abstract: This disclosure is directed to devices and systems and methods comprising virtual negative beveled facets including to isolate adjacent devices from one another. Aspects hereof are directed to integrated photon detectors or photodetector devices incorporating implant isolation mesas and resistors, and in particular to methods and structures for isolating such detectors or devices from neighboring detectors or devices.