Abstract: Disclosed is a USB Type-C switching circuit configured for arranging a plurality of signals of a USB Type-C connector. The USB Type-C switching circuit can be used in products having DisplayPort Alternate mode, and includes a plurality of signal receivers/receivers, a plurality of series-parallel transforming circuits and a multiplexer. The signal receivers/receivers are connected to the USB Type-C connector to receive/transmit signals. The series-parallel transforming circuits are connected to the signal receivers/receivers to convert the signals between a parallel domain and a serial domain. The multiplexer is connected to the series-parallel transforming circuits to arrange the signals in the parallel domain according to a control signal.

Abstract: Data access in a storage device managed by a storage controller is carried out by receiving in the storage controller offsets in objects directly from a plurality of requesting entities of a computer system. The computer controls a mapping mechanism operated by the storage controller, wherein the mapping mechanism relates the offsets in the objects into physical addresses of the data on the storage device, and wherein the data is accessed at the physical addresses.

Abstract: A checkpointing method for creating a file representing a restorable state of a virtual machine in a computing system, comprising identifying processes executing within the virtual machine that may store confidential data, and marking memory pages and files that potentially contain data stored by the identified processes; or providing an application programming interface for marking memory regions and files within the virtual machine that contain confidential data stored by processes; and creating a checkpoint file, by capturing memory pages and files representing a current state of the computing system, which excludes information from all of the marked memory pages and files.

Abstract: A method includes determining a first host Non-Uniform Memory Access (NUMA) node of a plurality of host NUMA nodes on a host machine that provides a virtual machine to a guest, the first host NUMA node being associated with a pass-through device, creating a virtual NUMA node on the virtual machine, mapping the virtual NUMA node to the first host NUMA node, adding a virtual expander to a virtual root bus of the virtual machine, and associating the virtual expander with the virtual NUMA node.

Abstract: A method for execution by a dispersed storage network (DSN). The method begins by selecting a pillar width number of dispersed storage (DS) units of a DS unit pool for storing data, segmenting the data based on a segmentation scheme to produce a plurality of segments, issuing, for each segment of the plurality of segments, a pillar width number of write slice requests to the pillar width number of DS units, determining that an unfavorable number of write errors have occurred, and for each of the write errors, re-issuing a corresponding write slice request to another DS unit of remaining DS units of the DS unit pool, generating a DSN address for the data based on identities of actual DS units utilized, and updating at least one of a DSN index and a DSN directory to associate the DSN address with a data identifier of the data.

Abstract: Example method includes: negotiating, with a client device, a number of simultaneous I/O commands allowed in a single session between a storage device and the client device; pre-allocating a number of immediate data buffers for the single session based on the negotiated number of simultaneous I/O commands; receiving a write I/O command with immediate data, wherein the immediate data is transmitted within a single PDU as the I/O command; transitioning the pre-allocated buffers from a network interface state to a driver state in an atomic operation, the driver state enabling the pre-allocated buffers to be accessed by a driver layer of the storage device exclusively, and the atomic operation preventing other I/O commands from transitioning the network interface state of the pre-allocated buffers until the atomic operation is completed; and writing the immediate data to the pre-allocated buffers that are in the driver state.

Abstract: A diagnostic method of diagnosing a type of a field device, includes: setting a plurality of connection units included in an I/O module to be in a state of being capable of inputting or outputting a hybrid signal which is an analog signal having a digital signal superimposed thereon, the connection units being connected to the field device and capable of inputting the hybrid signal, outputting the hybrid signal, inputting a digital signal, and outputting a digital signal; and diagnosing the type of the field device which is connected to the connection units of the I/O module, based on the digital signal included in the hybrid signal obtained through the connection units.

Abstract: Described is a technology by which routing of data may be automatically modified based on detected state data of a computing system. For example, user input may be routed from an actuator set to a host computer system when the host computer system is in an online state, or to an auxiliary computing device when the host computer system is offline. State may be determined based on one or more various criteria, such as online or offline, laptop lid position, display orientation, current communication and/or other criteria. The auxiliary display and/or actuator set may be embedded in the host computer system, or each may be separable from it or standalone, such as a remote control or cellular phone.

Abstract: A system including a gasket communicatively coupled between a unified northbridge (UNB) having a cache coherent interconnect (CCI) interface and a processor having an Advanced eXtensible Interface (AXI) coherency extension (ACE). The gasket is configured to translate requests from the processor that include ACE commands into equivalent CCI commands, wherein each request from the processor maps onto a specific CCI request type. The gasket is further configured to translate ACE tags into CCI tags. The gasket is further configured to translate CCI encoded probes from a system resource interface (SRI) into equivalent ACE snoop transactions. The gasket is further configured to translate the memory map to inter-operate with a UNB/coherent HyperTransport (cHT) environment. The gasket is further configured to receive a barrier transaction that is used to provide ordering for transactions.

Abstract: When executed, a transaction-hint instruction specifies a transaction-count-to-completion (CTC) value for a transaction. The CTC value indicates how far a transaction is from completion. The CTC may be a number of instructions to completion or an amount of time to completion. The CTC value is adjusted as the transaction progresses. When a disruptive event associated with inducing transactional aborts, such as an interrupt or a conflicting memory access, is identified while processing the transaction, processing of the disruptive event is deferred if the adjusted CTC value satisfies deferral criteria. If the adjusted CTC value does not satisfy deferral criteria, the transaction is aborted and the disruptive event is processed.

Abstract: When executed, a transaction-hint instruction specifies a transaction-count-to-completion (CTC) value for a transaction. The CTC value indicates how far a transaction is from completion. The CTC may be a number of instructions to completion or an amount of time to completion. The CTC value is adjusted as the transaction progresses. When a disruptive event associated with inducing transactional aborts, such as an interrupt or a conflicting memory access, is identified while processing the transaction, processing of the disruptive event is deferred if the adjusted CTC value satisfies deferral criteria. If the adjusted CTC value does not satisfy deferral criteria, the transaction is aborted and the disruptive event is processed.

Abstract: Disclosed herein is a self-contained method and device for managing a first electronic apparatus. Said first electronic apparatus is, in particular, a first electronic multimedia apparatus connected via an HDMI interface to a second electronic apparatus consisting of a playback apparatus. A self-contained method for managing a first electronic apparatus is provided. The first electronic apparatus is connected to at least one second electronic apparatus such that said first electronic apparatus provides data to the second electronic apparatus, said data being usable by said second electronic apparatus. The self-contained management method comprises a CMD_TRG triggering, by said first electronic apparatus, of a control of said first electronic apparatus, in accordance with activity data da2 of at least one second electronic apparatus from among said second electronic apparatus(es).

Abstract: A packet transmission method includes packaging a plurality of data in the form of a payload; storing information on whether the plurality of data are packaged in a header, the payload or a CRC area including a transmission error check code of the plurality of data; combining the header, the payload, and the CRC area with each other to generate a transaction layer packet; and outputting a packet including the transaction layer packet.

Abstract: A data processing apparatus is provided, which includes: a plurality of processor cores; a shared processor cache, the shared processor cache being connected to each of the processor cores and to a main memory; a bus controller, the bus controller being connected to the shared processor cache and performing, in response to receiving a descriptor sent by one of the processor cores, a transfer of requested data indicated by the descriptor from the shared processor cache to an input/output (I/O) device; a bus unit, the bus unit being connected to the bus controller and transferring data to/from the I/O device; wherein the shared processor cache includes means for prefetching the requested data from the shared processor cache or main memory by performing a direct memory access in response to receiving a descriptor from the one of the processor cores.

Abstract: An apparatus is described having an instruction execution pipeline that has a vector functional unit to support a vector multiply add instruction. The vector multiply add instruction to multiply respective K bit elements of two vectors and accumulate a portion of each of their respective products with another respective input operand in an X bit accumulator, where X is greater than K.

Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.

Abstract: A method and apparatus for traversing a queue of commands containing a mixture of read and write commands places a Next Valid Write Address pointer in each queue entry. In this manner, time savings are achieved by allowing preprocessing of the next write command to be executed. The method may be practiced by setting a next valid address pointer in all queue entries. Queue traversal may be forward, backward, or bi-directional.