Abstract: The invention relates to a device for forming an electric circuit comprising logic means (30) generating and using small signals of intermediate levels between the device supply levels and means for detecting signals leaving the small signal range.

Abstract: A current-mode analog-to-digital converter includes: a current input node; a current-mode sample and hold circuit configured to output a steady source of electrical current having an analog value proportional to a sampled analog value of an electrical current at the current input node; and at least one current comparator that compares the electrical current output by the current-mode sample and hold circuit to at least one reference current to produce a digital representation of the sampled analog value of the electrical current at the current input node.

Abstract: An fusing apparatus for correcting process variation is provided. The fusing apparatus for correcting the process variation of the semiconductor device includes a fusing part including a fusing resistor fused by a current penetrating; a current driving transistor for fusing the fusing resistor by driving a fusing current according to a fusing enable signal applied; a current path part for building a current path by connecting to the fusing part, and controlling a first node voltage according to a fusing state of the fusing resistor; and a latch part for latching a second node signal inversely amplified from the first node voltage, and outputting the latch value when a power-on reset part operates in a normal mode. Using the fusing cell, the test time can be reduced and the current consumption can be greatly decreased in the fusing process.

Abstract: A signal driver circuit having an adjustable output voltage for a high-logic level output signal. The signal driver circuit includes a signal driver configured to output a first logic level signal having a first voltage and output a second logic level signal having a second voltage according to an input signal. A voltage controlled voltage supply coupled to the signal driver provides the first voltage for the first logic level signal. The magnitude of the first voltage provided by the voltage controlled voltage supply is based on a bias voltage. A bias voltage generator can be coupled to the voltage controlled voltage supply to provide the bias voltage.

Abstract: A driving auxiliary circuit receiving an input voltage to control an output voltage of an operational amplifier via a first switch and a second switch is provided. A pull-low circuit turns on the first switch, including a first input terminal coupled to a high voltage source providing a high voltage and a first output terminal for controlling the voltage level of the output voltage. The output voltage is charged to be equal to the input voltage when the input voltage exceeds the output voltage. A pull-high circuit turns on the second switch, including a second input terminal coupled to the high voltage source providing the high voltage and a second output terminal for controlling the voltage level of the output voltage. The output voltage is discharged to be equal to the input voltage when the output voltage exceeds the input voltage.

Abstract: A common-mode voltage controller for adjusting common-mode voltages between a first buffer and a second buffer at a subsequent stage or a preceding stage of the first buffer in a signal transmission circuit, comprising: a first reference voltage generation unit for generating a common-mode voltage corresponding to the first buffer; a second reference voltage generation unit for generating a common-mode voltage corresponding to the second buffer at the subsequent stage or the preceding stage; and a control signal generation unit for generating a control signal for controlling a common-mode voltage of the first buffer according to a difference voltage between an output of the first reference voltage generation unit and an output of the second reference voltage generation unit, and giving the control signal to the first buffer and first reference voltage generation unit.

Abstract: Approaches for secure configuration of a programmable logic integrated circuit (IC). In one approach, a method includes programming configuration memory of the programmable logic IC with a first configuration bitstream. At least a portion of a second configuration bitstream is encrypted using values stored in a portion of the configuration memory as a key. The second configuration bitstream is input to the programmable logic IC, and the encrypted portion of the second configuration bitstream is decrypted using the values stored in the portion of the configuration memory. The configuration memory is then programmed with each decrypted portion of the second bitstream.

Abstract: Provided is a complementary metal oxide semiconductor (CMOS) input buffer circuit that is capable of lower voltage operation with lower current consumption. The CMOS input buffer circuit includes: a depletion type NMOS transistor including a drain connected to a power supply terminal (VDD), and a gate connected to an output terminal; a PMOS transistor including a source connected to a source of the depletion type NMOS transistor, a drain connected to the output terminal, and a gate connected to an input terminal; and an NMOS transistor including a source connected to a reference terminal (GND), a gate connected to the input terminal, and a drain connected to the output terminal.

Abstract: A solid state lighting unit constituted of: a control circuitry; a single string of light emitting diodes, the single string constituted of a plurality of sections each comprising a plurality of light emitting diodes; and a plurality of bypass paths each responsive to the control circuitry, each of the plurality of bypass paths arranged to provide bypass to a particular one of the plurality of sections, wherein the control circuitry is operative to identify an open circuit condition of a particular one of the plurality of sections, and activate the bypass path arranged to bypass the open circuit section, thereby providing light through sections not exhibiting an open circuit condition.

Abstract: Some embodiments of the invention provide configurable integrated circuits (“IC's”) with configurable node arrays. In some embodiments, the configurable node array includes numerous (e.g., 50, 100, etc.) configurable nodes arranged in several rows and columns. This array also includes several direct offset connections, where each particular direct offset connection connects two nodes that are neither in the same column nor in the same row in the array. In some embodiments, at least some direct offset connections connect pairs of nodes that are separated in the array by more than one row and at least one column, or by more than one column and at least one row. Some embodiments establish a direct connection by (1) a set of wire segments that traverse through a set of the IC's wiring layers, and (2) a set of vias when two or more wiring layers are involved. In some embodiments, some of the direct connections have intervening circuits (e.g.

Abstract: A method is provided for thermal electric binary logic control. The method accepts an input voltage representing an input logic state. A heat reference is controlled in response to the input voltage. The method supplies an output voltage representing an output logic state, responsive to the heat reference. More explicitly, the heat reference controls the output voltage of a temperature-sensitive voltage divider. For example, the temperature-sensitive voltage divider may be a thermistor voltage divider.

Abstract: The present invention relates to a method and system for implementing link level protocol redundancy in a router. In particular, the invention relates to providing redundancy of the Open Shortest Path First (OSPF) routing protocol. An active processor provides OSPF operations. In the present invention, a standby processor is coupled to the active processor. During an initial synchronization, all network link protocol information from the active processor is forwarded to the standby processor. The network link information can include OSPF state information, OSPF configuration information, OSPF adjacencies information, OSPF interface information and OSPF global protocol information. Thereafter, any updates of network link protocol information are immediately forwarded to the standby processor. Upon failure of the active processor, the router is switched to the standby processor and all OSPF protocol operations are performed on the standby processor.

Abstract: Disclosed is a local area information-providing system and method using real names. When an access word provided by an accessing client via a network is a real name, a local area information database is searched using the real name and the client's position information, and various kinds of information on the real name placed within an area corresponding to the client's position information are found and provided to the client. Together with this, an Internet address corresponding to the real name is provided to the client, and accordingly, the client accesses the web page corresponding to the input real name. Hence, the user can access desired web pages using not conventional English domain names but real names, and concurrently receive various kinds of local area information corresponding to the real name. Especially, the user can receive various kinds of local area information of the real names corresponding to predetermined positions without additional position assignment.

Abstract: An improved method and system for accessing data from a semaphore in a computer system, through the use of a software component in an application. The method may involve multiple software components in a corresponding multiple of applications in a corresponding multiple of computer systems. In that case, one or more requests to perform a locked read-modify-write operation on the data comprised in the semaphore may be received from one or more of the multiple software components. When multiple requests are received, the multiple requests may be stored in a queue, and processed sequentially. The corresponding multiple of applications may use the semaphore to synchronize operation of the applications. The multiple of computer systems and the computer memory may be connected through a network (e.g., the Internet). Accessing data from a semaphore in a computer system may include publishing or writing data to the semaphore.

Abstract: An electronic control apparatus configured for use in routing customer orders, received over the internet, to a service provider such as a print service provider selected from a plurality of competing print service providers, comprises an electronic interface configured to receive and acknowledge customer orders; first processing means configured to compare the requirements of a received order with pre-stored information specific to each of the competing service providers; responsive means configured to establish a list of the service providers determined to be able to fulfill requirements of the received order; and processing means configurable, for a received order, to make the selection from the list and to route the received order to the selected service provider.

Abstract: The present invention provides for provisioning broadband services using a VDSL-based communication network. The present invention includes a system architecture and method for automatically activating VDSL service by self-discovering customer premises equipment, such as a residential gateway, by determining the loop associated with a user and the subscribed content to be delivered to the user.

Abstract: A network appliance for monitoring, diagnosing and documenting problems among a plurality of devices and processes (objects) coupled to a computer network utilizes periodic polling and collection of object-generated trap data to monitor the status of objects on the computer network. The status of a multitude of objects is maintained in memory utilizing virtual state machines which contain a small amount of persistent data but which are modeled after one of a plurality of finite state machines. The memory further maintains dependency data related to each object which identifies parent/child relationships with other objects at the same or different layers of the OSI network protocol model. A decision engine verifies through on-demand polling that a device is down. A root cause analysis module utilizes status and dependency data to locate the highest object in the parent/child relationship tree that is affected to determine the root cause of a problem.

Abstract: An information processing system that can create a page easily by the use of contents disclosed from information disclosing servers. A contents storing section stores contents to be provided. In this information processing system, an additional information storing section stores additional information consisting of information indicating the respective attributes of contents stored in the contents storing section and relations among the contents. An additional information obtaining section obtains additional information from an information disclosing server. An additional information storage section stores additional information obtained. An editing section edits additional information stored in the additional information storage section according to an administrator's intention or a user's taste. A display data creating section creates display data for displaying a page from additional information stored in the additional information storage section at the request of a client.

Abstract: An enhanced network element and method for configuring and deploying computer network elements is disclosed. A customer orders a network element from an equipment provider. Upon receipt of the unconfigured network element, a Trusted Configuration Device (TCD) is shipped from a network provider to the customer. The TCD transmits information to the NE that enables it to download a configuration file from a Provisioning Server (PS) via a secure channel.

Abstract: An IP subnet sharing technique is described which allows multiple network devices of an access network to share an IP subnet without the need for each network device to run complex routing protocols, or bridging protocols. Further, the multiple network devices are able to share an IP subnet without the need to subdivide the IP subnet into smaller groups.