Abstract: A mapping table management method, a memory control circuit unit, and a memory storage device are provided. The method includes: receiving a read command from a host system, wherein the read command indicates reading a first data stored in at least one first logical address; and searching whether a relation management information reflects that a first group static mapping table recording the first logical address is related to a dynamic mapping table. In response to a search result reflecting that the first group static mapping table is related to the dynamic mapping table, the dynamic mapping table is searched to obtain a first physical address mapped by the first logical address. And if not related, the first group static mapping table among group static mapping tables is searched to obtain a second physical address mapped by the first logical address.

Abstract: A memory allocation device for deployment within a host server computer includes control circuitry, a first interface to a local processing unit disposed within the host computer and local operating memory disposed within the host computer, and a second interface to a remote computer. The control circuitry allocates a first portion of the local memory to a first process executed by the local processing unit and transmits, to the remote computer via the second interface, a request to allocate to a second process executed by the local processing unit a first portion of a remote memory disposed within the remote computer. The control circuitry further receives instructions via the first interface to store data at a memory address within the first portion of the remote memory and transmits those instructions to the remote computer via the second interface.

Abstract: Cache-based trace logging using tags in an upper cache level. A processor influxes a cache line into a first cache level from an upper second cache level. Influxing the cache line into the first cache level includes, based on the first cache level being a recording cache, the processor reading a tag that is (i) stored in the second cache level and (ii) associated with the cache line. Based on reading the tag, the processor determines whether a first value of the cache line within the second cache level has been previously captured by a trace. The processor performs one of (i) when the first value is determined to have been previously logged, following a logged value logic path when influxing the cache line; or (ii) when the first value is determined to have not been previously logged, following a non-logged value logic path when influxing the cache line.

Abstract: Methods, systems, and devices for adaptive user defined health indications are described. A host device may be configured to dynamically indicate adaptive health flags for monitoring health and wear information for a memory device. The host device may indicate, to a memory device, a first index. The first index may correspond to a first level of wear of a set of multiple indexed levels of wear for the memory device. The memory device may determine that a metric of the memory device satisfies the first level of wear and indicate, to the host device, that the first level of wear is satisfied. The host device may receive the indication that the first level of wear is satisfied and indicate, to the memory device, a second level of wear of the set of indexed levels of wear that is different than the first level of wear.

Abstract: Methods, systems, and devices for cache block budgeting techniques are described. In some memory systems, a controller may configure a memory device with a cache. The cache may include a first subset of blocks configured to statically operate in a first mode and a second subset of blocks configured to dynamically switch between operating in the first mode and a second mode. A block operating in the second mode may be configured to store relatively more bits per memory cell than a block operating in the first mode. The controller may track and store, for each block of the second subset of blocks, a respective ratio of cycles performed in the first mode to cycles performed in the second mode. The controller may select a block from the second subset of blocks to switch between modes responsive to a trigger and based on the respective ratio for the block.

Abstract: Successful storing of extent operations into corresponding records of a transaction log results in acknowledgement of completion of the extent operations being indicated to one or more hosts. In response to determining that the extent operations are unrelated to each other, the extent operations are flushed in parallel from the transaction log to back-end non-volatile data storage. During the flushing, dependencies between the extent operations and other operations stored in the transaction log are maintained. Dependency chains are identified within the transaction log, and at least one tree data structure representing the dependencies between each of the extent operations and the other operations stored in the transaction log may be generated and traversed in order to select the correct operations stored in the transaction log to flush.

Abstract: A command requesting creation of a backup file and issued by a client-side deduplication library is received. Upon creating the file, a first flag is set on the file indicating that the file should be automatically retention locked after a cooling off period has elapsed. During the cooling off period, a command requesting that the file be opened for writes is received. The first flag is cleared to exclude the file from being automatically retention locked after the cooling off period has elapsed. A second flag is set on the file indicating that writes to the file are in progress. A command requesting that the file be closed, the writes to the backup file thereby being complete, is received. The second flag is cleared. The first flag is reset to allow the file to be automatically retention locked after the cooling off period has elapsed.

Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware that includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a mode selection command and a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings from a host. The controller determines whether the data out message will change the mode parameters which cannot be rewritten in the first mode page setting by performing bitwise logic operations on a new mode page setting in the data out message, preset values of the plurality of mode parameters of the first mode page setting, and a rewriteable setting for each bit of the first mode page setting.

Abstract: A processing system includes a processor, a memory, and an operating system that are used to allocate a page table caching memory object (PTCM) for a user of the processing system. An allocation of the PTCM is requested from a PTCM allocation system. In order to allocate the PTCM, a plurality of physical memory pages from a memory are allocated to store a PTCM page table that is associated with the PTCM. A lockable region of a cache is designated to hold a copy of the PTCM page table, after which the lockable region of the cache is subsequently locked. The PTCM page table is populated with page table entries associated with the PTCM and copied to the locked region of the cache.

Abstract: Techniques are disclosed for managing metadata of a storage system. A storage control system receives data to be written to primary storage, and writes the received data together with metadata to a write cache. The storage control system destages the metadata from the write cache to a primary metadata structure which is configured to persistently store and index the metadata. The primary metadata structure comprises (i) a first data structure that is configured to accumulate the metadata destaged from the write cache and organize the accumulated metadata in blocks of metadata sorted by index keys, and (ii) a second data structure that is configured to receive the accumulated metadata from the first data structure, and organize the received metadata using an index structure that enables random-access to the metadata using the index keys.

Abstract: A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.

Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to maintain a logical-to-physical (L2P) table, wherein a region of the L2P table is cached in a volatile memory; maintain a write count reflecting a number of bytes written to the memory device; maintain a cache miss count reflecting a number of cache misses with respect to a cache of the L2P table; responsive to determining that a value of a predetermined function of the write count and the cache miss count exceeds a threshold value, copy the region of the L2P table to a non-volatile memory.

Abstract: Recovery points can be used for replicating a virtual machine and reverting the virtual machine to a different state. A filter driver can monitor and capture input/output commands between a virtual machine and a virtual machine disk. The captured input/output commands can be used to create a recovery point. The recovery point can be associated with a bitmap that may be used to identify data blocks that have been modified between two versions of the virtual machine. Using this bitmap, a virtual machine may be reverted or restored to a different state by replacing modified data blocks and without replacing the entire virtual machine disk.

Abstract: Apparatuses and methods can be related to supplementing AI processing in memory. An accelerator and/or a host can perform AI processing. Some of the operations comprising the AI processing can be performed by a memory device instead of by an accelerator and/or a host. The memory device can perform AI processing in conjunction with the host and/or accelerator.

Abstract: Methods and apparatus for protecting data. Backup copies of data are created in real time and restoration of this backup data is enabled. For example, backup repositories of files stored in a primary storage device of a computer system may be created by examining information concerning the files to determine critical fields therein, and storage of the critical fields to a critical storage device and of non-critical fields and tags that are substituted for the critical fields to a context storage device effected. Following compromise of the files stored in the primary storage device, accesses by applications may be directed to the context storage device, e.g., as a means of rapid failover, and/or for each file stored in the context storage device, record-by-record copying of such files to the primary storage device may be effected to restore the contents of the primary storage device.

Abstract: A memory controller includes a mapping data control unit configured to interrupt the generation of the additional mapping data, when during generation of additional mapping data, an operation for an address identical to a logical block address in the additional mapping data is performed, and to generate dummy mapping data. The additional mapping data may include mapping information indicating a mapping relationship between a logical block address and a physical block address.

Abstract: Techniques involve creating a stripe based on a dynamic window. In particular, in response to a request to create a stripe in the storage system, a first storage device for creating the stripe is selected from multiple storage devices. A first extent in the first storage device is added to the stripe. A first storage device sequence associated with the first storage device is determined based on a size of a predetermined window, and the first storage device sequence includes the first storage device and a set of continuous storage devices adjacent to the first storage device in the multiple storage devices. At least one other storage device for creating the stripe is determined based on storage devices other than the first storage device in the first storage device sequence. The storage devices in the storage system can be used in a balanced manner as much as possible.

Abstract: Embodiments of the present disclosure provide a method, device, and computer program product for managing a backup system. The method comprises obtaining a state of a backup system, wherein the backup system comprises a plurality of backup servers and a plurality of backup clients, the plurality of backup servers is communicatively coupled to the plurality of backup clients via a network, and wherein at least one backup server from the plurality of backup servers is configured to back up data of at least one backup client allocated from the plurality of backup clients to the at least one backup server, determining a reward score corresponding to the state of the backup system and, determining, based on the state of the backup system and the reward score, configuration information for the backup system, the configuration information indicating allocation of the plurality of backup clients to the plurality of backup servers.

Abstract: Methods, systems, and devices for repair operation techniques are described. A memory device may detect a failure of a read operation associated with a physical row address of a memory die. The memory device may store information associated with the physical row address before performing a media management operation and after detecting the failure. Additionally or alternatively, the memory device may initiate a counter based on detecting the failure and may increment a value of the counter for each media management operation performed after detecting the failure. The memory device may send a command or other information to perform a repair operation for the physical row address. The memory device may determine the physical row address for the repair operation (e.g., despite media management operations) based on the stored information or the value of the counter, and may perform the repair operation on the physical row address.

Abstract: Systems, methods, and apparatus related to a memory system that manages an interface for a volatile memory device and a non-volatile memory device to control memory system power. In one approach, a controller evaluates a demand on memory performance. If the demand of a current computation task needed by the host is high, a DRAM device is powered-up to meet the demand. Otherwise, if the non-volatile memory device is adequate to meet the demand, the DRAM memory is partially or fully-powered down to save power. In another approach, a task performed for a host device uses one or more resources of a first memory device (e.g., DRAM). A performance capability of a second memory device (e.g., NVRAM) is determined. A controller of the memory system determines whether the performance capability of the second memory device is adequate to service the task.