Patents Examined by Shawn X. Gu
  • Patent number: 11768612
    Abstract: A system for managing composed information handling systems to provide data protection services for data generated by applications hosted by the composed information handling systems, includes a processor that executes applications and a system control processor manager that obtains a composition request for a composed information handling system, identifies a compute resource set having compute resources specified by the composition request, identifies a hardware resource set having hardware resources specified by the composition request, sets up storage management services for managing reads and writes of data the hardware resource set using a control resource set, which performs deduplication on data generated by the applications, to obtain logical hardware resources, and presents the logical hardware resources using the control resource set to the compute resource set as bare metal resources to instantiate a composed information handling system to service the composition request.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: September 26, 2023
    Assignee: Dell Products L.P.
    Inventor: Yossef Saad
  • Patent number: 11762767
    Abstract: A highly read data manager of a memory device receives a request to perform receives a request to perform a data relocation operation on a first wordline of a plurality of wordlines for a memory device, the memory device comprising a plurality of multi-level memory cells, wherein each multi-level memory cell comprises a plurality of pages; determines at the first wordline comprises data stored at one or more high read disturb pages of the plurality of pages; determines whether the data comprises a characteristic that satisfies a threshold criterion in relation to additional data stored on additional wordlines of the plurality of wordlines; responsive to determining that the data comprises the characteristic that satisfies the threshold criterion, identifies one or more low read disturb pages of the plurality of pages of a target wordline for relocating the data; and responsive to identifying the one or more low read disturb pages of the target wordline, stores at least a portion of the data at the one or more
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: September 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Giuseppina Puzzilli, Vamsi Pavan Rayaprolu, Ashutosh Malshe, James Fitzpatrick, Shyam Sunder Raghunathan, Violante Moschiano, Tecla Ghilardi
  • Patent number: 11755216
    Abstract: Aspects of the present disclosure relate to data cache management. In embodiments, a logical block address (LBA) bucket is established with at least one logical LBA group. Additionally, at least one LBA group is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array. Further, the association includes binding the two or more distinctly sized cache slots with at least one LBA group and mapping the bound distinctly sized cache slots in a searchable data structure. Furthermore, the searchable data structure identifies relationships between slot pointers and key metadata.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: September 12, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael Scharland, Mark Halstead, Rong Yu, Peng Wu, Benjamin Yoder
  • Patent number: 11755477
    Abstract: A cache includes an upstream port, a downstream port, a cache memory, and a control circuit. The control circuit temporarily stores memory access requests received from the upstream port, and checks for dependencies for a new memory access request with older memory access requests temporarily stored therein. If one of the older memory access requests creates a false dependency with the new memory access request, the control circuit drops an allocation of a cache line to the cache memory for the older memory access request while continuing to process the new memory access request.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: September 12, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Chintan S. Patel, Girish Balaiah Aswathaiya
  • Patent number: 11755473
    Abstract: A method for managing memory leaks in a memory device includes grouping, by a garbage collection system, a plurality of similar memory allocations of the memory device into one or more Unique Fixed Identifiers (UFIs); identifying, by the garbage collection system, one of the one or more UFIs having a highest accumulated memory size and adding each of the plurality of memory allocations in the identified one of the one or more UFIs into a Potential Leak Candidate List (PLCL); identifying, by the garbage collection system, the memory leaks in the memory device by identifying unreferenced memory addresses associated with the plurality of memory allocations in the PLCL; and releasing, by the garbage collection system, the identified unreferenced memory addresses associated with the plurality of memory allocations corresponding to the memory leaks into the memory device.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Surendra Singh, Dinesh Gehlot, Mallikarjun Shivappa Bidari, Raju Udava Siddappa, Shashank Vimal, Shreya Ganatra, Sujay Shankar Gaitonde, Tushar Vrind, Venkata Raju Indukuri
  • Patent number: 11755207
    Abstract: A data storage method in a storage system and a related system. The method includes: calculating a similar fingerprint of first to-be-stored data to obtain a first similar fingerprint, where the first similar fingerprint is for determining whether the first to-be-stored data is similar to stored data; determining reference data based on the first similar fingerprint, where a similar fingerprint of the reference data is the first similar fingerprint; determining first differential data between the to-be-stored data and the reference data based on the reference data, where the reference data is stored in a first storage unit; and storing the first differential data in a second storage unit, where the first storage unit and the second storage unit belong to a read range of a same read I/O.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: September 12, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Kun Guan, Bang Liu, Liyu Wang, Shaohui Quan, Liangxiang Zhang
  • Patent number: 11748251
    Abstract: Embodiments of the present disclosure include systems and methods for storing tensors in memory based on depth. In some embodiments, for each of a plurality of sets of elements in a three-dimensional (3D) matrix, a position is determined along a height axis and width axis of the 3D matrix. At the determined position, a set of elements are identified along a depth axis of the 3D matrix. The set of elements are stored in a contiguous block of memory.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: September 5, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nitin Garegrat, Shankar Narayan, Derek Gladding
  • Patent number: 11748263
    Abstract: Improvements to internet cache protocols are disclosed. In certain embodiments, a client-facing proxy server can query peer servers to determine whether they have a copy of an object that the proxy server needs. The peer servers can respond based on object information that the peer servers stored about objects they have in cache, where the peers recorded such object information previously when ingesting the objects into their cache and stored it separately from the objects for fast access (e.g. in RAM vs. on disk). This information can be expressed in a compact way using just a few object flags, and enables the peer server to quickly respond and with detail about the status of objects they hold. The proxy server can make an intelligent decision about which peer to use, and indeed whether to use a peer at all.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: September 5, 2023
    Assignee: Akamai Technologies, Inc.
    Inventors: Dmitry Sotnikov, Denis Emelyanov, Dvir Tuberg, Arnon Shoshany, Michael Hakimi, Kfir Zigdon
  • Patent number: 11748254
    Abstract: Data transformer apparatus comprising a dispatcher module, a reader module, a converter module and a writer module; the dispatcher module is configured to receive a data transformation request including a first and a second information items; the reader module is configured to retrieve data to be transformed, according to said first information item; obtain the type attribute of the data to be transformed, based on said first information item; send the data to be transformed and the type attribute to the converter module; the converter module is configured to select transformation instructions based on said type attribute; execute, on the data to be transformed, the selected transformation instructions, thereby obtaining transformed data; send the transformed data to the writer module; the writer module is configured to; write the transformed data in an output buffer according to said second information item.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: September 5, 2023
    Assignee: Ecole Polytechnique Federale de Lausanne (EPFL)
    Inventors: Arash Pourhabibi Zarandi, Siddharth Gupta, Hussein Kassir, Mark Sutherland, Zilu Tian, Mario Paulo Drumond Lages De Oliveira, Babak Falsafi, Christoph Koch
  • Patent number: 11741009
    Abstract: A cache may include multiple request handling pipes, each of which may further include multiple request buffers, for storing device requests from one or more processors to one or more devices. Some of the device requests may require to be sent to the devices according to an order. For a given one of such device requests, the cache may select a request handling pipe, based on an address indicated by the device request, and select a request buffer, based on the available entries of the request buffers of the selected request handling pipe, to store the device request. The cache may further use a first-level and a second-level token stores to track and maintain the device requests in order when transmitting the device requests to the devices.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: August 29, 2023
    Assignee: Apple Inc.
    Inventors: Sandeep Gupta, Brian P Lilly, Krishna C Potnuru
  • Patent number: 11740993
    Abstract: An apparatus includes a plurality of processor circuits, a cache memory circuit, and a trace control circuit. The trace control circuit may be configured, in response to activation of a mode to record information indicative of program execution of at least one processor circuit of the plurality of processor circuits, to monitor memory requests transmitted between ones of the plurality of processor circuits and the cache memory circuit, and then to select a particular memory request of monitored memory requests using an arbitration algorithm. The trace control circuit may be further configured to allocate space in a trace buffer to the particular memory request, and to store, in the trace buffer, information associated with the particular memory request.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: August 29, 2023
    Assignee: Apple Inc.
    Inventors: Andrew J. Beaumont-Smith, Sandeep Gupta, Krishna C. Potnuru, Matthias Knoth
  • Patent number: 11740978
    Abstract: In an approach for in-band selective data snapshot using fifth generation (5G) radio link control (RLC) channels for edged cloud application backups, a processor creates one or more RLC channels to transfer network data packets in a telecommunication network using a network slicing technology. A processor allocates the one or more RLC channels to one or more applications in a user device for dedicated packet routing requirements. A processor maps the corresponding RLC channels and applications with corresponding identifiers, respectively. A processor monitors the one or more applications for backups. A processor, in response to receiving an application's backup request, creates a copy of a datastore associated with the application based on changes monitored in the one or more applications.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: August 29, 2023
    Assignee: International Business Machines Corporation
    Inventors: Gandhi Sivakumar, Luke Peter Macura, Kushal S. Patel, Sarvesh S. Patel
  • Patent number: 11733868
    Abstract: Disclosed herein is a device and method for dynamically processing of a command within a storage system. This includes identifying a plurality of non-volatile memory storage locations of the storage system that have at least one operation parameter associated with the plurality of non-volatile memory storage locations. For each identified plurality of non-volatile memory storage locations, there is a determination whether a value of the at least one operation parameter exceeds a predetermined threshold value. That value is representative of operation effects of the storage system on a corresponding storage location of the identified plurality of non-volatile memory storage locations.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: August 22, 2023
    Assignee: Kioxia Corporation
    Inventor: Yaron Klein
  • Patent number: 11720249
    Abstract: A data storage device is provided. The data storage device includes a flash memory and a controller. The flash memory stores a firmware that includes a plurality of mode page settings, and each mode page setting includes a plurality of mode parameters. The controller receives a data out message arranged to rewrite a first mode page setting among the plurality of mode page settings. When determining, based on a reference array, that the data out message will change the mode parameters which cannot be rewritten in the first mode page setting, the controller rejects to change the mode parameters which cannot be rewritten in the first mode page setting. The reference array stores a rewriteable setting for each bit of the first mode page setting.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: August 8, 2023
    Assignee: SILICON MOTION, INC.
    Inventors: Te-Kai Wang, Yu-Da Chen
  • Patent number: 11720488
    Abstract: The described technology is generally directed towards garbage collecting content selection graphs and related data from in an in-memory content selection graph data store. When a set of content selection graphs expire, a more current content selection graph set becomes active, and the storage space (e.g., in a Redis cache) used by the expired content selection graphs is reclaimed via garbage collection. Some graphs can be replaced before use, referred to as orphaned graphs, and the storage space for any such orphaned graphs is also reclaimed during garbage collection. Also garbage collected is storage space including related data structures used to generate and validate graphs.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: August 8, 2023
    Assignee: HOME BOX OFFICE, INC.
    Inventors: Jonathan David Lutz, Allen Arthur Gay, Dylan Carney
  • Patent number: 11714723
    Abstract: In an embodiment, two or more storage systems are requested to prepare respective local checkpoints for a dataset, wherein each of the two or more storage systems stores portion of the dataset. The two or more storage systems are determined to have established the checkpoint. In response to determining that the local checkpoints have been established, a coordinated checkpoint is completed.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: August 1, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: Ronald Karr, Naveen Neelakantam, Taher Vohra
  • Patent number: 11714756
    Abstract: Embodiments of information handling systems (IHSs) and methods are provided herein to improve the security and performance of a shared cache memory contained within a multi-core host processor. Although not strictly limited to such, the techniques described herein may be used to improve the security and performance of a shared last level cache (LLC) contained within a multi-core host processor included within a virtualized and/or containerized IHS. In the disclosed embodiments, cache security and performance are improved by using pre-boot Memory Reference Code (MRC) based cache initialization methods to create page-sized cache namespaces, which may be dynamically mapped to virtualized and/or containerized applications when the applications are subsequently booted during operating system (OS) runtime.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: August 1, 2023
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Vivek Viswanathan Iyer
  • Patent number: 11709773
    Abstract: A computer-readable recording medium storing an information processing program for causing a computer to execute a process including: specifying an amount of first areas subjected to data update among a plurality of first areas that are contained in a cache storage area and allowed to be synchronized individually from each other with a nonvolatile storage area; and determining whether to individually synchronize the first areas subjected to the data update among the plurality of first areas with the nonvolatile storage area or collectively synchronize a second area that is formed by the plurality of first areas and allowed to be collectively synchronized with the nonvolatile storage area, with the nonvolatile storage area, based on the specified amount, a first processing time taken for synchronization between the first areas and the nonvolatile storage area, and a second processing time taken for synchronization between the second area and the nonvolatile storage area.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: July 25, 2023
    Assignee: FUJITSU LIMITED
    Inventor: Satoshi Iwata
  • Patent number: 11709738
    Abstract: One example method includes gathering respective performance data concerning each asset in a group of assets, clustering the performance data so as to define a first cluster and a second cluster, and data assets in the first cluster are assigned a HIGH RISK label and data assets in the second cluster are assigned a LOW RISK label, assigning a respective risk score to each of the assets, and the risk score includes a quantified risk level for the asset to which the risk score has been assigned, ranking the assets with the HIGH RISK label according to their respective risk scores, and backing up a ranked asset based on an IO volume associated with that ranked asset.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: July 25, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Kapil Sampath, Rahul Deo Vishwakarma, Paul Hammer
  • Patent number: 11704044
    Abstract: Modifying a clone image of a dataset, including: generating, based on metadata describing one or more updates to a dataset, a tracking copy of replica data on a target data repository; generating, after receiving an indication to begin accepting modifications to the tracking copy of the replica data, a cloned image of the dataset that is modifiable without modifying the tracking copy of the replica data; and responsive to a storage operation directed to the target data repository, modifying the cloned image of the dataset without modifying the tracking copy of the replica data.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: July 18, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: David Grunwald, Thomas Gill, Ronald Karr, John Colgrove, Larry Touchette, Lawrence Mertes